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Pvf Synopsys Inc Co Park Vaughan Fleming LLP patentsThe following is a sampling of recent Pvf Synopsys Inc Co Park Vaughan Fleming LLP patent applications (USPTO Patent Application #, Patent Title) sorted by month.
January 2011 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20110022987 - Cycle-tapping technique for selecting objects
20110023001 - Dynamic rule checking in electronic design automation
20110023006 - Connection navigation in electronic design automation
20110016094 - Transaction history with bounded operation sequences
20110016294 - Technique for replaying operations using replay look-ahead instructions
20110016423 - Generating widgets for use in a graphical user interface
20110016438 - Flash-based anti-aliasing techniques for high-accuracy high-efficiency mask synthesis
November 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100280812 - Modeling critical-dimension (cd) scanning-electron-microscopy (cd-sem) cd extraction
20100280814 - Logic simulation and/or emulation which follows hardware semantics
20100281444 - Multiple-power-domain static timing analysis
20100281445 - Efficient exhaustive path-based static timing analysis using a fast estimation technique
October 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100275074 - Runtime programmable bist for testing a multi-port memory device
20100275169 - Adaptive state-to-symbolic transformation in a canonical representation
20100269078 - Automatic approximation of assumptions for formal property verification
20100262946 - Model-based assist feature placement using inverse imaging approach
September 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100235795 - Execution monitor for electronic design automation
20100235799 - Method and apparatus for generating a floorplan using a reduced netlist
20100235801 - Method and apparatus for accelerating project start and tape-out
20100229136 - Crosstalk time-delay analysis using random variables
August 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100194779 - Method and system for sizing polygons in an integrated circuit (ic) layout
20100198539 - Fast and accurate estimation of gate output loading
20100198875 - Incremental concurrent processing for efficient computation of high-volume layout data
20100199236 - Method and apparatus for performing rlc modeling and extraction for three-dimensional integrated circuit (3d-ic) designs
20100199255 - Method and apparatus for correcting assist-feature-printing errors in a layout
July 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100191518 - Compact abbe's kernel generation using principal component analysis
20100191679 - Method and apparatus for constructing a canonical representation
20100192030 - Method and apparatus for implementing a hierarchical design-for-test solution
20100192111 - Performing logic optimization and state-space reduction for hybrid verification
20100192113 - Method and apparatus for managing violations and error classifications during physical verification
20100192114 - Method and apparatus for performing abstraction-refinement using a lower-bound-distance
June 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100146476 - Modeling mask corner rounding effects using multiple mask layers
May 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100131913 - Method and apparatus for scaling i/o-cell placement during die-size optimization
20100115476 - Congestion optimization during synthesis
20100115486 - Assist feature placement based on a focus-sensitive cost-covariance field
20100115489 - Method and system for performing lithography verification for a double-patterning process
20100115526 - Method and apparatus for allocating resources in a compute farm
April 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100107220 - Secure consultation system
20100097107 - Two-phase clock-stalling technique for error detection and error correction
20100092880 - Method and apparatus for using a synchrotron as a source in extreme ultraviolet lithography
20100095264 - Method and apparatus for determining a photolithography process model which models the influence of topography variations
20100086196 - Method and apparatus for determining an optical threshold and a resist bias
20100083243 - System and method for delivering software
20100083246 - System and method for verifying delivered software
March 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100077184 - Method and apparatus for removing a pipeline bubble
February 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100026251 - Voltage regulator with ripple compensation
20100031217 - Method and system for facilitating floorplanning for 3d ic
January 2010 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20100014199 - Electrostatic-discharge protection using a micro-electromechanical-system switch
20100017175 - Method and apparatus for distinguishing combinational designs
20100017352 - Enhancing performance of a constraint solver across individual processes
20100011325 - Method and apparatus for determining the effect of process variations
20100005429 - Integrated single spice deck sensitization for gate level tools
20100005436 - Method and apparatus for characterizing an integrated circuit manufacturing process
December 2009 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20090319252 - Method and apparatus for extracting assume properties from a constrained random test-bench
20090300561 - Method and system for post-routing lithography-hotspot correction of a layout
20090300563 - Method and system for performing sequential equivalence checking on integrated circuit (ic) designs
November 2009 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20090290666 - Method and apparatus for receiver pulse response determination
20090292508 - Method and apparatus for modeling long range euvl flare
20090288047 - Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout
20090276738 - Method and apparatus for executing a hardware simulation and verification solution
20090276738 - Method and apparatus for executing a hardware simulation and verification solution
June 2009 - Pvf Synopsys Inc Co Park Vaughan Fleming LLP patents
20090153239 - Variable-impedance gated decoupling cell
20090150850 - Method and apparatus for identifying and correcting phase conflicts
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Pvf Synopsys Inc Co Park Vaughan Fleming LLP in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Pvf Synopsys Inc Co Park Vaughan Fleming LLP with additional patents listed. Browse our Agent directory for other possible listings.
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