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Programmed material consolidation processes for fabricating electrical contacts and the resulting electrical contactsRelated Patent Categories: Electrical Connectors, Contact Terminal, Having Treated (e.g., Coated) Surface Or Distinct Contact Surface LayerProgrammed material consolidation processes for fabricating electrical contacts and the resulting electrical contacts description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060211313, Programmed material consolidation processes for fabricating electrical contacts and the resulting electrical contacts. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is a divisional of application Ser. No. 10/788,941, filed Feb. 27, 2004, pending. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to electrical contacts for use with semiconductor devices. The electrical contacts of the present invention may be used to provide temporary electrical connections as semiconductor devices are being burned in or otherwise tested. More specifically, the present invention relates to electrical contacts which include stereolithographically fabricated portions. The present invention also includes semiconductor devices, carriers, probe cards, and other substrates that employ such electrical contacts. Additionally, the present invention includes methods relating to fabrication of the electrical contacts of the present invention and structures incorporating same. [0004] 2. Background of Related Art [0005] Numerous types of electrical contacts that are configured to provide temporary communication between the bond pads or other contacts of a semiconductor device and corresponding terminals or other contacts of a test substrate, carrier substrate, or other electronic component have been developed and used in the art. [0006] Several examples of temporary electrical contacts have been developed by FormFactor, Inc., of Livermore, Calif., and are described in U.S. Pat. No. 5,476,211, as well as in other U.S. Patents referenced hereinbelow that have been assigned to FormFactor (hereinafter collectively "the FormFactor Patents"). Each of these temporary electrical contacts is a compressible, resilient element which is secured to a bond pad of a semiconductor device. They may include a core and an outer coating, both of which are formed from electrically conductive materials. The core may comprise a relatively soft material, or material which is subject to plastic deformation, while the outer coating may comprise a more rigid material, which imparts the electrical contact with elastic properties. Alternatively, the core may be formed from a more rigid, elastic material, while the coating is formed from a material that enhances adhesion of the electrical contact to a bond pad of a semiconductor device. [0007] The electrical contacts that are described in the FormFactor Patents are represented to be useful for providing temporary electrical connection between the bond pads of a semiconductor device and the contacts of a test or burn-in substrate. They may also provide permanent electrical connections between the bond pads of the semiconductor device and corresponding contacts (i.e., bond pads, terminals, leads, etc.) of another semiconductor device, a carrier, another semiconductor device component, or another electronic device. [0008] The FormFactor Patents teach that wire-bonding apparatus may be used to form the core of an electrical contact of the type described therein, while conventional deposition or plating methods may be used to coat each core with another layer of conductive material. As conventional wire-bonding apparatus are typically configured to form only a single conductive element (e.g., bond wire, electrical contact, or other conductive structure) at a time, and since there may be thousands of bond pads on a substrate (e.g., silicon wafer) upon which numerous semiconductor devices are carried, the electrical contact fabrication processes that are described in the FormFactor Patents may be extremely and undesirably time consuming. Furthermore if, as described in the FormFactor Patents, gold is used to form the cores of numerous electrical contacts, the cost of forming the cores may be extremely and undesirably expensive. [0009] The contacts described in the FormFactor Patents may be used, for example, in probe cards, which are used to establish a temporary connection between a semiconductor device and a test substrate or burn-in substrate. The contacts are positioned at locations that correspond to the locations of corresponding bond pads of the semiconductor device and terminals of the test substrate or burn-in substrate. Thus, the contacts are positioned so as to align between corresponding bond pads and terminals when the probe card is aligned between the semiconductor device and the test substrate or burn-in substrate. The compressibility of such contacts imparts the probe card with dimensional tolerance for the spacing between the semiconductor device and the test substrate or burn-in substrate. [0010] Whether the Form Factor contacts are used with a probe card or another type of semiconductor device component, they may be compressed or deformed beyond their elastic limits, which will render them useless. [0011] Accordingly, processes are needed by which electrical contacts may be more efficiently and cost-effectively fabricated, as are electrical contacts that are formed by such processes, protective structures for preventing damage to such electrical contacts, and semiconductor devices, carriers, probe cards, and other substrates with which such electrical contacts may be assembled. SUMMARY OF THE INVENTION [0012] The present invention, in several embodiments, includes electrical contacts, which are also referred to herein as "contacts" for simplicity, that may be at least partially fabricated by use of stereolithographic fabrication processes, as well as semiconductor devices, carriers, probe cards, and other substrates that include such contacts. [0013] A contact, in an exemplary embodiment, includes a core which is stereolithographically formed or fabricated, as well as a conductive coating on at least a portion of the core. As the core is stereolithographically fabricated, it may include a single layer or multiple layers that are at least partially superimposed, contiguous, and mutually adhered to one another. The contact may be rigid or comprise a compressible, resilient member. [0014] In another exemplary embodiment, a contact according to the present invention includes a conductive core disposed within a stereolithographically fabricated shell. The shell, which may include a single layer or a plurality of superimposed, contiguous, mutually adhered layers, may be formed with a channel extending therethrough. The channel may then be filled with the conductive material of the core, which is exposed at both ends of the shell. [0015] In yet another aspect, the present invention includes methods for fabricating contacts. One exemplary embodiment of a contact fabrication method according to the present invention includes stereolithographically fabricating a core of the contact, then coating at least portions of the core with one or more layers (or sublayers) of conductive material. [0016] A method for fabricating a contact in accordance with teachings of the present invention may include the formation of recesses within a fabrication, or sacrificial, substrate and coating the surfaces of the fabrication substrate with one or more material layers that will facilitate the subsequent release of contacts therefrom. Cores of the contacts may then be formed at the locations of the recesses, with the configuration of the base of each contact being at least partially defined by the recess within which it is formed. Thereafter, the cores may be at least partially coated with one or more layers (or sublayers) of conductive material. Once the contacts have been fabricated, they may be released from the fabrication substrate, which may then be discarded or reused to fabricate more contacts. [0017] In another, similar embodiment of the method, the fabrication substrate may lack recesses. [0018] In another embodiment of contact fabrication method according to the present invention, the foregoing processes may be used to form contacts that incorporate teachings of the present invention directly on the contact pads of a semiconductor device, an interposer, a carrier substrate, or the like. [0019] Accordingly, another aspect of the present invention involves semiconductor device components that include the inventive contacts. [0020] In another aspect, the present invention includes probe cards, which are useful in testing and burning-in semiconductor devices that include the inventive contacts. An exemplary embodiment of a probe card according to the present invention may include contact pads with one or more types of compressible, resilient electrical contacts. [0021] In addition, methods for fabricating probe cards are within the scope of the present invention. Continue reading about Programmed material consolidation processes for fabricating electrical contacts and the resulting electrical contacts... Full patent description for Programmed material consolidation processes for fabricating electrical contacts and the resulting electrical contacts Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Programmed material consolidation processes for fabricating electrical contacts and the resulting electrical contacts patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. 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