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Programmable semiconductor device

USPTO Application #: 20070298526
Title: Programmable semiconductor device
Abstract: A design structure for designing and manufacturing a programmable device. The design structure includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material. (end of abstract)
Agent: Ibm Microelectronics Intellectual Property Law - Essex Junction, VT, US
Inventors: Wayne S. Berry, John Atkinson Fifield, William H. Guthrie, Richard Steven Kontra, William Robert Tonti
USPTO Applicaton #: 20070298526 - Class: 438014000 (USPTO)
Related Patent Categories: Semiconductor Device Manufacturing: Process, With Measuring Or Testing
The Patent Description & Claims data below is from USPTO Patent Application 20070298526.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords

CROSS REFERENCE TO RELATED APPLICATION

[0001] This application is a continuation in part of pending U.S. application Ser. No. 10/552,971 filed Oct. 11, 2005, which is a continuation of PCT application serial no. PCT/U503/13392 filed 30 Apr. 2003, which claims priority of provisional application Ser. No. 60/462,568, filed 11 Apr. 2003; all assigned to the present assignee.

TECHNICAL FIELD

[0002] The present invention relates to programmable semiconductor devices and, more particularly, to design structures which comprise such devices usable as semiconductor electronic (E) fuses.

BACKGROUND

[0003] Semiconductor E-fuses in general are known. See, for example, U.S. Pat. No. 5,334,880, Low Voltage Programmable Storage Element, issued Aug. 2, 1994, by Abadeer et al., which is incorporated herein in its entirety.

[0004] However, known semiconductor E-fuses have not proven to be entirely satisfactory. Programming in silicon-based semiconductor devices (e.g., fuses) can result in post collateral damage of the neighboring structures. This result typically forces a fuse pitch, or fuse cavity, set of rules that do not scale well with the technology feature rules from one generation to the next. Thus, fuse density and effectiveness of fuse repair, replacement, or customization are limited. Typically, such damage is caused by particulates from fuse blow. In addition, standard electrical programming of a conductive fuse is to change its resistance, either from an unprogrammed state having a low resistance to a programmed state having a high resistance, or from an unprogrammed state having a high resistance to a programmed state having a low resistance. See, for example, U.S. Pat. No. 5,334,880. Such fuses contain an initial resistance, R0.+-..DELTA.R0, and a programmed resistance, Rp.+-..DELTA.Rp. It is the .+-..DELTA.Rp that causes fuse read instability because this parameter is statistical in nature. The variations that cause the R0 and Rp distributions to approach each other cause practical limitations in interrogating a programmed fuse through a standard CMOS latching circuit. To overcome these limitations, the prior art has included additional fuses as reference elements in order to discriminate between a programmed and unprogrammed fuse. Such practices result in unwanted growth in the fuse bank area.

SUMMARY OF THE INVENTION

[0005] The present invention overcomes this and other drawbacks by employing a device or fuse structure of a composite material that migrates during a programming event. The material that migrates (e.g., WSi.sub.2) changes state, and does not cause collateral damage during its migration or material reformation, and has a programmed state where .+-..DELTA.Rp is preferably equal to zero. This allows for individual fuses to discriminate among themselves and to eliminate unwanted reference fuse elements, as well as the circuitry used to bias and compare against the reference fuse elements.

[0006] According to the invention, a programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) being substantially wider than the second end (12b), and a metallic material (40) on the upper surface, said metallic material being physically migratable along the upper surfaces responsive to an electrical current I flowable through the elongated semiconductor material and the metallic material.

[0007] A method of programming a device includes flowing an electrical current I through a device having a semiconductor alloy (40) disposed on a doped semiconductor line (12), for a time period such that a portion of the semiconductor alloy migrates from a first end (12a) of the device to a location L proximate to a second end (12b) of the device.

[0008] A method of fabricating a programmed semiconductor device, includes providing a semiconductor substrate (10) having a thermal insulator (13); disposing an elongated semiconductor material (12) on the insulator, the semiconductor material having an upper surface S, a first resistivity, and two ends; disposing a metallic material (40) on the upper surface; the metallic material having a second resistivity much less than the first resistivity of the semiconductor material; flowing an electrical current I through the semiconductor material (12) and the metallic material (40) for a time period such that a portion of the metallic material migrates from one end (12a) of the semiconductor material to the other end (12b) and melts the semiconductor material to form an open circuit (90).

[0009] It is a principal object of the present invention to provide a programmable semiconductor device which does not cause collateral damage to adjacent devices or other elements during programming.

[0010] It is a further object of the present invention to provide a method of fabricating a programmable semiconductor device, which method is readily compatible with various standard MOS manufacturing processes.

[0011] It is an additional object of the present invention to provide a method of programming a programmable semiconductor device which reduces collateral damages to neighboring structures.

[0012] Further and still other objects of the present invention will become more readily apparent when the following detailed description is taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

[0013] FIG. 1 is a side schematic view of a programmable semiconductor device according to one embodiment of the present invention.

[0014] FIGS. 2-4 show top plan view photographs of devices according to the present invention when incompletely programmed (FIG. 2), completely programmed (FIG. 3) and overprogrammed (FIGS. 4a, 4b, 4c).

[0015] FIG. 5a shows a top plan view photograph and FIG. 5b a side sectional view photograph of a completely programmed device according to the invention.

[0016] FIG. 6 is a flow diagram of major steps to calibrate parameters for programming a device (1) of the invention.

[0017] FIGS. 7-10 show preferred salient process steps for fabricating an unprogrammed device according to the invention.

[0018] FIG. 11 a shows a top plan schematic views of the preferred embodiment of the device (1) according to the invention, and FIG. 11b shows the device (1) connected to an energy source for programming.

[0019] FIGS. 12-15 are top schematic cross-sectional conceptual views into the direction of line AA, but rotated approximately 90.degree. for easier explanation.

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