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07/13/06 | 21 views | #20060155960 | Prev - Next | USPTO Class 712 | About this Page  712 rss/xml feed  monitor keywords

Programmable controller

USPTO Application #: 20060155960
Title: Programmable controller
Abstract: A programmable controller has a multi-purpose processor such as an MPU and an application specific control device such as an ASIC (application specific integrated circuit). When the MPU requests the ASIC to execute a user program and the ASIC is activated, the MPU executes an event process while the ASIC executes the requested user program. When the MPU requests the ASIC to execute a DMA transfer process in an input/output refresh process and the ASIC is activated, the MPU executes an event process while the ASIC executes the requested DMA transfer process. (end of abstract)
Agent: Beyer Weaver & Thomas LLP - Oakland, CA, US
Inventor: Kazunori Okada
USPTO Applicaton #: 20060155960 - Class: 712203000 (USPTO)
Related Patent Categories: Electrical Computers And Digital Processing Systems: Processing Architectures And Instruction Processing (e.g., Processors), Architecture Based Instruction Processing, Multiprocessor Instruction
The Patent Description & Claims data below is from USPTO Patent Application 20060155960.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords



[0001] This is a divisional of application Ser. No. 10/109,541 filed Mar. 27, 2002, currently pending.

BACKGROUND OF THE INVENTION

[0002] This invention relates to a programmable controller, and more particularly to a programmable controller adapted to concurrently carry out a peripheral service process (event processing) for a peripheral component such as a host computer and a communication unit while carrying out the execution of a user program or an input/output refresh process such that the cycle time of the CPU unit of the programmable controller can be reduced and its response is improved. The invention also relates to a method of controlling such a programmable controller.

[0003] In general, a programmable controller is structured as an assembly of an I/O unit connected to sensors, switches and actuators, a CPU unit for executing a preset user program and a communication unit for communicating with a host system through a network. In the case of a middle-sized or small-sized programmable controller, the CPU unit is provided with a micro-processing unit (MPU) through which input signals, say, from a sensor, are received from the I/O unit for use in logical formulas in the user program. The result of such an operation is transmitted as an output signal to the I/O unit and an actuator or the like is thereby driven to control a production device. The I/O data are stored in the I/O memory of the CPU unit.

[0004] FIG. 3 shows an outline of such processing by the CPU unit of a programmable controller of this type. As the power source is switched on, the programmable controller undergoes a power-on (initialization) routine (Step 301) including initialization of memory devices and recognition of each assembled unit. Next, common processes are carried out whereby battery abnormality is checked in order to ascertain the condition of the current supply (Step 302). Next, operational processes are carried out such as the execution of a user program (Step 303). For the first cycle of the program, the input signals stored when power was previously shut off may be retrieved in Step 301 such that the process may be started as a continuation from the time of previous power-off. Alternatively, operations may be carried out according to the initialization data of Step 301. Next, an I/O refresh process is carried out (Step 304) whereby input data from an external control device such as a switch may be written in the I/O memory and I/O data updated on the basis of the result of an operation may be outputted to the object of control. Next, a peripheral service process (event process) is carried out (Step 305) such as exchange of data with a tool connected through a network or the communication unit. Thereafter, Steps 302-305 are repeated as a cyclic process. The time required from Step 302 to Step 305 is generally referred to as the cycle time of the CPU unit.

[0005] Programmable controllers of this type are also used as a programmable controller system structured as shown in FIG. 4 with a host system 401 which may comprise a personal computer, a plurality of child-programmable computers (child PLC) 403, 404, 405, . . . and a parent-programmable computer (parent PLC) 402 in between such that many kinds of control can be carried out. In such a system, the parent PLC collects data from the child PLCs and transmits the collected data to the host system 401 such that the host system 401 can monitor the system as a whole.

[0006] If a programmable controller of the kind having one MPU is used as the parent PLC when a system as shown in FIG. 4 is assembled, it will carry out processes as shown in FIG. 3, that is, Steps 302-305 per cycle. Since it cannot start the peripheral service process until Steps 302-304 are completed, even if the host system or the CPU unit through the communication unit wishes to carry out a peripheral service process (event process) with high priority, the system has to wait for the cycle time for the peripheral service process. In other words, a quick event response cannot be achieved.

[0007] In order to reduce the cycle time, it has been known to mount an application specific integrated circuit (ASIC) as a dedicated hardware circuit to the CPU unit of the programmable controller in addition to an MPU (an equivalent of a multi-purpose processor). An application specific control device means a hardware circuit with the function of carrying out a part of programs in a user program. Since the execution is by a hardware circuit, it works much faster than a multi-purpose processor operating on software. When a complicated application command is executed, however, it becomes necessary to develop and design a dedicated hardware circuit for the purpose and it is difficult to realize it on an ASIC. Accordingly, it is now a common practice to produce an ASIC by developing and designing hardware circuits for executing some limited commands referred to as bit operations and basic commands, that is, to design an ASIC for executing commands suitable for handling by hardware.

[0008] On the other hand, a multi-purpose processor such as an MPU, carrying out software operations, can handle not only commands requiring complicated operations referred to as application commands but also bit operations and basic commands which are simple operations. The speed of its software operation, however, is not as great as the operation speed of a hardware circuit.

[0009] The time required for the execution of a user program can be reduced with a programmable controller having devices of both kinds mounted thereon. This is because those in the user program that can be handled by an application specific control device are handled by an application specific control device, not by a multi-purpose processor. In practice, each command in a user program is examined and it is decided whether it can be processed by an application specific control device or not. If it is decided that it can, it is processed by an application specific control device. If it is decided that it cannot, it is processed by a multi-purpose processor. Although the cycle time can be reduced in this manner, execution of the user program, the I/O refresh process and the event process are sequentially performed in a series of cyclic operations. Thus, unless the execution of the user program and the I/O refresh process is completed, the event process cannot be initiated. Even if it is desired to carry out a peripheral service process with high priority, it cannot be done and a quick event response is not available.

SUMMARY OF THE INVENTION

[0010] It is therefore an object of this invention to improve the response time of a programmable controller having both a multi-purpose processor and an application specific control device mounted thereon by allowing an event process to be executed concurrently while a user program may be being executed.

[0011] In view of the object described above, a programmable controller embodying this invention may be characterized as having a multi-purpose processor and an application specific control device so designed that the multi-purpose processor, when the multi-purpose processor requests the application specific control device to execute a user program and activates the application specific control device, executes an event process while the application specific control device executes the requested user program, and/or that the multi-purpose processor, when it requests the application specific control device to execute a DMA transfer process in an input/output refresh process and activates the application specific control device, executes an event process while the application specific control device executes the requested DMA transfer process.

[0012] This invention also relates to methods of controlling a programmable controller having both a multi-purpose processor and an application specific control device mounted thereon, characterized as designing the multi-purpose processor and the application specific control device such that the multi-purpose processor, when the multi-purpose processor requests the application specific control device to execute a user program and activates the application specific control device, executes an event process while the application specific control device executes the requested user program, and/or that the multi-purpose processor, when it requests the application specific control device to execute a DMA transfer process in an input/output refresh process and activates the application specific control device, executes an event process while the application specific control device executes the requested DMA transfer process.

[0013] In the above, the multi-purpose processor may be an MPU mounted to the programmable controller and the application specific control device may be a dedicated ASIC mounted to the programmable controller for the execution of a user program.

[0014] The "event process" includes peripheral service processes for peripheral components and processes for peripheral components such as a host system and a communication unit. The "user program" may include commands requiring a long time period for their execution. If such a command is consigned to the application specific control device, the multi-purpose processor gains free time and can secure sufficient time for the execution of event processing.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 is a block diagram of the CPU unit for a programmable controller.

[0016] FIG. 2 is a time chart for showing the internal processing of the MPU shown in FIG. 1 when the parallel execution mode of operations has been selected.

[0017] FIG. 3 is a flowchart of the basic cyclic processes for the CPU unit of a prior art programmable controller.

[0018] FIG. 4 is a block diagram of a prior art programmable controller.

DETAILED DESCRIPTION OF THE INVENTION

[0019] The invention is described next by way of an example. FIG. 1 shows the CPU unit of a programmable controller embodying this invention, as comprising a micro-processing unit (MPU as a multi-purpose processor) 101, a read only memory (ROM) 102, a random access memory (RAM) 104, a user memory 105, an application specific integrated circuit (ASIC as an application specific control device) 106, an I/O memory 107 and an I/O bus 108.

[0020] The MPU 101 is a microprocessor unit for controlling the entire operations of the CPU unit, being connected to the ROM 102, the RAM 104 and the ASIC 106 through an internal bus, and is adapted, similar to a conventional MPU, to execute a user program, the I/O refresh process and an event process cyclically.

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Method and apparatus to provide efficient communication between processing elements in a processor unit
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Industry Class:
Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)

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