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  Probe for semiconductor devicesUSPTO Application #: 20070176619Title: Probe for semiconductor devices Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond. (end of abstract) Agent: N. Kenneth Burraston Kirton & Mcconkie - Salt Lake City, UT, US Inventors: Igor Y. Khandros, Gaetan L. Mathieu USPTO Applicaton #: 20070176619 - Class: 324762000 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20070176619. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application is a continuation-in-part of application Ser. No. 08/152,812 filed on Nov. 16, 1993. This invention relates to an interconnection contact structure, interposer, semiconductor assembly and package using the same and method for fabricating the same. [0002] Heretofore many types of interconnections which have been provided for use with the semiconductor devices have suffered from one or more disadvantages limiting their broad application in the semiconductor industry. There is therefore need for new and improved interconnection contact structure which overcomes such disadvantages so that it will be particularly useful in semiconductor assemblies and packages and which can be broadly used throughout the semiconductor industry. [0003] In general, it is an object of the present invention to provide a contact structure, interposer, a semiconductor assembly and package using the same and a method for fabricating the same which makes it possible to use contact structures and particularly resilient contact structures attached directly to active silicon devices. [0004] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which makes it possible to make temporary contacts against pads for burn-ins on test substrates. [0005] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which makes it possible to utilize spacings or pitches at the originating points for the contact structures which are different from the terminating points for the contact structure. [0006] Another object of the invention is to provide a structure, interposer, assembly and method which utilizes staggered contact structures making possible three-dimensional fanouts. [0007] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which make it possible for the contact structures to be attached to pads in area arrays, peripheral, edge or center line pad outs. [0008] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which with one sided edge pad outs, the contact can be shaped in a way that enables closely spaced edge mounting of chips on SIMM and other cards. [0009] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which makes it possible to mount contacts on devices in either wafer or singulated form. [0010] Another object of the invention is to provide a structure, interposer, assembly and method in which contact attachment can be accomplished with automatic equipment. [0011] Another object of the invention is to provide a structure, interposer, assembly and method which makes it possible to utilize under chip capacitors to save in real estate. [0012] Another object of the invention is to provide a structure, interposer, assembly and method of the above character which can be utilized for providing more than one substrate precursor populated with card ready silicon on both sides which optionally can be interconnected with resilient contacts. [0013] Additional objects and features of the invention will appear from the following description in which the preferred embodiments are set forth in the accompanying drawings. [0014] FIG. 1 is a partial isometric view of a "skeleton and muscle" contact structure incorporating the present invention which is in the form of a freestanding pin. [0015] FIG. 2 is a partial isometric view similar to FIG. 1 but showing a resilient contact structure with a bend therein. [0016] FIG. 3 is side elevational view in section showing a contact structure with multiple bends and with a multiple layer shell. [0017] FIG. 4 is a side elevational view in section of another embodiment of a contact structure incorporating the present invention in which the shell is provided with protrusions. [0018] FIG. 5 is a side elevational view in section showing another embodiment of a contact structure incorporating the present invention in which the bend portion of the contact structure is shorted together by an electrically conducting filled compliant elastomeric layer. [0019] FIG. 6 is an isometric view in section of another contact structure incorporating the present invention utilized in conjunction with plated-through holes in a printed circuit board. [0020] FIG. 7 is an isometric view in section of another embodiment of the contact structure incorporating the present invention utilized in conjunction with plated-through holes in a printed circuit board in which a resilient contact structure is provided on one side of the printed circuit board and in which the other side is provided with a contact structure that need not be resilient. [0021] FIG. 8 is a side elevational view in section of another contact structure incorporating the present invention and in which a plurality of stems of the type described in FIG. 1 have been bridged together by a solder layer to form a solder column structure. [0022] FIG. 9 is a side elevational isometric view in section of a contact structure incorporating the present invention in which two redundant resilient compliant contact structures are provided per contact terminal. [0023] FIG. 10 is a side elevational isometric view in section of another contact structure incorporating the present invention in which three resilient contact structures are bridged together by a solder layer at the uppermost and lowermost extremities while leaving the intermediate bend portions free of the solder so that a compliant solder column is provided. [0024] FIG. 11 is a side elevational view in section of another embodiment of a contact structure incorporating the present invention in which the contact structure extends over an edge of the substrate to form a probe contact. Continue reading... Full patent description for Probe for semiconductor devices Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Probe for semiconductor devices patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Probe for semiconductor devices or other areas of interest. ### Previous Patent Application: Universal contactor for use with multiple handlers and method therefor Next Patent Application: Semiconductor wafer testing apparatus and method of testing semiconductor wafer Industry Class: Electricity: measuring and testing ### FreshPatents.com Support Thank you for viewing the Probe for semiconductor devices patent info. IP-related news and info Results in 1.93751 seconds Other interesting Feshpatents.com categories: Electronics: Semiconductor , Audio , Illumination , Connectors , Crypto , |
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