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  Printed circuit wiring board designing support device, printed circuit board designing method, and its programUSPTO Application #: 20060161874Title: Printed circuit wiring board designing support device, printed circuit board designing method, and its program Abstract: A printed circuit wiring board designing support device includes a layout data receiving section receiving printed circuit board layout data through an input/output section, a section for extracting structures of power supply/ground planes, a via hole extracting section for extracting a via hole interconnecting the wirings extending over power supply/ground planes, a capacitor extracting section for extracting a capacitor connected between power supply/ground planes, a distance measuring section for measuring the distance between the via hole and the capacitor, a database where the allowable distance value between the via hole and the capacitor in respect to the distance between the power supply and ground planes is recorded, an examination section for comparing the capacitor/via hole distance with the allowable distance value, and a warning section for issuing a warning when the distance between the via hole and the capacitor is larger than the allowable distance value. (end of abstract) Agent: Young & Thompson - Arlington, VA, US Inventors: Takashi Harada, Takahiro Yaguchi, Akira Wakui, Seishi Eya, Shunsuke Fujimoto USPTO Applicaton #: 20060161874 - Class: 716008000 (USPTO) Related Patent Categories: Data Processing: Design And Analysis Of Circuit Or Semiconductor Mask, Circuit Design, Floorplanning The Patent Description & Claims data below is from USPTO Patent Application 20060161874. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] The present invention relates to a printed circuit wiring board design supporting device, a printed circuit board design method, and a program of the same, and in particular to a printed circuit wiring board design supporting device, a printed circuit board design method, and a program of the same, in which engineering practice for optimizing the arrangement of a bypass capacitor for controlling circuit malfunction due to unnecessary electromagnetic radiation and noise is improved. BACKGROUND ART [0002] For the purpose of more adequately describing a technological level for the present invention at present, all descriptions of the patents, patent applications) patent gazettes, scientific papers, and the like which are cited or specified in tho present application will be incorporated herein by reference. [0003] A printed circuit board comprises electronic components such as IC and LSI, and signal wiring for connecting those components, and is mounted on an almost every equipment as the heart of electronic equipment. A multilayer printed circuit board includes a power line composed of aground wiring for providing reference potential of power supply wiring and a circuit for supplying a direct-current voltage required for the IC and the LSI to operate and the potential variation of the power line at high frequency often triggers the generation of IC and LSI malfunction, and high levels of unnecessary electromagnetic wave radiation. [0004] The most commonly adopted technique to control the potential variation of the power line is a method by which a capacitor is mounted on the surface of a board to connect both ends thereof to power supply and ground for absorbing voltage variation. [0005] For example, in a design method of a printed circuit board, a printed circuit board, and electronic equipment provided with a printed circuit board, in order to mount an electronic circuit element on a two-layer printed wiring board 81 in which a printing circuit pattern is formed on a surface (FIG. 1A) and a back surface (FIG. 1B) through an insulated base 80 as shown in FIG. 1A and FIG. 1B, there is adopted structure in which an inductance pattern is formed in a manner that a land is disposed on the surface, a ground pattern 84 up to an inner site of the electronic circuit element is disposed, a trunk power source pattern 82 of a trunk is disposed, a power source branching pattern 83 is branched off from the trunk power source pattern, extended up to the inner site of the electronic circuit element, and connected to a part of the land via a through hole 85, and an inductance formed between the power source branching pattern and the trunk power source pattern is larger than an inductance formed between the power source branching pattern and a capacitor disposed in the vicinity of the power source branching pattern 83. This prior art is disclosed in the Japanese Unexamined Patent Publication No. 9(1997)-54788, Paragraph Number "0032" to "0034," and FIG. 1. [0006] Additionally, as shown in FIG. 2A, FIG. 2B, and FIG. 2C, in power supply pattern connecting structure of an electronic circuit component provided with wiring patterns which are connected to each of both terminals of a power source pin 93 and a ground pin 94 of an LSI 92 mounted on a printed wiring board 91, and which are made up of first power supply patterns 97 and 98, and first ground patterns 99 and 100 for flowing a supply current from a power supply layer (power plane) 95 and a ground layer (ground plane) 96, and a capacitor 101 which is connected to the two wiring patterns and mounted on the same printed circuit board or the back surface thereof as the LSI 92, there is adopted structure in which the power supply layer 95 is connected to a second power supply pattern provided at one end of the capacitor 101 through a via hole 103, and a ground layer is connected to the first ground patterns 99 and 100 through a via hole 104. This prior art is disclosed in the Japanese Unexamined Patent Publication No. 2000-156548, Paragraph Number "0005" and FIG. 1. [0007] Moreover, most printed circuit boards are designed with the use of a CAD (Computer Aided Design) system at present. There is proposed a system that the CAD system is effectively utilized to automatically dispose a capacitor in a design stage of a printed circuit board. [0008] For example, a printed board arranging processor is provided with an input part 111, an arithmetic processing part 112, a data storage part 113, and an arranging processing part 114, as shown in FIG. 3. IC to which a capacitor is to be added is retrieved in an objective IC retrieval part 116 in the arranging processing part 114 based on a capacitor addition condition inputted in a bypass capacitor addition condition input part 115 through the input part 111, and the capacitor is automatically added to the IC retrieved in the objective IC retrieval part 116 based on the capacitor addition condition inputted through the input part 111 in a bypass capacitor automatic addition part 117 only by inputting the condition without a manual operation. This prior art is disclosed in the Japanese Unexamined Patent Publication No. 2000-99560, Paragraph Number "0017" and FIG. 1. [0009] A radiation noise prevention printed board arranging and wiring processing system is also provided with an input/output unit 120, an input part 121, an arithmetic processing part 122, a data storage part 123, and an arranging and wiring processing part 124, as shown in FIG. 4. The arranging and wiring processing part 124 is further provided with an electronic component power source pin extraction part 125 for extracting a power source pin of an electronic component, a wiring pattern extraction part 126 for extracting a wiring pattern from the power source pin to a via hole of a power source, the line length of the extracted wiring pattern, a line length and line width inspection part 127 for inspecting the line length and line width of the extracted wiring pattern, a bypass capacitor addition possibility inspection part 128 for inspecting whether or not the addition of the capacitor is possible, a wiring route change possibility inspection part 129 for inspecting whether or not a wiring route capable of a capacitor addition is present in the case that the capacitor can be added in a present wiring route, a wiring route change execution part 130 for changing the wiring route, a bypass capacitor addition execution part 131, and an error display part 132 for performing error display in the case that the capacitor can not be added even when the wiring route is changed. This prior art is disclosed in the Japanese Unexamined Patent Publication No. 2000-35976, Paragraph Number "0009," "0015," and FIG. 1. [0010] However, with the progress of high-density implementation, a case in which an LSI package and the like requiring high-density wiring called BGA (Ball Grid Array) is increased, leading to difficulty in realizing such mounting structure of the capacitors as shown in FIG. 1A, FIG. 1B, FIG. 2A, FIG. 2B, and FIG. 2C. [0011] Additionally, in a case in which a capacitor is automatically added, it is impossible to determine whether or not the structure is best suited because the relationship between the position at which the capacitor is mounted and unnecessary electromagnetic wave radiation control or circuit malfunction prevention is not clearly defined. DISCLOSURE OF THE INVENTION [0012] It is an object of the present invention to provide printed circuit board design supporting technology for automatically checking the arrangement of a capacitor for controlling unnecessary electromagnetic wave radiation and circuit malfunction to promote the optimization of a board layout, while maintaining a design approach and the structure of a conventional board. [0013] More specifically, it is an object of the present invention to provide a printed circuit wiring board design supporting device for automatically checking the arrangement of the capacitor for controlling the unnecessary electromagnetic wave radiation and the circuit malfunction to promote the optimization of the board layout, while maintaining the design approach and the structure of the conventional board. [0014] It is another object of the, present invention to provide a printed circuit board design method for automatically checking the arrangement of a capacitor for controlling unnecessary electromagnetic wave radiation and circuit malfunction to promote the optimization of a board layout, while maintaining a design approach and the structure of a conventional board. [0015] It is still another object of the present invention to provide a program for automatically checking the arrangement of a capacitor for controlling unnecessary electromagnetic wave radiation and circuit malfunction to execute a printed circuit board design method for promoting the optimization of a board layout, while maintaining a design approach and the structure of a conventional board. [0016] A first aspect of the gist of the present invention provides, in order to design a printed circuit board including signal wiring, power planes, and ground planes, a printed circuit wiring board design supporting device comprising a layout data input part for inputting layout data including structure data of said signal wiring, structure data of said power planes, structure data of said ground planes, spacing data between said power planes and said ground planes, and mounting position data of at least one of an active element and a passive element which are mounted on said printed circuit board, a plane structure extraction part for extracting the structure of said power planes and said ground planes, a via hole extraction part for extracting via holes for interconnecting wiring extending at different levels to each other across said power planes and said ground planes, a capacitor extraction part for extracting capacitors connected between said power planes and said ground planes, a measurement part for measuring the distance between said via holes and said capacitors, a distance comparison part for comparing the upper limit of a tolerable distance range between said via holes and said capacitors to measurement distance between said via holes and said capacitors, which is measured by said measurement part, with respect to the spacing between said power planes and said ground planes, and a warning generation part for generating a warning if said measurement distance is larger than the upper limit of said tolerable distance range. [0017] The upper limit of said tolerable distance range, may be displayed as a table, or may be displayed as a mathematical, formula [0018] A second aspect of the gist of the present invention provides, in order to design a printed circuit board including signal wiring, power planes, and ground planes, a printed circuit wiring board design supporting device comprising a layout data input part for inputting layout data including structure data of said signal wiring, structure data of said power planes, structure data of said ground planes, spacing data between said power planes and said ground planes, and mounting position data of at least one of an active element and a passive element which are mounted on said printed circuit board, a plane structure extraction part for extracting the structure of said power planes and said ground planes, a via hole extraction part for extracting via holes for interconnecting wiring extending at different levels to each other across said power planes and said ground planes a capacitor extraction part for extracting capacitors connected between said power planes and said ground planes, a circle creation part for creating a circle with the upper limit of a tolerable distance range between said via holes and said capacitors as a radius centering around said via holes with respect to the spacing between said power planes and said ground planes, a capacitor check part for checking to see if said capacitors are present within said circle, and a warning generation part for generating a warning if the capacitors are riot present within said circle. [0019] A third aspect of the gist of the present invention provides, in order to design a printed circuit board including signal wiring, power planes, and ground planes, a printed circuit wiring board design supporting device comprising a layout data input part for inputting layout data including structure data of said signal wiring, structure data of said power planes, structure data of said ground planes, spacing data between said power planes and said ground planes, and mounting position data of at least one of an active element and a passive element which are mounted on said printed circuit board, a plane structure extraction part for extracting the structure of said power planes and said ground planes, a via hole extraction part for extracting via holes for interconnecting wiring extending at different levels to each other across said power planes and said ground planes, a capacitor extraction part for extracting capacitors connected between said power planes and said ground planes, a circle creation part for creating a circle with the upper limit of a tolerable distance range between said via holes and said capacitors as a radius centering around said via holes with respect to the spacing between said power planes and said ground planes, a capacitor number check part for counting the number of said capacitors within said circle to compare the counted number thereof to the number of capacitors required for the upper limit of the, tolerable distance range, and a warning generation part for generating a warning if the capacitors within said circle do not meet the required number. [0020] A fourth aspect of the gist of the present invention provides, in order to design a printed circuit board including signal wiring, power planes, and ground planes, a printed circuit wiring board design supporting device comprising a layout data input part for inputting layout data including structure data of said signal wiring, structure data of said power planes, structure data of said ground planes, spacing data between said power planes and said ground planes, and mounting position data of at least one of an active element and a passive element which are mounted on said printed circuit board, a plane structure extraction part for extracting the structure of said power planes, and said ground planes, a power source pin extraction part for extracting power source pins for an integrated circuit mounted on said printed circuit board, a capacitor extraction part for extracting capacitors connected between said power planes and said ground planes, a measurement part for measuring tie distance between said power source pins and said capacitors, a distance comparison part for comparing measurement distance between said power source pins and said capacitors, which is measured by said measurement part, to the upper limit of a tolerable distance range between said power source pins and said capacitors with respect to the spacing between said power planes and said ground planes, and a warning generation part for generating a warning if said measurement distance is larger than the upper limit of said tolerable distance range. [0021] The upper limit of said tolerable distance range may be displayed as a table, or may be displayed as a mathematical formula. Continue reading... Full patent description for Printed circuit wiring board designing support device, printed circuit board designing method, and its program Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Printed circuit wiring board designing support device, printed circuit board designing method, and its program patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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