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Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillatorUSPTO Application #: 20070176694Title: Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillator Abstract: Improved voltage controlled oscillator circuits and phase-locked loop circuits are disclosed. For example, a voltage controlled oscillator circuit comprises a first linear amplifier, the first linear amplifier generating a coarse-tuning voltage from an input voltage, a second linear amplifier, the second linear amplifier generating a fine-tuning voltage from the input voltage, and a voltage controlled oscillator comprising a coarse-tuning input coupled to the first linear amplifier, a fine-tuning input coupled to the second linear amplifier, and a clock signal output, wherein a frequency of a signal on the clock signal output is changeable as a function of the input voltage. Such a voltage controlled oscillator circuit may be employed in a phase-locked loop circuit. (end of abstract) Agent: Ryan, Mason & Lewis, LLP - Locust Valley, NY, US Inventors: Woogeun Rhee, Herschel A. Ainspan, Daniel Friedman USPTO Applicaton #: 20070176694 - Class: 331016000 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20070176694. Brief Patent Description - Full Patent Description - Patent Application Claims CROSS-REFERENCE TO RELATED APPLICATION(S) [0001] This application is a continuation of U.S. application Ser. No. 11/113,856 filed on Apr. 25, 2005, the disclosure of which is incorporated herein by reference. FIELD OF THE INVENTION [0002] This present invention generally relates to phase-locked loop circuits and, more particularly, to phase-locked loop circuits using continuously auto-tuned inductor-capacitor voltage controlled oscillators. BACKGROUND OF THE INVENTION [0003] Phase-locked loop circuits are used in both wireless and wireline communication systems, as well as other applications and environments. A phase-locked loop (PLL) based on inductor-capacitor voltage controlled oscillator (LC-VCO) is one way to meet stringent jitter requirements since ring oscillators have inferior noise performance as compared to LC oscillators. [0004] The use of an LC-VCO in application-specific integrated circuits (ASICs), however, is not as widespread as in wireless applications. One of the major reasons is the narrow tuning range of such oscillators, which makes it difficult to achieve a specified PLL lock-in range over process, voltage, and temperature variations in an ASIC environment. Meeting a target frequency range and oscillation conditions in LC-VCO design also heavily relies on accurate model-to-hardware correlation of passive elements, i.e., inductors and varactors. [0005] One way to overcome the tradeoff between low noise and tuning range is to have a multi-band VCO with self-calibration, see, e.g., T.-H. Lin et al., "900-MHz 2.5-mA CMOS Frequency Synthesizer with an Automatic SC Tuning Loop," IEEE Journal of Solid-State Circuits, vol. 36, pp. 424-431, March 2001, and W. Wilson et al., "CMOS Self-calibrating Frequency Synthesizer," IEEE Journal of Solid-State Circuits, vol. 35, pp. 1436-1444, October 2000, the disclosures of which are incorporated by reference herein. [0006] For LC-VCOs, a digitally programmable varactor array 12 is usually employed as shown in FIG. 1. By having multiple coarse-tuning varactors with sufficient frequency overlap, a relatively wide tuning range can be achieved without degrading phase noise performance. One problem of using a band-switching LC-VCO is the possibility of having large gain variation over temperature. Even though center frequency shift over process variation can be calibrated during system initialization (via calibration logic 14), center frequency drift over temperature needs to be accommodated by the PLL without switching bands. Otherwise, the system clock will have an abrupt frequency change during normal operation. [0007] As illustrated in FIG. 2, discrete coarse-tuning curves still require careful VCO design for each band. Large VCO gain variation is harmful for PLL performance unless additional complicated compensation circuits are implemented for VCO gain linearization. SUMMARY OF THE INVENTION [0008] The present invention provides improved voltage controlled oscillator circuits and phase-locked loop circuits. [0009] For example, in one aspect of the invention, a voltage controlled oscillator circuit comprises a first linear amplifier, the first linear amplifier generating a coarse-tuning voltage from an input voltage, a second linear amplifier, the second linear amplifier generating a fine-tuning voltage from the input voltage, and a voltage controlled oscillator comprising a coarse-tuning input coupled to the first linear amplifier, a fine-tuning input coupled to the second linear amplifier, and a clock signal output, wherein a frequency of a signal on the clock signal output is changeable as a function of the input voltage. [0010] The voltage controlled oscillator may further comprise a coarse-tuning varactor coupled to the coarse-tuning input, and a fine-tuning varactor coupled to the fine-tuning input. The voltage controlled oscillator may still further comprise an inductor parallel with the varactors, and transistors coupled to the varactors and the inductor. The first linear amplifier may comprise a lowpass filter. The lowpass filter in the first linear amplifier may comprise at least one capacitor and at least one resistor. The first linear amplifier may comprise a higher gain than the second linear amplifier. [0011] In one embodiment, the voltage controlled oscillator may comprise a differential-input voltage controlled oscillator comprising a differential coarse-tuning varactor and a differential fine-tuning varactor, the first linear amplifier may comprise a differential output, and the second linear amplifier may comprise a differential output. [0012] In another aspect of the invention, a phase-locked loop circuit comprising a dual-input voltage controlled oscillator having a coarse tuning input, a fine tuning input, and a clock signal output, wherein signals on the clock signal output have a changing frequency controlled by input signals, a frequency divider coupled to receive the output of the voltage controlled oscillator and responsive to the output of the voltage controlled oscillator to provide a frequency divided output signal, a phase and frequency detector that compares a reference clock with an output clock of the frequency divider and generates a charge pump control voltage, a charge pump coupled to the phase and frequency detector that generates a loop filter control current from the charge pump control voltage, a loop filter coupled to the charge pump that generates a loop filter voltage from the loop filter control current. The phase-locked loop circuit also comprises a coarse-tuning linear amplifier coupled to the loop filter that generates a voltage controlled oscillator coarse-tuning voltage from the loop filter voltage, and a fine-tuning linear amplifier coupled to the loop filter that generates a voltage controlled oscillator fine-tuning voltage from the loop filter voltage. The phase-locked loop circuit may also comprise a digitally programmable charge pump current, and a charge pump current, the variation of which is inversely proportional to a resistor variation in the loop filter. [0013] In a further aspect of the invention, a voltage controlled oscillator circuit comprises a coarse-tuning linear amplifier, the linear amplifier generating a coarse-tuning voltage from an input voltage; and a voltage controlled oscillator coupled to the coarse-tuning linear amplifier, wherein the voltage controlled oscillator comprises a single coarse-tuning varactor responsive to the coarse-tuning voltage such that a digitally programmable varactor array is not required to provide coarse-tuning of the voltage controlled oscillator circuit. [0014] These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0015] FIG. 1 is a diagram illustrating a band-switching LC-VCO; [0016] FIG. 2 is a diagram illustrating an exemplary tuning curve of a band-switching LC-VCO with different temperatures; [0017] FIG. 3 is a diagram illustrating a phase-locked loop using a continuously auto-tuned LC-VCO in accordance with an illustrative embodiment of the invention; [0018] FIG. 4 is a diagram illustrating a single-input dual-path VCO circuit used for a PLL in accordance with an illustrative embodiment of the invention; [0019] FIG. 5 is a diagram illustrating a linear amplifier circuit used for a PLL in accordance with an illustrative embodiment of the invention; Continue reading... Full patent description for Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillator Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Phase-locked loop using continuously auto-tuned inductor-capacitor voltage controlled oscillator patent application. Patent Applications in related categories: 20080191808 - Layout for a time base - Time base including two oscillators, one of which has a lower frequency than the other, the latter being intermittently set to standby mode, generating according to the same intermittency a first stable time reference (REF) by difference between the frequencies of the two oscillators, a second permanent time reference (RTC) ... ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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