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Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patentsThe following is a sampling of recent Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patent applications (USPTO Patent Application #, Patent Title) sorted by month.
January 2007 - Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patents
20070008863 - Memory comprising a memory device and a write unit configured as a probe 20070011363 - Dual frequency first-in-first-out structure 20070002606 - Multi-context memory cell 20070002618 - Memory element, memory read-out element and memory cell 20070002619 - Bistable multivibrator with non-volatile state storage December 2006 - Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patents
20060290005 - Multi-chip device and method for producing a multi-chip device 20060294443 - On-chip address generation 20060286822 - Multi-chip device and method for producing a multi-chip device 20060278871 - Detecting and improving bond pad connectivity with pad check 20060282714 - Controllable delay device 20060282720 - Method for the automatic provision of repair position data of fuse elements in integrated memory circuit 20060274594 - Implementation of a fusing scheme to allow internal voltage trimming November 2006 - Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patents
20060268616 - Fuse memory cell with improved protection against unauthorized access 20060262613 - Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmitted 20060262614 - Integrated circuit, test system and method for reading out an error datum from the integrated circuit 20060265548 - Method for operating a pmc memory cell and cbram memory circuit 20060259711 - Technique to read special mode register 20060250868 - Electronic component with improved precharging 20060250881 - Memory arrangement having a plurality of ram chips 20060246726 - Making contact with the emitter contact of a semiconductor October 2006 - Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patents
20060242492 - Method and apparatus for masking known fails during memory tests readouts 20060233005 - Device in a memory circuit for definition of waiting times 20060233031 - Synchronous ram memory circuit 20060233037 - Method and apparatus for operating electronic semiconductor chips via signal lines 20060227627 - Buffer component for a memory module, and a memory module and a memory system having such buffer component 20060221555 - Solid electrolyte memory element and method for fabricating such a memory element 20060221663 - Electronic device with a memory cell 20060221690 - Test mode for detecting a floating word line September 2006 - Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies patents
20060208357 - Integrated device and electronic system 20060202317 - Method for mcp packaging for balanced performance 20060203559 - Memory device with customizable configuration 20060203567 - Integrated memory circuit and method for repairing a single bit error 20060205111 - Method for producing chip stacks and chip stacks formed by integrated devices 20060197566 - Dll circuit for providing an output signal with a desired phase shift 20060197567 - Dll circuit for providing an adjustable phase relationship with respect to a periodic input signal 20060198211 - Test system for testing integrated circuits and a method for configuring a test system 20060198231 - Pulse controlled word line driver
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