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  Nonostructure arrays and methods of making sameUSPTO Application #: 20070275499Title: Nonostructure arrays and methods of making same Abstract: A method of making a nanostructure array including disposing a masking material on a nanoporous template such that a first number of the plurality of nanopores are fully coated while a second number of the plurality of nanopores are not-fully coated by the masking material is provided. The method includes forming the nanostructures within the plurality of nanopores that are not-fully coated by the masking material. A nanostructure array fabricated in accordance to above said method and devices based on the nanostructure array is also provided. (end of abstract) Agent: General Electric Company (pcpi) C/o Fletcher Yoder - Houston, TX, US Inventors: Reed Roeder Corderman, Anthony Yu-Chung Ku USPTO Applicaton #: 20070275499 - Class: 438 99 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20070275499. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND [0001]The invention relates generally to nanostructure arrays, and more specifically to nanorod arrays. [0002]Nanotechnology is becoming increasingly important as a basis for the fabrication of various devices. Nanostructures, such as nanorods, nanoparticles, nanowires and nanotubes, may be employed in many integrated circuits. Nanostructure-based devices are generally characterized by dramatically reduced power and mass, while simultaneously having enhanced capabilities. One such device that may employ nanotechnology is a field emitting device which may include a field emitting assembly having a cathode and a nanostructure array. To a large extent, the efficiency of the field emitting device is dependent on the design of the nanostructure array. [0003]Nanostructure arrays may be fabricated through electrodeposition into porous templates. For example, metal nanorods may be formed by electrodeposition in the pores of an anodic aluminum oxide (AAO) template. In these cases, the spacing between the nanorods, or the "pitch" of the nanorods, is determined by the pitch of the pores in the template. The pitch of the pores in the AAO template may depend on the conditions during anodization such as, choice of the electrolytes as well as the voltage applied during anodization. In effect, the pitch of the nanorods may be controlled by varying the conditions under which the pores are formed in the AAO template. However, suitable combinations of electrolyte and voltage for achieving pitch greater than about 1 micrometer are not known. [0004]Accordingly, it may be advantageous to fabricate large area nanostructure arrays with large pitch in a controlled manner. BRIEF DESCRIPTION [0005]In accordance with an embodiment of the present invention, a method of making a nanostructure array is provided. The method includes disposing a masking material on a template comprising a plurality of nanopores such that a first number of the plurality of nanopores are fully coated by the masking material and a second number of the plurality of nanopores are not-fully coated by the masking material. The method further includes forming a plurality of nanostructures in only the second number of the plurality of nanopores. [0006]In another embodiment of the present invention, a method of making a nanostructure array is provided. The method includes providing a template comprising a plurality of nanopores. The method further includes disposing a masking material in only a portion of the plurality of nanopores to form a plurality of masked nanopores and a plurality of unmasked nanopores, wherein a distribution of the plurality of masked nanopores and the plurality of unmasked nanopores is substantially random. The method further includes forming a plurality of nanostructures in the plurality of unmasked nanopores. [0007]In yet another embodiment of the present invention, a method of making a nanostructure array including providing an anodic aluminum oxide template comprising a plurality of nanopores is provided. The method further includes disposing a masking material on the anodic aluminum oxide template to form a plurality of masked nanopores and a plurality of unmasked nanopores, wherein the masking material includes silanes. The method further includes electrodepositing in the plurality of unmasked nanopores to form a plurality of nanostructures comprising a pitch. [0008]According to embodiments of the present invention, a nanostructure array including a substrate supported template having a plurality of nanopores is provided. The nanostructure array further includes a masking material disposed on the template to form a plurality of masked nanopores and a plurality of unmasked nanopores. The nanostructure array further includes a plurality of nanostructures in the plurality of unmasked nanopores. DRAWINGS [0009]These and other features, aspects, and advantages of the present invention will become better understood when the following detailed description is read with reference to the accompanying drawings in which like characters represent like parts throughout the drawings, wherein: [0010]FIGS. 1-3 are perspective views illustrating a process for forming a nanostructure array, in accordance with exemplary embodiments of the present invention; [0011]FIG. 4 is a flow chart illustrating a method of fabricating a nanostructure array in accordance with embodiments of the present invention illustrated in FIGS. 1-3; [0012]FIGS. 5-9 are perspective views illustrating a process for forming a nanostructure array, in accordance with further exemplary embodiments of the present invention; [0013]FIG. 10 is a flow chart illustrating a method of fabricating a nanostructure array, in accordance with embodiments of the present invention illustrated in FIGS. 5-9; and [0014]FIG. 11 is a plot of the pitch as a function of linear distance of the exposed region from the edge of the mask, according to embodiments of the present invention. DETAILED DESCRIPTION [0015]A nanostructure array fabricated on a nanoporous template may have a pitch between each of the nanostructures that may depend on a pitch of the nanopores of the template. In commonly used templates such as, anodic aluminum oxide, the typical pitch of the nanopores is in a range of about 50 nanometer (nm) to about 500 nm. Accordingly, the pitch between each of the nanostructures in the anodic aluminum oxide template may be of similar range as the pitch of the nanopores. For applications involving field emission it is desirable to have a larger pitch. A large pitch between each of the nanostructures may reduce the screening effects due to neighboring nanostructures and may in turn increase the enhancement in the electric field obtained by using a structure with nanometer dimension. Also, it may be desirable to demonstrate a viable method for fabrication of large area nanostructure array. As described further below, embodiments of the present invention provide improved methods for fabricating nanostructure arrays and devices incorporating the same. [0016]A "nanostructure", as used herein, is a structure being of nanometer size in at least one dimension. Exemplary nanostructures include, but are not limited to, nanoparticles, nanotubes, nanorods, nanowires, and the like. Generally, nanometer size is less than about 1 micrometer, and typically nanometer size is less than about 100 nanometers. [0017]Turning now to the figures, FIGS. 1-3 illustrate an exemplary process for fabricating a nanostructure array, according to exemplary embodiments of the present invention. Specifically, FIG. 1 is a perspective view of a template 12 disposed on a substrate 10. The substrate 10 may be a material such as semiconductor, glass, molecular solid, metal, ceramic, polymer, or any combination thereof. Exemplary substrate materials include silicon, silicon carbide, or gallium nitride, for example. In some embodiments, the substrate 10 is substantially smooth. As used herein "substantially smooth" refers to a surface smoothness sufficient to allow for reflection of light off the surface. [0018]Further, the substrate 10 may include sub layers (not shown). Exemplary sub layers may include an adhesive layer to improve the adhesion between the substrate 10 and the overlying template 12. Other exemplary sub layers include a semiconductor layer, a metal layer, or an insulating layer. [0019]As illustrated in FIG. 1, the template 12 may include a plurality of nanopores 14. As used herein, "nanopores" refers to pores, having a pore diameter of less than about one micrometer. As used herein, the "template" 12 including the plurality of nanopores 14 is also referred to as a "nanoporous template". [0020]In one embodiment, the template 12 is of anodized aluminum oxide. Exemplary nanoporous template materials include, but are not limited to, titanium oxide, porous silicon, nanoporous glass, track etched mica, track etched polyester, track etched polycarbonate, track etched polymer materials, or any combination thereof. Continue reading... Full patent description for Nonostructure arrays and methods of making same Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Nonostructure arrays and methods of making same patent application. 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