Multiple channel modules and bus systems using same

Title: Multiple channel modules and bus systems using same

Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20070120575, Multiple channel modules and bus systems using same.

1. A bus system comprising: a motherboard including motherboard connectors and bus segments electrically coupling the motherboard connectors; and a plurality of modules arranged from a first module to a last module, wherein each of the plurality of modules includes a bus having a first channel and a second channel, the first channel connecting a first set of input finger connectors proximate to a first end to a first set of output finger connectors proximate to the first end and the second channel connecting a second set of input finger connectors proximate to the first end to a second set of output finger connectors proximate to the first end, the bus electrically coupled to one of the motherboard connectors, wherein each of the modules is mechanically coupled to one of the motherboard connectors.

2. The bus system of claim 1, wherein each of the modules further comprises at least one first IC connected to the first channel and at least one second IC connected to the second channel.

3. The bus system of claim 2, wherein the bus segments of the motherboard electrically connect the first set of output finger connectors of the first module to the first set of input finger connectors of a second module of the plurality of modules and the second set of output finger connectors of the first module to the second set of input finger connectors of the second module.

4. The bus system of claim 3, wherein the bus segments of the motherboard electrically connect the first set of output finger connectors of the last module to a first bus termination and the second set of output finger connectors of the last module to a second bus termination.

5. The bus system of claim 2, wherein, within each of the modules, the first channel and the second channel allow simultaneous independent access to the at least one first IC and the at least one second IC.

6. A module comprising: a first printed circuit board having first and second primary surfaces and having a first end and a second end; at least one first integrated circuit (IC) populating at least one of the first and second primary surfaces; a set of finger connectors disposed on the first printed circuit board proximate to the first end; a first bus segment disposed on the first printed circuit board and coupled to the set of finger connectors and the at least one first IC; a conductive interconnect having a second bus segment, the conductive interconnect connected to the first printed circuit board proximate to the second end and adapted to mechanically connect to a second printed circuit board, the second bus segment electrically coupled to the first bus segment and capable of being electrically coupled to a third bus segment disposed on the second printed circuit board; and a bus comprising at least the first and second bus segments.

7. The module of claim 6, further comprising the second printed circuit board having the third bus segment disposed thereon, wherein the conductive interconnect is mechanically connected to the second printed circuit board and the third bus segment is electrically coupled to the second bus segment.

8. The module of claim 7, further comprising a connector electrically and mechanically connecting the conductive interconnect to the second printed circuit board.

9. The module of claim 8, wherein the conductive interconnect has a first edge and a second edge opposite the first edge, the first printed circuit board being connected to the conductive interconnect at the first edge, the connector being connected to the conductive interconnect at the second edge.

10. The module of claim 9, further comprising at least one second IC disposed on the second printed circuit board.

11. The module of claim 10, wherein the at least one second IC is coupled to the third bus segment.

12. The module of claim 11, wherein the third bus segment is terminated with a first bus termination.

13. The module of claim 11, wherein the bus further comprises the third bus segments.

14. The module of claim 13, wherein the bus includes a first channel and a second channel, the first channel terminated with the first bus termination and the second channel terminated with a second bus termination.

15. The module of claim 10, wherein the bus substantially traverses the first printed circuit board between the first and second ends.

16. The module of claim 10, wherein the bus comprises a first channel and a second channel and the set of finger connectors comprises a first set of finger connectors and a second set of finger connectors, the first channel coupled to the first set of finger connectors and the second channel coupled to the second set of finger connectors, the first channel and the second channel allowing simultaneous independent access to the at least one first IC and the at least one second IC.

17. The module of claim 8, wherein the second printed circuit board is removably engaged with the connector.

18. The module of claim 7, further comprising a spacer adapted to maintain the first and second printed circuit boards in substantially parallel, spaced apart relation to one another.

19. The module of claim 18, wherein the spacer is attached to one of the first and second primary surfaces of the first printed circuit board proximate to the second end.

20. The module of claim 8, wherein the connector is oriented to maintain the second printed circuit board substantially parallel to at least one of the first and second primary surfaces of the first printed circuit board.

21. The module of claim 6, wherein the conductive interconnect is flexible.

22. The module of claim 21, wherein the conductive interconnect is a flex circuit.

23. The module of claim 10, wherein the at least first IC is a plurality of first ICs and the at least one second IC is a plurality of second ICs.

24. The module of claim 23, wherein each of the first and second ICs are memory devices.

25. A bus system comprising: a motherboard including a motherboard connector and a first bus segment electrically coupled to the motherboard connector; and a module comprising: a first printed circuit board having first and second primary surfaces and having a first end and a second end; a set of finger connectors disposed on the first printed circuit board proximate to the first end, the finger connectors electrically connected to the motherboard connector; at least one first integrated circuit (IC) disposed on the first printed circuit board; a second bus segment disposed on the first printed circuit board and coupled to the set of finger connectors and the at least one first IC; and a conductive interconnect having a third bus segment, the conductive interconnect connected to the first printed circuit board proximate to the second end and adapted to mechanically connect to a second printed circuit board, the third bus segment electrically coupled to the second bus segment and capable of being electrically coupled to a fourth bus segment disposed on the second printed circuit board.

26. The bus system of claim 25, wherein the module is mechanically connected to the motherboard connector.

27. The bus system of claim 26, wherein the module further comprises the second printed circuit board having the fourth bus segment disposed thereon, wherein the conductive interconnect is mechanically connected to the second printed circuit board and the fourth bus segment is electrically coupled to the third bus segment.

28. The bus system of claim 27, further comprising a connector electrically and mechanically connecting the conductive interconnect to the second printed circuit board.

29. The bus system of claim 27, wherein the module further comprises at least one second IC disposed on the second printed circuit board and coupled to the fourth bus segment.

30. The bus system of claim 29, wherein the second printed circuit board is removably engaged with the connector.

31. The bus system of claim 27, wherein the fourth bus segment is terminated with a first bus termination.

32. The bus system of claim 27, wherein the first, second, third and fourth bus segments form a bus.

33. The bus system of claim 32, wherein the bus includes a first channel and a second channel, the first channel terminated with the first bus termination and the second channel terminated with a second bus termination.

34. The bus system of claim 33, wherein the first and second channel allow simultaneous independent access to the at least one first IC and the at least one second IC.

35. The bus system of claim 25, wherein conductive interconnect is flexible.

36. The bus system of claim 25, wherein the at least first IC is a plurality of first ICs and the at least one second IC is a plurality of second ICs.

37. The bus system of claim 36, wherein each of the first and second ICs are memory devices.

38. The bus system of claim 27, wherein the second printed circuit board has a set of printed circuit board finger connectors, wherein the set of printed circuit board finger connectors and the set of finger connectors are adapted to alternatively engage the motherboard connector.

39. A bus system comprising: a motherboard including motherboard connectors and bus segments electrically coupling the motherboard connectors; a first module including a first ingress connector, a first egress connector, a first integrated circuit (IC), and a first channel, the first channel coupled to the first ingress connector, the first egress connector, and the first IC; a second module including a second ingress connector, a second egress connector, a second IC, and a second channel, the second channel coupled to the second ingress connector, the second egress connector, and the second IC; and a termination module including a first channel terminator and a second channel terminator, the first channel terminator coupled to the first channel of the first module through a first set of the motherboard connectors and the second channel terminator coupled to the second channel of the second module through a second set of the motherboard connectors.

40. The bus system of claim 39, wherein the first and second ICs are memory devices.

41. The bus system of claim 40, wherein the first channel and the second channel allow simultaneous independent access to the first memory device and the second memory device.

42. The bus system of claim 39, wherein the termination module further includes a third IC coupled to the first channel.

43. The bus system of claim 42, wherein the third IC is a memory device.

44. The bus system of claim 39, wherein the bus segments of the motherboard electrically connect the first egress connector to the first channel terminator and the second egress connector to the second channel terminator.

45. A bus system comprising: a motherboard including motherboard connectors and bus segments electrically coupling the motherboard connectors, the motherboard connectors including a first ingress connector for a first module slot, a first egress connector for the first module slot, a second ingress connector for a second module slot, a second egress connector for the second module slot, a third ingress connector for a third module slot, and a fourth ingress connector for the third module slot, and the bus segments including a first bus segment coupled to the first ingress connector, a second bus segment routed so as to occupy a region of the motherboard located between the first ingress connector and the first egress connector and coupled to the second ingress connector.

46. The bus system of claim 45, wherein the bus segments further comprise a third bus segment coupling the first egress connector to the third ingress connector and a fourth bus segment coupling the second egress connector to the fourth ingress connector.

47. The bus system of claim 46, wherein the first bus segment and the third bus segment are electrically connected by a first module connected to the first ingress connector and the first egress connector and the second bus segment and the fourth bus segment are electrically connected by a second module connected to the second ingress connector and the second egress connector.

48. A bus system comprising: a motherboard including motherboard connectors and bus segments electrically coupling the motherboard connectors; a first module including a first ingress connector, a first egress connector, a second ingress connector, and a first terminator, wherein the first ingress connector is electrically coupled to the first egress connector and the second ingress connector is electrically coupled to the first terminator; a second module including a third ingress connector, a second egress connector, a fourth ingress connector, and a second terminator, wherein the third ingress connector is electrically coupled to the second egress connector and the fourth ingress connector is electrically coupled to the second terminator; and wherein the first ingress connector, the first egress connector, the second ingress connector, the second egress connector, the third ingress connector, and the fourth ingress connector are coupled to the motherboard connectors and wherein a first set of the bus segments couple the first egress connector to the fourth ingress connector and a second set of the bus segments couple the second egress connector to the second ingress connector, thereby providing a first channel coupling the first ingress connector, the first egress connector, the fourth ingress connector, and the second terminator and a second channel coupling the third ingress connector, the second egress connector, the second ingress connector, and the first terminator.

49. The bus system of claim 48, wherein the first channel is coupled to a first integrated circuit (IC) of the first module and the second channel is coupled to a second IC of the second module, the first channel and the second channel allowing simultaneous independent access to the first IC and the second IC.

50. The bus system of claim 49, wherein the first and second ICs are memory devices.

51. The bus system of claim 50, wherein the first channel is further coupled to a third IC of the second module and the second channel is further coupled to a fourth IC of the first module.

52. The bus system of claim 51, wherein the third and fourth ICs are memory devices.

53. The bus system of claim 48, wherein the first channel is coupled to a first memory device of the second module and the second channel is coupled to a second memory device of the first module, the first channel and the second channel allowing simultaneous independent access to the first memory device and the second memory device.

54. The bus system of claim 48, further comprising a third module coupled to first channel and the second channel via the motherboard connectors.

55. The bus system of claim 48, wherein the first module further includes a first IC coupled to the first channel, and the second module includes a second IC coupled to the second channel.

56. The bus system of claim 55, wherein the first module further includes a third IC coupled to the second channel and the second module further includes a fourth IC coupled to the first channel.

57. The bus system of claim 56, wherein the first, second, third and fourth ICs are memory devices.

58. The bus system of claim 56, further comprising a first request channel coupled to the first memory device and the third memory device and a second request channel coupled to the second memory device and the fourth memory device.

59. The bus system of claim 48, wherein the bus segments further couple additional ingress connectors and additional egress connectors on the first module and the second module to provide a third channel and a fourth channel.

60. The bus system of claim 59, wherein the first channel, the second channel, the third channel, and the fourth channel allow simultaneous independent access to a plurality of ICs including a first IC of the first module and a second IC of the second module.

61. A module comprising: a printed circuit board; a first set of integrated circuits (ICs) mounted on the printed circuit board; a second set of ICs mounted on the printed circuit board; a first input connector disposed on the printed circuit board; and a first ingress bus coupled to the first input connector, the first ingress bus split into a first path and a second path, the first path coupled to the first set of ICs and the second path coupled to the second set of ICs, the first ingress bus having a first characteristic impedance and the first path and the second path having a combined effective impedance substantially equal to the first characteristic impedance.

62. The module of claim 61, wherein the first path is coupled to a first terminator and the second path is coupled to a second terminator.

63. The module of claim 61, wherein the module further comprises: a first output connector disposed on the printed circuit board; and a first egress bus coupled to the first output connector, the first path and the second path merged into the first egress bus, the first egress bus having a second characteristic impedance substantially equal to the first characteristic impedance.

Brief Patent Description - Full Patent Description - Patent Claims

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