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  Multilevel phase-change memory element and operating methodUSPTO Application #: 20070249083Title: Multilevel phase-change memory element and operating method Abstract: A multilevel phase-change memory, operating method and manufacturing method thereof. The phase-change memory includes two phase-change layers and electrodes, which are configured in a parallel structure to form a memory cell. A voltage-drive mode is employed to control and drive the memory such that multilevel memory states may be achieved by imposing different voltage levels. The provided multilevel phase-change memory has more bits and higher capacity than that of the memory with a single phase-change layer. (end of abstract) Agent: Rabin & Berdo, PC - Washington, DC, US Inventors: Chien-Ming Li, Wen-Han Wang, Kuei-Hung Shen USPTO Applicaton #: 20070249083 - Class: 438054000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Making Device Or Circuit Responsive To Nonelectrical Signal, Thermally Responsive The Patent Description & Claims data below is from USPTO Patent Application 20070249083. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application claims the benefit of Taiwan Patent Application No. 93130600, filed on Oct. 8, 2004, which is hereby incorporated by reference for all purposes as if fully set forth herein. BACKGROUND OF THE INVENTION [0002] 1. Field of Invention [0003] The invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device with a multi-level memory state. [0004] 2. Related Art [0005] Memory is widely used in general electric devices. Most are DRAM, SRAM, or Flash memory. Application and architecture of electric devices determine the usage of the memory and the required capacity. Development of memory technology, such as FeRAM, MRAM and phase change memory is ongoing. [0006] Phase change semiconductor memory stores data through resistance variation caused by phase change of materials. Regarding the phase materials, in the 1960s, S. R. Ovshinsky of the U.S. company ECD discovered that crystallization and amorphization of chalcogenide has a distinct difference in optics and electrical conductivity. It is capable of fast reversible transformation and has switching/memory application. [0007] Phase change memory is called a semiconductor memory because chalcogenide belongs to the VIA group in the Periodic Table Of Elements, and is a semiconductive material between metals and nonmetals. Adding some elements is required for specific purposes in practical use, for example, increasing amorphization/crystallization speed, or crystallization characteristics. [0008] Phase change memories meet the need for large and fast storage operations and long storage time. It has the advantages of small volume, more storage data, and fast operation speed, and may store data more than ten years under 130.degree. C. Therefore, phase change memory is a non-volatile memory with great potential, having high read/write speed, high integrity, long endurance, low power consumption, and radioresistance. Main technology trends focuses on higher record density and low power consumption through reducing memory cells. [0009] However, besides increasing the memory density by reducing the area, multi-level/multi-state memory is another consideration. Thus, a single memory cell may have more than two memory states in the condition of not changing the component size. [0010] In the related art, Tyler Lowrey (Ovonyx Inc.) provides a multi-state structure in a published company technology document. A memory cell with a single phase change layer is employed to obtain multi levels with different resistant values by controlling the reset current. However, the solution may have the problem of small current separation such that writing error occurs due to the current offset. [0011] Also, U.S. Pat. No. 6,635,914 discloses a four level memory cell that belongs to the category of Programmable Metallization Cell Memory (PMCm). The cell is composed of a solid electrolyte layer and two electrodes. The conductivity of the solid electrolyte layer is changed by delivering an electrical field by the electrodes. [0012] Phase change memory, MRAM, and FRAM are the main memory technology trends, which have the advantages of being non-volatile, high speed (close to the operation speed of DRAM and SRAM), large capacity, high integrity, high environment endurance, long storage time, etc. Furthermore, operation voltage is decreasing gradually. These memories may substitute Flash memory in the near future. Therefore, there is an urgent need for a new phase change memory structure. SUMMARY OF THE INVENTION [0013] Accordingly, the invention relates to a multilevel phase-change memory, its manufacture method and its operating method that substantially solves the problems of the related art. [0014] An object of the invention is to provide a multilevel phase-change memory, its manufacture method and its operating method having four memory states through one single memory cell. [0015] Another object of the invention is to provide a multilevel phase-change memory, its manufacture method and its operating method, in which the memory cell is configured by two independent phase change units formed in parallel in order to obtain a memory cell with high density. The materials of the phase change units may be the same or different. [0016] Additional features and advantages of the invention will be set forth in the following description, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure explained in the written description and claims hereof as well as the appended drawings. [0017] To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a phase change memory includes a first phase change layer having a crystalline state and an amorphous state; a second phase change layer having a crystalline state and an amorphous state; a first top electrode and a second top electrode formed on one surface of the first phase change layer and the second phase change layer respectively for delivering electrical signals to change the states of the first phase change layer and the second phase change layer; and at least one bottom electrode formed on another surface of the first phase change layer and the second phase change layer. [0018] According to the object of the invention, the phase change memory has the advantage of multilevel memory states in one single cell. [0019] According to the object of the invention, the phase change memory has the advantage of definite reading separation for the multilevel memory states. [0020] According to the object of the invention, the phase change memory has the advantage of transferring the memory state thorough one or two operation steps. [0021] Further scope of applicability of the invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating embodiments of the invention, are given by way of illustration only and are intended to provide further explanation of the invention as claimed, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. BRIEF DESCRIPTION OF THE DRAWINGS Continue reading... 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