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Multichip packages with exposed diceRelated Patent Categories: Semiconductor Device Manufacturing: Process, Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor, Assembly Of Plural Semiconductive Substrates Each Possessing Electrical Device, Flip-chip-type AssemblyMultichip packages with exposed dice description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070037320, Multichip packages with exposed dice. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of U.S. patent application Ser. No. 10/890,896, filed on Jul. 13, 2004, which is a divisional of U.S. Pat. No. 6,936,929, filed on Mar. 17, 2003, both of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates generally to semiconductor packaging and more specifically to multichip semiconductor packaging. [0004] 2. Description of the Related Art [0005] In an effort to produce smaller and lighter electrical devices there is a continuing effort to reduce the size of semiconductor components. Stacking multiple chips into a single package is one technique for reducing the footprint required for semiconductor devices. [0006] There are several methods of designing a stacked package. FIG. 1 is a diagrammatic cross sectional view of a common multichip package 100. Two dice 105 and 110 are each electrically connected to a substrate 115 via wire bonding 120 and 125. Each die 105 and 110 has an exclusive electrical link to the substrate 115. The multichip package 100 is arranged as a ball grid array ("BGA"), a type of package in which the input and output points are solder bumps arranged in a grid pattern. [0007] FIG. 2 is a diagrammatic cross sectional view of another multichip package 200. A daughter die 205 is directly connected to a mother die 210 via wire bonding 215. Both the daughter die 205 and the mother die 210 are also connected directly to the substrate 220 via wire bonding 225 and 230. [0008] Although the described packages work well in many applications, there are continuing efforts to further improve multichip packages. SUMMARY OF THE INVENTION [0009] The present invention provides a multichip assembly that has a flipchip, a mother die, contacts and an encapsulant. The face of the mother die is adapted to receive the face of the flipchip such that the flipchip is in direct electrical contact with the mother die. The mother die is in electrical contact with the contacts, which are used to connect the dice with components external to the package. The encapsulant is formed around the flipchip, mother die, and contacts such that the contacts are partially exposed and the back of the flipchip is partially exposed. Ensuring that the height of the encapsulant does not exceed the flipchip is one way of exposing the back of the flipchip. [0010] In another aspect, the multichip assembly is characterized as a quad flat packs--no lead package, whereby the contacts were from a leadless leadframe panel. [0011] In another aspect, a multichip assembly includes a chip stack, contacts and an encapsulant. The chip stack (a mother die electrically connected to a daughter die) is in electrical contact with the contacts and the encapsulant partially encapsulates them both. Typically, the partially exposed portion of the chip stack is either the bottom of the chip stack (usually the back of the mother die), the top of the chip stack (usually the back of the daughter die) or both. [0012] In a method aspect of the invention, the multichip assembly is created by first providing a semiconductor wafer that has an array of mother dice. Then, flipchips are electrically connected to the wafer. Next, the wafer is singulated to create individual chip stacks. The chip stacks are then electrically connected to contacts on a leadframe panel. Next, encapsulant is added to the chip stack and leadframe panel such that encapsulant does exceed the height of the chip stack. Finally the encapsulated chip stack and leadframe panel is singulated to create individual multichip assemblies. BRIEF DESCRIPTION OF THE DRAWINGS [0013] The invention may best be understood by reference to the following description taken in conjunction with the accompanying drawings in which: [0014] FIG. 1 is a diagrammatic cross sectional view of a prior art multichip package that allows both chips to have exclusive electrical connections to a BGA; [0015] FIG. 2 is a diagrammatic cross sectional view of a prior art multichip package that allows a daughter die to be directly connected to a mother die in addition to both dice being connected to the BGA; [0016] FIG. 3 is a diagrammatic plan view of a semiconductor wafer containing an array of flipchips; [0017] FIG. 4 is a diagrammatic plan view of a semiconductor wafer illustrated in FIG. 3 after singulation; [0018] FIG. 5 is a diagrammatic plan view of a semiconductor wafer that can be used as a substrate for the singulated flipchips of FIG. 4; [0019] FIG. 6 is a diagrammatic plan view of the semiconductor wafer of FIG. 5 after attachment of the singulated flipchips of FIG. 4; [0020] FIG. 7A is a diagrammatic cross sectional view of the wafer of FIG. 6; Continue reading about Multichip packages with exposed dice... Full patent description for Multichip packages with exposed dice Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Multichip packages with exposed dice patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Multichip packages with exposed dice or other areas of interest. ### Previous Patent Application: Method and device for attaching a chip in a housing Next Patent Application: Semiconductor package with contact support layer and method to produce the package Industry Class: Semiconductor device manufacturing: process ### FreshPatents.com Support Thank you for viewing the Multichip packages with exposed dice patent info. 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