Miscellaneous active electrical nonlinear devices, circuits, and systems patents - Monitor Patents
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Miscellaneous active electrical nonlinear devices, circuits, and systems

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
09/04/2014 > 21 patent applications in 17 patent subcategories.

20140247071 - Architecture for vbus pulsing in udsm processes: Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might... Agent: Texas Instruments Incorporated

20140247070 - Semiconductor device: Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140247074 - Clock generation circuit, processor system using same, and clock frequency control method: A microcomputer includes a register that stores division ratio setting information, a frequency divider that determines first and second division ratios based on the division ratio setting information, frequency-divides a first clock having a first frequency at the first division ratio, and frequency-divides a second clock having a second frequency... Agent: Renesas Electronics Corporation

20140247072 - Correction circuit and real-time clock circuit: The present invention provides a correction circuit. The correction circuit includes a frequency dividing circuit, a frequency dividing coefficient operation circuit, a built-in temperature collection circuit, and a power-on and power-off detection circuit. The built-in temperature collection circuit is configured to collect a temperature of the chip; the power-on and... Agent: Huawei Technologies Co., Ltd.

20140247073 - M-ary sequence clock spreading: The invention concerns a device for providing a spread frequency clock signal, comprising: -an input (51) to receive a first clock signal having a first frequency; -a programmable clock divider (52) to generate the spread frequency clock signal from the first clock signal; -a first Feedback Shift Register (21), FSR,... Agent:

20140247075 - Interface circuit for signal transmission: An interface circuit for signal transmission includes an amplifying circuit, a de-skew circuit and a latching unit. The amplifying circuit receives an input clock signal and outputs an output clock signal after amplifying the input clock signal. The de-skew circuit receives the output clock signal and outputs a de-skew clock... Agent: Novatek Microelectronics Corp.

20140247076 - Aligning multiple chip input signals using digital phase lock loops: This disclosure describes methods and techniques using Digital Phase Lock Loops (DPLLs) within a source chip to automatically phase align a plurality of signals at a plurality of pins on a plurality of target chips of varying distances and corresponding delays from the source chip by using each transmitted signal's... Agent:

20140247077 - Semiconductor circuit: Provided is a semiconductor circuit. The semiconductor circuit includes a pulse generator which is enabled by a rising edge of a clock signal and generates a read pulse which varies depending on a voltage of a feedback node; and a sense amplifier which generates a voltage of a dynamic node... Agent:

20140247078 - Apparatus for programmable insertion delay to delay chain-based time to digital circuits: An apparatus for delaying a plurality of chain-based time-to-digital circuits (TDCs). The apparatus includes a plurality of propagation path devices each connected to a respective one of the plurality of TDCs, each propagation path device delays a common start signal by a selectable amount based on a delay selection signal... Agent: Kabushiki Kaisha Toshiba

20140247079 - Pulse generator circuit: A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in... Agent:

20140247080 - Multi-level clock signal distribution network and integrated circuit: A multi-level clock signal distribution network comprises a plurality of lower network levels comprising at least a first lower network level and a lowermost network level that is connected to one or more lowermost clock signal driving circuits connectable to receive a clock signal; and a topmost network level arranged... Agent: Freescale Semiconductor, Inc.

20140247081 - Combinatorial circuit and method of operation of such a combinatorial circuit: An integrated level shifting combinatorial circuit receives a plurality of input signals in a first voltage domain and performs a combinatorial operation to generate an output signal in a second voltage domain. The circuit includes combinatorial circuitry includes first and second combinatorial circuit portions operating in respective first and second... Agent:

20140247082 - Fast voltage level shifter circuit: A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing... Agent: Solaredge Technologies, Ltd.

20140247083 - Receiving device: A receiving device includes a dividing circuit, N pieces of internal circuits, and an averaging circuit. The dividing circuit is configured to divide an input signal into N pieces of divided signals (where N is an integer of two or larger), and the N pieces of internal circuits are configured... Agent: Fujitsu Limited

20140247084 - Specifications support enablement: Several circuits and methods that may be implemented to enable specification support of a plurality of interface components in an IC are disclosed. In an embodiment, a circuit includes a plurality of multiplexer circuits and a control circuit. The plurality of multiplexer circuits are configured to provide a plurality of... Agent: Texas Instruments Incorporated

20140247085 - Controller for load circuit: Two semiconductor switches are arranged in parallel in a load circuit for connecting a power source with a load. Further, the semiconductor switches are controlled so as to be alternately tuned on and off. As a result, since a current flows through only either of the semiconductor switches, an offset... Agent: Yazaki Corporation

20140247086 - System and method for operating low power circuits at high temperatures: A system includes first circuitry including first elements for operating in a low power mode; second circuitry including second elements for operating in a high-temperature mode; and one or more switching elements for selecting between the low power mode and the high temperature mode..... Agent:

20140247087 - Current control for output device biasing stage: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher... Agent: Dialog Semiconductor Gmbh

20140247088 - Minimizing power consumption in asynchronous dataflow architectures: A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more... Agent: Raytheon Company

20140247089 - Two stage source-follower based filter: A filter, comprising: two source-follower stages connected in series and in between input nodes and output nodes, wherein inner nodes connect the two stages; and a frequency dependent feedback circuit connected between the input and output nodes, wherein the filter comprises additional frequency dependent feedback circuits connected between input nodes... Agent: Imec Vzw

20140247090 - Resonant impedance sensing based on controlled negative impedance: Resonant impedance sensing with a resonant sensor (such as LC) is based on generating a controlled negative impedance to maintain steady-state oscillation in response to changes in resonance state caused by interaction with a target. Resonant impedance sensing can include: (a) generating a controlled negative impedance at the sensor; (b)... Agent:

  
08/28/2014 > 36 patent applications in 31 patent subcategories.

20140240003 - Phase lock loop lock indicator: A lock-on detection circuit for a phase-locked loop includes circuitry configured to receive first up and down outputs and second up and down outputs from one or more phase detectors and to determine from the first up and down outputs and the second up and down outputs how well the... Agent:

20140240004 - Phase disciplined, direct digital synthesizer based, coherent signal generator: A phase coherent signal generator apparatus is disclosed that has fast frequency shifting and numerous phase memory points, outputting a coherent continuous phase signal that includes fast switched multiple different frequency bursts. The apparatus comprises: a clock generator including an input that receives a reference clock signal, an output that... Agent:

20140240007 - Drive circuit for power transistor: A turn-on drive circuit for a power transistor comprising a first circuit comprising a resistor and capacitor in parallel and a second circuit comprising a resistor, the second circuit being in series in the drive path with the first circuit. A turn-off drive circuit for a power transistor comprising a... Agent: Control Techniques Limited

20140240006 - Energy delivery system and method for a gate drive unit controlling a thyristor-based valve: The invention concerns energy delivery system and method for a gate drive unit controlling a thyristor-based valve (19). The system comprises at least one current transformer (22) located in the main current path of the valve.... Agent: Alstom Technology Ltd

20140240005 - Pre-charge circuit with reduced process dependence: A pre-charging circuit, such as can be used to pre-charge a data bus, is presented that is largely process independent. A push-pull type of arrangement is used, where the output of the pre-charge circuit is initially connected to a supply level through one transistor, then connect to ground by another... Agent: Sandisk Technologies Inc.

20140240008 - Output driver for energy recovery from inductor based sensor: A system for recovering energy from a sensor couples a battery to an inductive device in the sensor for a period of time, such that a current flows through the inductive device from the battery during the time period. The connections of the inductive device are then reversed for a... Agent: Texas Instruments Deutscland Gmbh

20140240010 - Clock circuit for a microprocessor: A mobile communication device includes an analog clock and a digital clock circuit. The analog clock circuit is configured to generate an oscillating output. The digital clock circuit is configured to generate a digital clock output having a frequency that is substantially equal to the frequency of the oscillating output.... Agent: Blackberry Limited

20140240009 - State machine for low-noise clocking of high frequency clock: Methods, apparatus, and fabrication techniques relating to management of noise arising from capacitance in a clock tree of an integrated circuit. In some embodiments, the methods comprise receiving a signal to adjust a clock having a first rate to a second rate; and ramping, in response to receiving the signal,... Agent: Advanced Micro Devices, Inc.

20140240011 - Method and arrangement for generating a clock signal by means of a phase locked loop: A method and an arrangement for generating a clock signal by a phase locked loop in which the time for adjusting to a prescribed frequency and phase of a clock signal is reduced by virtue of the fact that a plurality of selection signals respectively shifted by a time difference... Agent: Technische Universitaet Dresden

20140240012 - Reference clock compensation for fractional-n phase lock loops (plls): In one embodiment, a method includes determining a phase difference between a reference clock and a feedback clock in even and odd cycles for a phase lock loop (PLL). The even and odd cycles are alternating clock periods. A delta value based on the phase difference is determined. The method... Agent: Marvell World Trade Ltd.

20140240013 - Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path: Apparatuses and methods for compensating for differing power supply sensitivities of a circuit in a clock path. One such method includes altering signal timing of at least one of reference and feedback clock signals differently according to variations in power supply voltage to compensate for differences in delay power supply... Agent: Micron Technology, Inc

20140240014 - Semiconductor integrated circuit: In a system in which the phases of a data clock signal and a data signal differ between at an input and at an output, a semiconductor integrated circuit performs a simple BER test without using external equipment and, at the same time, performs a jitter evaluation required for a... Agent: Kabushiki Kaisha Toshiba

20140240015 - Semiconductor device: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and... Agent: Kabushiki Kaisha Toshiba

20140240016 - Low clock energy double-edge-triggered flip-flop circuit: A double-edge-triggered flip-flop circuit and a method for operating the double-edge-trigger flip-flop circuit are provided. Sub-circuits of a flip-flop circuit are coupled to a ground supply and decoupled the sub-circuits from a power supply when a clock signal is asserted. The sub-circuits generate trigger signals including a first pair of... Agent: Nvidia Corporation

20140240017 - Master-slave flip-flop with low power consumption: In a master-slave flip-flop, the master latch has first and second three-state stages, and a first feedback stage. The slave latch has third and fourth three-state stages, and a second feedback stage. First and second clock switches having opposite phases are provided. The first clock switch is configured in one... Agent:

20140240018 - Current mode logic latch: A current mode logic latch may include a sample stage and a hold stage, the hold stage comprising first and second stage transistors, first and second hold stage current sources, and a hold stage switch. The first hold stage transistor may be coupled at its drain terminal to the drain... Agent: Fujitsu Limited

20140240019 - Current mode logic latch: The second hold stage transistor may be coupled at its drain terminal to the drain terminal of a second sample stage transistor, coupled at its gate terminal to the drain terminal of the first hold stage transistor, and coupled at its drain terminal to a gate terminal of the first... Agent: Fujitsu Limited

20140240020 - Configurable time delays for equalizing pulse width modulation timing: A plurality of PWM generators have user configurable time delay circuits for each PWM control signal generated therefrom. The time delay circuits are adjusted so that each of the PWM control signals arrive at their associated power transistors at the same time. This may be accomplished by determining a maximum... Agent: Microchip Technology Incorporated

20140240021 - Setting switch size and transition pattern in a resonant clock distribution system: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode... Agent: International Business Machines Corporation

20140240022 - Charge measurement: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference... Agent: Atmel Corporation

20140240023 - Super delta monopulse beamformer: An improved approach to direction finding using a super delta monopulse beamformer is disclosed. A super delta channel signal that includes direction finding information from two circular delta channels is formed and output by the super delta monopulse beamformer. This super delta channel signal uses only two channels, but is... Agent: The Aerospace Corporation

20140240024 - Method and apparatus for predictive switching: A method and apparatus for predictive switching an output have been disclosed.... Agent:

20140240025 - Lateral insulated gate turn-off devices: A lateral insulated gate turn-off (IGTO) device includes an n-type layer, a p-well formed in the n-type layer, a shallow n+ type region formed in the well, a shallow p+ type region formed in the well, a cathode electrode shorting the n+ type region to the p+ type region, at... Agent: Pakal Technologies, LLC

20140240026 - Method and apparatus for controlling a gate voltage in high electron mobility transistor: According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the... Agent: Samsung Electronics Co., Ltd.

20140240027 - Vertical insulated-gate turn-off device having a planar gate: An insulated gate turn-off (IGTO) device has a layered structure including a p+ layer (e.g., a substrate), an n-type layer, a p-type layer (which may be a p-well), n+ regions formed in the surface of the p-type layer, and insulated planar gates over the p-type layer between the n+ regions.... Agent: Pakal Technologies, LLC

20140240028 - High voltage switching circuits: The preferred embodiments of the present invention use low voltage transistors to support high voltage switching circuits by connecting low voltage circuits in a stacking configuration. High voltage switching signals are divided into a plurality of small amplitude switching signals before sending into transformers, filters or other circuits. The resulting... Agent:

20140240029 - Bridge switch control circuit and method of operating the same: A method of operating a bridge switch control circuit is disclosed for controlling at least one pair of complementary switches. First, a first driving signal, a second driving signal, a first latching signal, and a second latching signal are provided. The first driving signal and the second driving signal drive... Agent: Delta Electronics, Inc.

20140240030 - Semiconductor switch circuit: A semiconductor switch circuit includes first semiconductor switch units and second semiconductor switch units. The first semiconductor switch units each have a first threshold and two first ends. One first end is connected to a common terminal. The second semiconductor switch units each have a second threshold and two second... Agent:

20140240031 - System and method for tuning a thermal strategy in a portable computing device based on location: Various embodiments of methods and systems for tuning a thermal strategy of a portable computing device (“PCD”) based on PCD location information. In an exemplary embodiment, it may be recognized that the PCD is in an active state and producing thermal energy, or that one or more thermally aggressive components... Agent: Qualcomm Incorporated

20140240032 - Adaptive voltage scaling method, chip, and system: Embodiments of the present invention provide an adaptive voltage scaling method, chip, and device. An aging effect-related state parameter in a chip is obtained at a first voltage adjustment time point. The first voltage adjustment time point is one of multiple voltage adjustment time points set for the chip. An... Agent: Huawei Technologies Co., Ltd.

20140240033 - On-die programming of integrated circuit bond pads: SoC and SiP designs are configured with an antifuse link within the die to allow on-die programming of bond wires connecting package lead fingers to the bond pads on the die. This permits alteration of the bond pad connections for the die, particularly for the ground voltage ground signal (VSS)... Agent: Lsi Corporation

20140240034 - Divide by 2 and 3 charge pump methods: The present disclosure relates to methods and circuits to achieve ground centered charge-pumps generating output voltages of +/−VDD/2 or +/−VDD/3 while achieving high efficiency of power conversion and minimized output impedances. Key points of the disclosure are minimizing number of switching states, reducing the time required for transition through all... Agent: Dialog Semiconductor Gmbh

20140240035 - Synchronized charge pump-driven input buffer and method: An integrated circuit includes (a) an analog-to-digital converter operated according to a first clock signal; and (b) a charge pump circuit providing a negative power supply voltage to the integrated circuit, the charge pump circuit being operated according to a second clock signal having a frequency that is different from... Agent: Linear Technology Corporation

20140240036 - Semiconductor device: Disclosed is a semiconductor device that includes an N-channel MOS transistor and a control voltage generation circuit. The N-channel MOS transistor controls the supply of a power supply voltage obtained by stepping down a DC voltage. The control voltage generation circuit clips the gate voltage of the N-channel MOS transistor... Agent: Renesas Electronics Corporation

20140240037 - Buffer circuit: A buffer circuit includes a first current mirror circuit, a second current mirror circuit, a first transistor, and a second transistor. The first current mirror circuit passes a first mirror current through a second node, corresponding to a first current passed through a first node, and is activated based on... Agent: Kabushiki Kaisha Toshiba

20140240038 - Reference voltage generation circuit: Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits... Agent: Seiko Instruments Inc.

  
08/21/2014 > 22 patent applications in 16 patent subcategories.

20140232434 - Integrated circuit device: An integrated circuit device contains two oscillators to generate a first clock signal and a second clock signal. Along with comparing the frequencies of the first clock signal and the second clock signal, the integrated circuit device is configured to monitor whether or not each frequency is within the frequency... Agent: Renesas Electronics Corporation

20140232435 - Analog minimum or maximum voltage selector circuit: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of... Agent: Analog Devices, Inc.

20140232436 - Power semiconductor device driving circuit: A power semiconductor device driving circuit includes a gate control terminal, which is provided at a position separated from a drain terminal of a power semiconductor device by a predetermined distance so that electric discharge is generated between the drain terminal and the gate control terminal at the time of... Agent: Denso Corporation

20140232437 - Method for operating a backup circuit and circuit therefor: In some embodiments, a reset circuit for an electronic circuit equipped with a backup power capacitor includes a first detector arranged to detect a predetermined first voltage of the backup capacitor, a second detector arranged to detect a predetermined second voltage of the backup capacitor, the second voltage being lower... Agent: Semiconductor Components Industries, LLC

20140232438 - Semiconductor device: A semiconductor device includes a first input terminal configured to receive a first clock signal, first control terminals configured to receive first control signals respectively, an output terminal, first inverters each including an input node coupled to the first input terminal, a control node coupled to a corresponding one of... Agent: Elpida Memory, Inc.

20140232439 - Negative edge preset reset flip-flop with dual-port slave latch: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and... Agent: Texas Instruments Incorporated

20140232443 - Negative edge preset flip-flop with dual-port slave latch: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and... Agent: Texas Instruments Incorporated

20140232442 - Negative edge reset flip-flop with dual-port slave latch: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and... Agent: Texas Instruments Incorporated

20140232441 - Positive edge preset flip-flop with dual-port slave latch: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and... Agent: Texas Instruments Incorporated

20140232440 - Positive edge reset flip-flop with dual-port slave latch: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and... Agent: Texas Instruments Incorporated

20140232444 - Self-powered timer apparatus: A method is provided for implementing a timer using a floating-gate transistor. The method includes: injecting a charge into a floating-gate transistor at an initial time, where a gate terminal of the floating-gate transistor is comprised of polysilicon encased by an insulating material; creating lattice imperfections at boundary of the... Agent: Board Of Trustees Of Michigan State University

20140232445 - Balanced level shifter with wide operation range: Embodiments of an apparatus are disclosed that may allow for the translation of signals from one power domain to another with well-balanced rise and fall times over a wide operational range. The apparatus may include an input buffer, a voltage shift circuit, and output circuit, and an output driver. The... Agent: Apple Inc.

20140232446 - Configurable single-ended driver: Embodiments of the invention are generally directed to a configurable single-ended driver. An embodiment of an apparatus includes an interface with a channel; and a single-ended driver to drive a signal on the channel, wherein the driver includes a mechanism to configure a termination resistance of the driver, configure a... Agent:

20140232447 - Level shift circuit: There is provided a level shift circuit free from malfunction. The level shift circuit converts a signal of a first power supply voltage of a first supply terminal, which is supplied to an input terminal, into a signal of a second power supply voltage of a second supply terminal and... Agent: Seiko Instruments Inc.

20140232448 - Semiconductor integrated circuit: A semiconductor integrated circuit including: a circuit block having an internal voltage line; an annular rail line forming a closed annular line around the circuit block and supplied with one of a power supply voltage and a reference voltage; and a plurality of switch blocks arranged around the circuit block... Agent: Sony Corporation

20140232449 - Power gating circuits using schmitt trigger circuits, semiconductor integrated circuits and systems including the power gating circuits: A power gating circuit is configured to connect a first voltage line to a second voltage line or separate the first voltage line from the second voltage line using a Schmitt trigger circuit that is configured to detect a voltage level of the second voltage line. The voltage lines are... Agent:

20140232450 - Circuit for canceling errors caused by parasitic and device-intrinsic resistances in temperature dependent integrated circuits: In one embodiment, a circuit includes at least one transistor with a base and collector being electrically connected to a ground, and at least one current source being configured to apply four different currents (A, B, C, and D) to the emitter. A sum of the currents A and C... Agent: Robert Bosch Gmbh

20140232451 - Three terminal semiconductor device with variable capacitance: Methods and apparatus for implementing variable, e.g., tunable, 3 terminal capacitance devices are described. In various embodiments vertical control pillars spaced apart from one another extend in a well having an opposite polarity than the polarity of the control pillars. The control pillars are arranged in a line that extends... Agent: Qualcomm Incorporated

20140232452 - Internal voltage generation circuit: In an internal voltage generation circuit, four charge pump circuits are provided, the first two charge pump circuits are driven with a long period at the time of standby mode, and the four charge pump circuits are driven with a short period at the time of active mode. Therefore, a... Agent: Renesas Electronics Corporation

20140232453 - Circuit for generating reference voltage: Provided is a circuit for generating a reference voltage. The circuit includes a band gap circuit generating a first current having a size that increases in proportion to an absolute temperature and a second current having a size that decreases in proportion to the absolute temperature, and outputting a reference... Agent: Samsung Electronics Co., Ltd.

20140232454 - Power supply protection system: Devices and methods provide a protection device for maintaining a steady output on a gate driver terminal despite fluctuations in a power supply, the protection device including low voltage detection circuitry configured to monitor the power supply and detect fluctuations in the power supply; and gate isolation circuitry configured to... Agent: Fairchild Semiconductor Corporation

20140232455 - Semiconductor device: A semiconductor device includes a first semiconductor chip which includes a first power supply terminal and into which a circuit block which is operated by a power supply voltage supplied to the first power supply terminal is integrated, a power circuit that includes switching transistors and supplies the power supply... Agent: Kabushiki Kaisha Toshiba

  
08/14/2014 > 17 patent applications in 16 patent subcategories.

20140225649 - Sensor circuit: Provided is a sensor circuit which can amplify a sensor signal at high speed and with a high amplification factor without increasing the current consumption. The sensor circuit includes a primary amplifier for amplifying in advance a differential output signal which is a current signal of a sensor element, a... Agent: Seiko Instruments Inc.

20140225650 - Frequency to voltage converter: According to the invention, there is provided a frequency to voltage converter for generating an output voltage proportional to the frequency of input signal. It comprises a switched capacitor circuit for receiving input signal and generating an input current proportional to said frequency, the switched capacitor having a capacitor charging... Agent: Indian Institute Of Technology, Bombay

20140225651 - Delay locked loop circuit and method: A delay locked loop includes initialization circuitry that ensures that a DLL is initialized to an operating point that is not to close to either end of a delay vs. control voltage characteristic. The initialization circuitry forces the DLL to initially search for a lock point starting from an initial... Agent: Conversant Intellectual Property Management Inc.

20140225652 - Charge pump with a power-controlled clock buffer to reduce power consumption and output voltage ripple: A charge pump system includes a charge pump that receives its clock signals, generated by an oscillator circuit, though a clock buffer. The clock buffer is power-controlled to reduce power consumption and output voltage ripple. The buffer is formed of a series of inverter that are connected to the power... Agent: Sandisk 3d LLC

20140225653 - Cascaded pll for reducing low-frequency drift in holdover mode: A cascaded phase-locked loop (PLL) clock generation technique reduces frequency drift of a low-jitter clock signal in a holdover mode. An apparatus includes a first PLL circuit configured to generate a control signal based on a first clock signal and a first divider value. The apparatus includes a second PLL... Agent: Silicon Laboratories Inc.

20140225654 - Phase-lock loop: A phase-lock loop having a reduced lock time in comparison with the conventional art. The phase-lock loop compares an output signal thereof with a reference signal, and alters a control signal in response thereto such that the output signal may have a desired frequency.... Agent: Infineon Technologies Ag

20140225655 - Clock-gated synchronizer: Techniques for clock gating a synchronizer are described herein. In one embodiment a circuit for clock gating a synchronizer comprises a clock-gating circuit configured to receive an input clock signal, and to selectively provide either the input clock signal or a fixed clock signal to the synchronizer. The circuit also... Agent: Qualcomm Incorporated

20140225656 - Output slew rate control: This document discusses, among other things, output slew rate control. Methods and structures are described to provide slew rate control of an output driver circuit such as a DRAM output driver on a die. A selectable combination of series coupled transistors are configured as a parallel array of complementary inverter... Agent: Micron Technology, Inc.

20140225657 - Flip-flop circuit: A flip-flop circuit has a master latch circuit and a slave latch circuit. In the flip-flop circuit, the master latch circuit and the slave latch circuit share at least a pair of transistors. In response to the clock signal, the signal held in the master latch circuit can be output... Agent: Kabushiki Kaisha Toshiba

20140225658 - Adaptive voltage scalers (avss), systems, and related methods: The AVSs are configured to adaptively adjust voltage levels powering a functional circuit(s) based on target operating frequencies and delay variation conditions to avoid or reduce voltage margin. In one embodiment, the AVS includes an AVS database. The AVS database can be configured to store voltage levels for various operating... Agent: Qualcomm Incorporated

20140225659 - Thermal controller: A thermal controller for driving a gate control unit of a gate-driven semiconductor switching device, the thermal controller comprising a junction temperature estimation module for generating an estimated junction temperature for the switching device, a gate voltage control module for modifying a gate voltage of the switching device, a switching... Agent: Rolls-royce PLC

20140225660 - Power saving method for handheld mobile electronic device and device using the same: The present disclosure proposes a power saving technique to be used by a handheld mobile electronic device. In particular, the handheld mobile electronic device would execute functions including determining a tilting angle of the handheld mobile electronic device above and relative to a level surface by using a sensor, determining... Agent: Htc Corporation

20140225661 - Semiconductor device with bypass functionality and method thereof: A device includes a semiconductor chip and a bypass layer electrically coupled to a contact region of the semiconductor chip. The bypass layer is configured to change from behaving as an insulator to behaving as a conductor in response to a condition of the semiconductor chip.... Agent: Infineon Technologies Austria Ag

20140225662 - Low-voltage, high-accuracy current mirror circuit: An approach is provided for a low-voltage, high-accuracy current mirror circuit. In one example, a current mirror circuit includes an input circuit configured to receive an input reference current. The input circuit includes a feedback channel for comparing and substantially matching the input reference current with an output current. The... Agent: Nvidia Corporation

20140225663 - Buffer circuit and switching controller: A buffer circuit includes a first inverter circuit that inverts an input signal, a second inverter circuit that inverts the output signal of the first inverter circuit, an impedance element connected between the first inverter circuit and the second inverter circuit, a first conductivity type switching element that increases a... Agent: Kabushiki Kaisha Toshiba

20140225664 - Semiconductor circuit with electrical connections having multiple signal or potential assignments: A semiconductor circuit provides at least one first electrical pin with multiple signal assignment or potential assignment in order to integrate several circuit variants in the semiconductor circuit. It has a switch element for isolating or connecting at least one first electrical pin from or to an input or output... Agent: Rohde & Schwarz Gmbh & Co, Kg

20140225665 - Compensating for process variation in integrated circuit fabrication: Systems and methods for reducing process sensitivity in integrated circuit (“IC”) fabrication. An integrated circuit structure is provided that includes a first integrated circuit device having at least one parameter influenced by process variation in a first manner. The integrated circuit structure further includes a second integrated device having the... Agent: International Business Machines Corporation

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