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Miscellaneous active electrical nonlinear devices, circuits, and systems June invention type 06/10

20100156469 - High-speed multi-stage voltage comparator: A high-speed multi-stage voltage comparator is provided. The multi-stage voltage comparator is configured to eliminate offset from outputs of preamplifiers through respective offset-cancellation switches, and to reset the outputs of the preamplifiers through respective reset switches to reduce an output recovery time. Thus, the multi-stage voltage comparator operates with high... Agent: Ampacc Law Group

20100156470 - Voltage detector device and methods thereof: A voltage detector device is disclosed that includes a coarse-range voltage detector and a fine-range voltage detector. The fine-range voltage detector is configured to remain inactive, so that it consumes a relatively small amount of power, while a monitored voltage is outside a first specified range. In response to determining... Agent: Larson Newman & Abel, LLP

20100156471 - Scalable cost function generator and method thereof: A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to... Agent: Haynes And Boone, LLPIPSection

20100156472 - Transversal agile local oscillator synthesizer: A representative integrated circuit comprises a clock signal generator that generates a clock signal, a code pattern generator that generates digital pattern data based on the clock signal, and a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array. The T-DAC unit... Agent: Duane Morris LLP - Princeton

20100156473 - Clcok driver circuit: Clock driver circuit having upper and lower transistors1 and upper and lower transistors2. Voltage node1 coupled to electrodes of upper transistor1 and upper transistor2. Voltage node2 coupled to electrodes of lower transistor1 and lower transistor2. Coupling transistor1 couples another electrode of upper transistor1 to another electrode of lower transistor2. Coupling... Agent: Motorola, Inc.

20100156474 - Gate drive circuit and display apparatus having the same: A gate drive circuit includes m stages cascade connected to one another, each stage respectively outputting one of a plurality of gate signals. An m-th stage includes a pull-up part, a pull-down part, a boost-up part, a first maintenance part and a second maintenance part. The pull-up part outputs a... Agent: F. Chau & Associates, LLC

20100156475 - Field effect transistor with electric field and space-charge control contact: A group III nitride-based transistor capable of achieving terahertz-range cutoff and maximum frequencies of operation at relatively high drain voltages is provided. In an embodiment, two additional independently biased electrodes are used to control the electric field and space-charge close to the gate edges.... Agent: Hoffman Warnick LLC

20100156476 - Systems and methods for providing a clock signal: Systems and methods for providing a clock signal are provided. A frequency multiplier circuit is provided that can include a plurality of serially connected delay elements that are configured to generate a plurality of delay tap signals from an input signal. The frequency multiplier circuit can also include a phase... Agent: Lando & Anastasi, LLP S2059

20100156477 - Bandgap referenced power on reset (por) circuit with improved area and power performance: In an apparatus for monitoring a supply voltage, a current mirror coupled to the supply voltage provides a pair of matching currents. A resistor divider that includes a first resistor coupled in series with a second resistor to from a first node is disposed between the supply voltage and a... Agent: Texas Instruments Incorporated

20100156478 - Electronic device and signal generator thereof: An electronic device includes a signal generator and a processing module. The signal generator generates reset signals to reset the processing module. The signal generator includes a first capacitor, a second capacitor, and a switching unit. The first capacitor receives an input voltage and charges accordingly when the electronic device... Agent: PCe Industry, Inc. Att. Steven Reiss

20100156479 - Power-on reset circuit and adjusting method therefor: A power-on reset circuit includes a detection-voltage producing circuit that produces a detection voltage proportional to a power-supply voltage, and a power-on determining circuit that activates a power-on reset signal when a detection voltage is less than the power-on determining voltage and inactivates the power-on reset signal when the detection... Agent: Morrison & Foerster LLP

20100156480 - Control signal generation circuit: A control signal generation circuit includes a pulse signal generator configured to delay a column control signal by delay times different from each other and to generate first and second pulse signals, a reset signal generator configured to transfer alternatively the first and second pulse signals as a reset signal... Agent: Cooper & Dunham, LLP

20100156482 - Means to detect a missing pulse and reduce the associated pll phase bump: A phase/frequency locked loop (PLL) includes circuitry adapted to detect missing pulses of a reference clock and to control the phase bump of the PLL. The circuitry includes, in part, first and second flip-flops, as well as a one-shot block. The first flip-flop has a data input terminal responsive to... Agent: Townsend And Townsend And Crew, LLP

20100156481 - Synchronization scheme with adaptive reference frequency correction: The present invention relates to an apparatus and method for providing synchronization of an output signal to a synchronization information. The synchronization is accomplished by providing coupling of a correction control information that controls a signal generating means, e.g. a phase locked loop arrangement (30) or a direct digital synthesis... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100156483 - Delay locked loop circuit: The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback... Agent: Borden Ladner Gervais LLP Anne Kinsman

20100156484 - Fast-response phase-locked loop charge-pump driven by low voltage input: Phase-locked loop charge pump driven by low voltage input. In one aspect, a phase-locked loop circuit includes a phase frequency detector operating at a low voltage and providing low-voltage sourcing control signals and low-voltage sinking control signals at the low voltage. A charge pump operates at a high voltage and... Agent: Sawyer Law Group, P.C.

20100156485 - Delay element array for time-to-digital converters: Embodiments of the present disclosure provide methods, systems, and apparatuses related to a delay element array for time-to-digital converters. Some embodiments include a voltage controlled oscillator; a time-to-digital converter including a delay element array to output delayed versions of a signal and logic to generate a digital word that represents... Agent: Schwabe, Williamson & Wyatt, P.C.

20100156488 - Delay-locked loop circuit controlled by column strobe write latency: The DLL circuit includes a control circuit which controls bias currents of the unit delay circuits according to an externally input column address strobe writing latency (CWL) signal, and/or a DCC control circuit which adjusts steps of a DCC current of the DCC according to the externally input column address... Agent: Volentine & Whitt PLLC

20100156487 - Dll circuit: A delay locked loop (DLL) circuit includes a clock input buffer that generates a reference clock signal by buffering an external clock signal and outputs the reference clock signal by correcting a duty cycle of the reference clock signal in response to a duty cycle control signal. The DLL circuit... Agent: Ip & T Law Firm PLC

20100156486 - Dll circuit having activation points: A delay locked loop (DLL) circuit includes a delay line configured to generate a delay clock signal by delaying a reference clock signal in response to a delay control signal, the delay line having two or more initial activation points, wherein the initial activation points are selected according to an... Agent: Ladas & Parry LLP

20100156489 - Dll circuit, semiconductor device including the same, and data processing system: To provide a DLL circuit including: a first phase determination circuit that compares phases of rising edges of an external clock and a first internal clock; a second phase determination circuit that compares phases of falling edges of the external clock and the first internal clock; an adjusting unit that... Agent: Sughrue Mion, PLLC

20100156490 - Delay circuit: Disclosed is a delay circuit. The delay circuit includes a pulse generating unit, a timing adjusting unit, and a pulse width adjusting unit. The pulse generating unit is configured to generate a pulse signal having a preset width in response to a rising edge of an input signal. The timing... Agent: Ladas & Parry LLP

20100156491 - Voltage converters and voltage generating methods: A voltage converter is provided. The voltage converter generates an output voltage signal and comprises a controller, a wave generator, a comparator, and a voltage converting unit. The controller generates a control voltage signal according to the output voltage signal and a first reference voltage. The wave generator generates a... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100156492 - System and method for thermal limit control: This disclosure relates to a system and method for pulse generation. A system in accordance with the present disclosure may include a power dissipating element configured to receive power from a power source. At least one of the power source and the power dissipating element may be configured to generate... Agent: Holland & Knight LLP

20100156493 - Circuit device to produce an output signal including dither: In a particular embodiment, a circuit device includes a count zero circuit having a first counter to receive a clock signal and to produce a count zero signal based on the clock signal and having a second counter to generate a reset control signal to control a reset of the... Agent: Polansky & Associates, P.l.l.c.

20100156494 - Latch and dff design with improved soft error rate and a method of operating a dff: A single-path latch, a dual-path latch, a method of operating a DFF and a library of cells. In one embodiment, the single-path latch includes: (1) a passgate coupled to the data input, (2) a feedback path coupled to the passgate, the data output coupled thereto and (3) tristate circuitry coupled... Agent: Hitt Gaines, PC Lsi Corporation

20100156495 - Latch circuit and clock signal dividing circuit: Latch circuit and clock signal dividing circuit comprises sequentially connected latch circuits. Each latch circuit has D-type latch with latch clock input, data input and data output. A difference detector is coupled to D-type latch, and has a difference output that provides a difference signal when data at input is... Agent: Motorola, Inc.

20100156496 - High voltage switch with reduced voltage stress at output stage: The present invention discloses a high voltage switching module having reduced stress at its driver output stage which in turn controls the gate of a transistor requiring a high current drive. The switching module includes a negative elevating circuit, a delay module, a pull-up circuit, and a pull down circuit.... Agent: Hogan & Hartson LLP

20100156497 - System and method for common mode translation: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and... Agent: Texas Instruments Incorporated

20100156498 - Level shifter: A level shifter with high performance, low power and reduced duty cycle distortion. The level shifter includes an input stage having a first circuit coupled to a second circuit. The first circuit includes a first pull up transistor receiving an input signal coupled to a first pull down transistor. The... Agent: Texas Instruments Incorporated

20100156499 - Logic level converter: A logic level converter includes two first electronic switches coupled in a bi-stable flip-flop arrangement having at least one output line, and a forcing circuitry including two second electronic switches to force switching of the first electronic switches in the flip-flop arrangement. The forcing circuitry has an input terminal to... Agent: Hogan & Hartson LLP

20100156500 - Semiconductor device, output circuit and method for controlling input/output buffer circuit in semiconductor device: Disclosed is a semiconductor device having an output circuit that may be used to advantage in case the semiconductor device may possibly be used under different power supply voltages. The semiconductor device includes a signal terminal having at least the function of an output terminal, a power supply terminal, and... Agent: Morrison & Foerster LLP

20100156501 - Adjustable integrator using a single capacitance: An integrating amplifier on an IC, which comprises a feedback loop using an external device as an integrating capacitor, has added a second feedback loop that provides an additional current to the input of the amplifier, which current can be used to increase the input range of the charge that... Agent: Saile Ackerman LLC

20100156502 - Signal processor comprising a frequency converter: A signal processor includes a frequency converter of the multiphase type. A first phase mixer (SWC1, TIS1) has a pair of switches (M11, M12). A second phase mixer (SWC2, TIS2) also has a pair of switches (M21, M22). The pair of switches of the first phase mixer and the pair... Agent: Docket Clerk

20100156503 - Electronic circuit device: An electric circuit device operable under a power supply includes: a circuit; a first switch connected between the power supply and the circuit; a capacitor tending to produce a first leakage current; a second switch connected between the power supply and the capacitor, the second switch producing a second leakage... Agent: Fujitsu Patent Center C/o Cpa Global

20100156504 - Cross point switch: A cross point switch, in accordance with one embodiment of the present invention, includes a plurality of tri-state repeaters coupled to form a plurality of multiplexers. Each set of corresponding tri-state repeaters in the plurality of multiplexers share a front end module such that delay through the cross point switch... Agent: Iv (transmeta) C/o Murabito, Hao & Barnes LLP

20100156505 - Circuit arrangement and method for generating a drive signal for a transistor: Disclosed is a circuit arrangement for generating a drive signal for a transistor. In one embodiment, the circuit arrangement includes a control circuit that receives a switching signal, a driver circuit that outputs a drive signal, and at least one transmission channel. The control circuit transmits, depending on the switching... Agent: Dicke, Billig & Czaja

20100156506 - Semiconductor device including insulated gate bipolar transistor and diode: A semiconductor device includes a vertical IGBT and a vertical free-wheeling diode in a semiconductor substrate. A plurality of base regions is disposed at a first-surface side portion of the semiconductor substrate, and a plurality of collector regions and a plurality of cathode regions are alternately disposed in a second-surface... Agent: Posz Law Group, PLC

20100156507 - Temperature detection circuit: Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such... Agent: Bruce L. Adams, Esq Adams & Wilks

20100156508 - Electronic device: According to one embodiment, an electronic device includes a housing, an operation area, at least one display, an input detector, a light source device, and a controller. The operation area is provided on an outer surface of the housing. The display is located in the operation area, and includes a... Agent: Knobbe Martens Olson & Bear LLP

20100156509 - Switching mode power supply for reducing standby power: In accordance with one aspect of the present invention to achieve the object, there is provided a switching mode power supply for reducing standby power including an EMI(Electro-Magnetic Interference) filter unit for removing a high frequency noise component by being connected to an input power source; a PFC(Power Factor Correction)... Agent: Lowe Hauptman Ham & Berner, LLP

20100156510 - Soi radio frequency switch for reducing high frequency harmonics: First doped semiconductor regions having the same type doping as a bottom semiconductor layer and second doped semiconductor regions having an opposite type doping are formed directly underneath a buried insulator layer of a semiconductor-on-insulator (SOI) substrate. The first doped semiconductor regions and the second doped semiconductor regions are electrically... Agent: Scully, Scott, Murphy & Presser, P.C.

20100156511 - Bias voltage generation circuit for an soi radio frequency switch: A radio frequency (RF) switch located on a semiconductor-on-insulator (SOI) substrate includes at least one electrically biased region in a bottom semiconductor layer. The RF switch receives an RF signal from a power amplifier and transmits the RF signal to an antenna. The electrically biased region may be biased to... Agent: Scully, Scott, Murphy & Presser, P.C.

20100156513 - Charge pump: A high power DC-DC converter uses wide bandgap semiconductor switches and capacitors as a charge pump to convert a DC input to a DC output of a different potential. Each capacitor is connected to the output of one of the stages of the charge pump. A wide bandgap semiconductor switch... Agent: Kinney & Lange, P.A.

20100156512 - Charge pump controller and method therefor: In one embodiment, a charge pump controller is configured to a charge pump controller to charge a plurality of pump capacitors during a charging time interval and to sequentially form a plurality of discharge time intervals with a different pump capacitor coupled to supply a current to a load for... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100156514 - Charge pump regulator and method of producing a regulated voltage: A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the... Agent: Rosenberg, Klein & Lee

20100156515 - Charge pump regulator and method of producing a regulated voltage: A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the... Agent: Rosenberg, Klein & Lee

20100156516 - Charge pump regulator and method of producing a regulated voltage: A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the... Agent: Rosenberg, Klein & Lee

20100156517 - Charge pump regulator and method of producing a regulated voltage: A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the... Agent: Rosenberg, Klein & Lee

20100156518 - Dynamic charge pump system for front end protection circuit: Various apparatuses, methods and systems for a front end protection circuit with a dynamic charge pump system are disclosed herein. For example, some embodiments provide an apparatus such as a voltage regulator, a current regulator, a driver circuit or a switch protection circuit. The apparatus includes an output switch, a... Agent: Texas Instruments Incorporated

20100156519 - Electrical system, voltage reference generation circuit, and calibration method of the circuit: A voltage generation circuit that includes: a voltage generator integrated in a semiconductor chip and structured to generate an output voltage in accordance with a calibration parameter; a heater operable to heat the voltage generator; a control device configured to receive the output voltage, activate the heater and provide the... Agent: Seed Intellectual Property Law Group PLLC

20100156520 - Reference voltage generator: A reference voltage generator includes: a reference voltage source 1 that generates a direct-current voltage that is used as a reference; a low-pass filter 2 that is connected to an output node of the reference voltage source; a first voltage buffer circuit 10 with an input terminal to which the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100156521 - Constant switch vgs circuit for minimizing rflatness and improving audio performance: A MOSFET switch is disclosed that is driven on by a circuit that provides a constant gate to source voltage, Vgs, that is independent of the input voltage, the power supply and any logic signals. The constant Vgs is derived from a reference voltage and biases the MOSFET switch such... Agent: Cesari And Mckenna, LLP

20100156522 - Semiconductor integrated circuit device: A semiconductor integrated circuit device for fast and low power operations, comprising a plurality of circuit blocks of a chip, each of which has a plurality of states with different power consumption values. A power management circuit determines the state of each of the circuit blocks so as not to... Agent: Stanley P. Fisher Reed Smith Hazel & Thomas LLP

20100156523 - Arrangement structure of electromagnetic band-gap for suppressing noise and improving signal integrity: An electromagnetic-wave suppression structure in a multilayer PCB or package structure is supplied with a power to be used therein by a power distribution network including a power plane and a ground plane. The multilayer PCB and package includes: an electromagnetic-wave suppression structure including an electromagnetic band-gap; and the electromagnetic-wave... Agent: Ladas & Parry LLP

20100156524 - Pulse filtering module circuit, system, and method: A filtering module filters out high frequency signals, primarily noise, from an input data stream. The filtering module includes an input module, a phase detecting module, and a threshold module. The input module performs either a charging or a discharging across a capacitor on a basis of an RC time... Agent: Graybeal Jackson LLP

20100156525 - Method and system for tuning precision continuous-time filters: Described embodiments provide a method for calibrating a continuous-time filter having at least one adjustable parameter. A square-wave signal is filtered by a continuous-time filter having a cutoff frequency less than fs. The filtered signal is quantized at the rate fs. An N-point Fourier transform is performed of the quantized... Agent: Ip Legal Services

20100156526 - Soi radio frequency switch with enhanced signal fidelity and electrical isolation: A doped contact region having an opposite conductivity type as a bottom semiconductor layer is provided underneath a buried insulator layer in a bottom semiconductor layer. At least one conductive via structure extends from an interconnect-level metal line through a middle-of-line (MOL) dielectric layer, a shallow trench isolation structure in... Agent: Scully, Scott, Murphy & Presser, P.C.

20100148826 - Differential comparator with skew compensation function and test apparatus using the same: One of differential signals is inputted to a first input terminal. The other of the differential signals is inputted to a second input terminal. A first sample hold circuit samples the signal inputted to the first input terminal and hold it thereafter. A second sample hold circuit samples the signal... Agent: Martine Penilla & Gencarella, LLP

20100148827 - Radio frequency (rf) signal generator and method for providing test signals for testing multiple rf signal receivers: A test signal interface and method for allowing sharing of multiple test signal generators among multiple devices under test (DUTs). Digital baseband test signals generated by the multiple test signal generators are combined and converted to a baseband analog signal for conversion to a radio frequency (RF) signal for testing... Agent: Vedder Price P.C.

20100148828 - Peak power reduction method: A technique wherein when signals, the modulation schemes of which are different, are to be combined, performing the peak suppression using amounts of the respective modulation schemes can effectively reduce the PAPR of a resulting combined signal. A peak suppressing method for use in a peak suppressing circuit, which combines... Agent: Hanify & King Professional Corporation

20100148830 - Gate driver circuit, switch assembly and switch system: It is presented a gate driver circuit for driving an electric switch, the switch being arranged to control a main current using a gate signal. The gate driver circuit comprises: a non-linear capacitor means having a lower capacitance when an applied voltage is under a threshold voltage and a higher... Agent: Holland & Hart, LLP

20100148829 - Liquid crystal display and method of driving the same: A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a timing controller, N source drive integrated circuits (ICs), where N is an integer equal to or greater than 2, N pairs of data bus lines, each of which connects the timing... Agent: Brinks Hofer Gilson & Lione

20100148831 - Buffer with remote cascode topology: A buffer circuit is described for buffering signals between a circuit element and a load. The buffer includes a main transistor and a cascode transistor, as well as a distribution line for transferring signals over a distance between the circuit element and the load. The buffer is arranged in a... Agent: The Mueller Law Office, P.C.

20100148832 - Clock data recovery circuit: A simple circuit that supports high and low data rates is provided. The circuit includes: a detection circuit 11 for detecting whether D1≠D2 or D1≠D3, assuming that logical values of an input data signal DATAIN sampled at timings t1, t2, and t3 (t2<t1<t3) of edges of clock signals CLK0 and... Agent: Mcginn Intellectual Property Law Group, PLLC

20100148833 - Domain crossing circuit of a semiconductor memory apparatus: The domain crossing circuit of a semiconductor memory apparatus for improving a timing margin includes a sampler that provides a sampling internal signal generated by delaying an internal input signal by a predetermined time in response to a clock and an edge information signal that defines an output timing of... Agent: Ladas & Parry LLP

20100148834 - Enhanced predistortion for slewing correction: The present invention relates to a circuit arrangement and method of applying predistortion to a baseband signal used for modulating a pulse-shaped signal, wherein an envelope information of the baseband signal is detected and slewing distortions of the pulse-shaped signal are reduced by applying at least one of a phase... Agent: Docket Clerk

20100148835 - Duty control buffer circuit and duty correction circuit: The circuit includes a duty control buffer and a duty control voltage generator that receives outputs of the duty control buffer, detects a duty error, and generates control signals. The duty control buffer includes a differential stage including unbalanced first and second differential pairs each differentially receiving input signals, a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100148836 - Contention-free level converting flip-flops for low-swing clocking: The present invention includes a family of level converting flip-flops that accepts data and clock inputs at a lower voltage level while producing data outputs at a higher voltage level. These flip-flops enable fine-grained dual supply voltage techniques such as low-swing clocking (distributing the clock signal at a lower voltage... Agent: VistaIPLaw Group LLP

20100148837 - Latch circuit with single node single-event-upset immunity: A latch circuit, such as a memory cell or a flip-flop, that is immune to single-event upset at any single node. The latch circuit includes two banks of four logic gates each. The output of each logic gate in the first bank is connected to inputs of two logic gates... Agent: Texas Instruments Incorporated

20100148838 - Wide range delay cell: A delay cell with a wider delay range is provided. The delay cell employs frequency dependent current source to generate the majority of the delay of the cell, while a control circuit (which is generally a current source that is controlled by a control voltage) provides additional delay. Thus, the... Agent: Texas Instruments Incorporated

20100148839 - Self-tuning of signal path delay in circuit employing multiple voltage domains: Circuits and methods provided in multiple voltage domains that include self-tuning or timing of a signal path are disclosed. A plurality of paths is provided in the circuit. Each path traverses a portion of the multiple voltage domains, which may include any number or combination of the multiple voltage domains.... Agent: Qualcomm Incorporated

20100148840 - Pulse modulated charge pump circuit: A circuit for increasing a gate voltage of a transmission gate in a high-speed switch to a level higher than a level of a supply voltage is provided. The circuit includes an oscillator generating a clock signal and a charge pump circuit operatively coupled to the oscillator. The charge pump... Agent: Haynes And Boone, LLPIPSection

20100148842 - Multi-phase clock signal generating circuit having improved phase difference and a controlling method thereof: A multi-phase clock signal generating circuit includes a phase correction block configured to receive multi-phase clock signals and produce a plurality of interpolated phase clock signal groups in which the phases of the multi-phase clock signals are differently controlled. The multi-phase clock signals are out of phase with each other.... Agent: Ladas & Parry LLP

20100148841 - Multiphase clock for superconducting electronics: A multiphase clock circuit in which bit errors are propagated only for the duration of the clock cycle in which a bit error occurs. The circuit recovers automatically from bit errors and is capable of operating at high frequency with high clock precision. The multiphase clock circuit can generate a... Agent: Henry I. Schanzer, Esq.

20100148843 - Bow tie clock distribution: A clock distribution network includes: a primary clock signal and a distribution tree coupled to the primary clock signal. The distribution tree derives a plurality of separate clock signals from the primary clock signal and provides each of the plurality of separate clock signals to each of a plurality of... Agent: Osha Liang LLP/oracle

20100148844 - System and method for common mode translation: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and... Agent: Texas Instruments Incorporated

20100148845 - Limiter and semiconductor device using the same: The limiter of the invention uses as a diode a stacked gate thin film transistor (TFT) including a floating gate. When the TFT including a floating gate is used, the threshold voltage Vth may be corrected by controlling the amount of charge accumulated in the floating gate even in the... Agent: Eric Robinson

20100148846 - Gate drive circuit: A gate drive circuit includes a turn-on side circuit for turning on a gate of a power switching device, the turn-on side circuit including a first turn-on side power supply circuit and a second turn-on side power supply circuit, the first turn-on side power supply circuit including: a first turn-on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100148847 - High-power switching module and method for the generation of switching synchronism in a high-power switching module: A high-power switching module for directly feeding pulse energy to a load includes a plurality of series-connected switching stages. Each switching stage includes a semiconductor switch; a snubber capacitor and a synchronizing resistor; and a control network configured to act on the semiconductor switch and to be supplied with auxiliary... Agent: Leydig, Volt And Mayer

20100148848 - High speed four-to-one multiplexer: According to one embodiment, a high speed multiplexer includes a number of data inputs, a number of hot code select inputs, and a final data output. In one embodiment, the high speed multiplexer utilizes a number of intermediate multiplexers, each receiving respective hot code select inputs and providing an intermediate... Agent: Farjami & Farjami LLP

20100148849 - Signal converter for wireless communication and receiving device using the same: The present invention relates to a signal converting device and receiving device in a wireless communication system. The receiving device of the wireless communication system includes a differential signal converter for receiving a single ended radio frequency signal and converting it into a differential radio frequency signal, and a frequency... Agent: Jae Y. Park

20100148850 - System and method for common mode translation: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and... Agent: Texas Instruments Incorporated

20100148851 - Low voltage analog cmos switch: A CMOS analog switch circuit includes an NMOS switch transistor, a PMOS switch transistor, and a bias circuit. In an embodiment, the bias circuit includes a first and a second native bias transistors having their gate terminals coupled to a first and a second terminals of the CMOS switch circuit,... Agent: Townsend And Townsend And Crew, LLP

20100148852 - Orientation detection circuit and electronic device using the same: An orientation detection circuit is provided. The circuit includes a processor, a first resistor, a second resistor, a third resistor, a vibration switch, a first transistor, and a second transistor. The processor includes a first input pin and a second input pin. The third resistor has a resistance value greater... Agent: PCe Industry, Inc. Att. Steven Reiss

20100148853 - Systems, devices, and methods for controllably coupling qubits: A system for communicably coupling between two superconducting qubits may include an rf-SQUID coupler having a loop of superconducting material interrupted by a compound Josephson junction and a first magnetic flux inductor configured to controllably couple to the compound Josephson junction. The loop of superconducting material may be positioned with... Agent: Seed Intellectual Property Law Group PLLC

20100148854 - Comparator with reduced power consumption: A comparator component having a comparison circuit and bias generator circuit, with the bias generator circuit also having a same number of transistors connected in an identical configuration, as those contained in the comparison circuit to generate a comparison result based on the bias signal generated by the bias generator... Agent: Texas Instruments Incorporated

20100148855 - Constant reference cell current generator for non-volatile memories: A reference current generation circuit generates a first branch current that varies by a first percentage in response to variations in a first supply voltage and variations in transistor threshold voltage. The first branch current is mirrored to create a corresponding second branch current. A first portion (sub-current) of the... Agent: Bever, Hoffman & Harms, LLP

20100148856 - Regulation of recovery rates in charge pumps: A method is presented of setting a frequency of a clock for a charge pump system including the clock and a charge pump. This includes setting an initial value for the frequency of the clock and, while operating the charge pump system using the clock running at the initial frequency... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20100148857 - Methods and apparatus for low-voltage bias current and bias voltage generation: Methods and apparatus for low-voltage bias current and bias voltage generation are disclosed. An example bias signal generation circuit disclosed herein comprises a first amplifier stage, an output amplifier stage electrically coupled with the first amplifier stage, the first amplifier stage and the output amplifier stage configured to generate an... Agent: Texas Instruments Incorporated

20100148858 - Bias circuit: A bias circuit is provided in a circuit including an input line and an output line, and is formed on a substrate that supplies dc power to an active component. The input line reaches an input terminal of the active component from a signal line input terminal to which a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100148859 - Methods for manufacturing rfid tags and structures formed therefrom: Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100141302 - Signal converting circuit: A signal conversion circuit 2 comprises a differential amplifier portion 10 and a source follower portion 20. When differential voltage signals INp and INn are input to a first input terminal 5 and second input terminal 6 respectively, operations occurs either in a mode in which only the differential amplifier... Agent: Sughrue Mion, PLLC

20100141303 - Digitally controlled frequency generator: A digitally controlled frequency generator includes an oscillator module for generating a first clock signal having an oscillating frequency, a programmable control module operable so as to generate a control signal corresponding to a desired frequency, and a direct digital frequency synthesizer coupled to the oscillator module and the programmable... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100141304 - Drive circuit for power element: A driving circuit (1) for an IGBT (10) comprises an H bridge circuit (80) using first to fourth switching elements (Q1-Q4). A control unit (20) switches the states of the switching elements from a first state in which the first and fourth switching elements (Q1, Q4) are set to be... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100141305 - Method for carrying out a frequency change: The invention relates to a method for carrying out a frequency change whilst retaining the phase relationship between several devices, in particular, network analyzers. Each device has at least one signal generator for stimulating an object for measurement and at least one local oscillator, connected to at least one mixer,... Agent: Marshall, Gerstein & Borun LLP

20100141306 - Parallel-serial conversion circuit and data receiving system: A parallel-serial conversion circuit includes: a plurality of data terminals each receiving a data signal; a selection circuit configured to select at least one of the data signals received through the plurality of data terminals; a first latch circuit configured to latch an output from the selection circuit based on... Agent: Arent Fox LLP

20100141307 - Frequency multiplier and method for frequency multiplying: A frequency multiplier according to the present invention comprises a period-to-voltage converter that generates a control signal in response to the period of an input signal. An oscillator generates an output signal in accordance with the control signal. The level of the control signal is corrected to the frequency of... Agent: Rosenberg, Klein & Lee

20100141308 - Method and device for clock-data recovery: A method for the recovery of a clock signal from a data signal is provided where the edges of the signals are each represented as a chronologically-ordered sequence of timing points. In one procedural stage, a plurality of timing points of the data signal are processed in parallel as follows:... Agent: Ditthavong Mori & Steiner, P.C.

20100141309 - Initialization circuit and bank active circuit using the same: An initialization circuit comprises a section signal generator generating a section signal, of which a prescribed section is enabled in response to a power-up signal, a first oscillator generating a first period signal in response to the section signal, a first period multiplier generating a first multiplied signal by multiplying... Agent: Cooper & Dunham, LLP

20100141310 - Operating clock generation system and method for audio applications: A clock signal generator (1) includes a phase locked loop (PLL) circuit (25) which requires a reference clock signal of at least a predetermined first frequency (fDIGCLK). A first clock signal (REFCLK) of a second frequency (fREF) that is substantially lower than the first frequency (fDIGCLK) is multiplied so as... Agent: Texas Instruments Incorporated

20100141311 - Phase-locked loop and bias generator: A phase-locked loop (PLL) having a bias generator capable of reducing noise is provided. In the PLL, a voltage controlled oscillator is driven using a regulator. The bias generator, which applies a bias voltage to the regulator, is configured to have opposite power noise characteristics to the power noise characteristics... Agent: F. Chau & Associates, LLC

20100141312 - Delay locked loop circuit and operation mehtod thereof: A delay locked loop circuit includes a delay replica model unit for reflecting a delay time of an actual output path to a source clock and outputting the reflected source clock as a delay replica clock, a detector for detecting a remaining time after subtracting a time corresponding to a... Agent: Ip & T Law Firm PLC

20100141314 - All digital phase locked loop circuit: An all digital phase locked loop circuit includes a reference frequency indicator for receiving a reference signal with a reference frequency and generating a frequency indicating value; a phase frequency detector for comparing the reference signal with a frequency divided signal and generating a phase difference pulse; a time-to-digital circuit... Agent: Wpat, PC Intellectual Property Attorneys

20100141315 - Apparatus for linearization of digitally controlled oscillator: There is provided an apparatus for the linearization of a digitally controlled oscillator. The apparatus includes a first filter outputting only a low frequency band signal of an input signal to the digitally controlled oscillator; a negative feedback loop causing the signal of an input port of the digitally controlled... Agent: Ampacc Law Group

20100141313 - Digital phase-locked loop with two-point modulation and adaptive delay matching: A digital phase-locked loop (DPLL) supporting two-point modulation with adaptive delay matching is described. The DPLL includes highpass and lowpass modulation paths that support wideband and narrowband modulation, respectively, of the frequency and/or phase of an oscillator. The DPLL can adaptively adjust the delay of one modulation path to match... Agent: Qualcomm Incorporated

20100141316 - Method of improving noise characteristics of an adpll and a relative adpll: An all-digital phase locked loop (ADPLL) generates a feedback word representing a continuous-time oscillating signal. The ADPLL includes a time-to-digital converter (TDC) configured to be input with the continuous-time oscillating signal and a reference signal. The reference signal is a function of a reference clock signal. The TDC is configured... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20100141317 - Spread-period clock generator: A spread-period clock generator (SPC) counts basic clock pulses (XK) to generate output pulses (EQ) with varying periods, and has means (controlled by signal QS) for switching between a first mode, in which counting is carried out in response to the leading edges of the basic clock pulses (CK), and... Agent: Birch Stewart Kolasch & Birch

20100141318 - Trigger signal detection apparatus: A trigger signal detection apparatus includes: a clock gating circuit which is supplied with a trigger signal and a clock signal and outputs the clock signal; a trigger signal processing circuit which outputs a first signal only for a predetermined time when the clock signal is supplied from the clock... Agent: Turocy & Watson, LLP

20100141319 - Clock signal output circuit: A clock signal output circuit includes a clock signal source which produces a clock signal, a buffer circuit which drives the clock signal while adjusting rise and fall times of the clock signal according to control signals, a rise-time frequency generator, responsive to the control signals, which produces a rise-time... Agent: Katten Muchin Rosenman LLP

20100141320 - Power management and control apparatus for resetting a latched protection in a power supply unit: A controller which has functions of remote control, multiple protection and PWM inside. The controller can shut down and latch the converter, when a failure happens (such as under voltage and over voltage of output, and over power protection). But, under-voltage and over-power protection will also happen when Vin is... Agent: Bacon & Thomas, PLLC

20100141321 - Buffer enable signal generating circuit and input circuit using the same: An input circuit comprises a buffer enable signal generating circuit for generating a buffer enable signal having an predetermined enable period in response to an external command, and a buffer circuit for buffering and outputting the external command and an external address signal in response to the buffer enable signal.... Agent: Cooper & Dunham, LLP

20100141322 - Non-volatile state retention latch: Electronic circuits use latches including a magnetic tunnel junction (MTJ) structure and logic circuitry arranged to produce a selective state in the MTJ structure. Because the selective state is maintained magnetically, the state of the latch or electronic circuit can be maintained even while power is removed from the electronic... Agent: Qualcomm Incorporated

20100141323 - Delay line: A delay line has a high response speed by minimizing the amount of loading on an input node and an output node while delaying an input signal over a wide variation range. The delay line includes a forward delay unit configured to determine the length of a forward delay path... Agent: Ip & T Law Firm PLC

20100141324 - Mixed-voltage tolerant i/o buffer and output buffer circuit thereof: An output buffer circuit includes a high voltage detecting circuit, a dynamic gate bias generating circuit, an output stage circuit and a pad voltage detector. The high voltage detecting circuit detects a power supply voltage and generates a first and a second determining signals and a first and a second... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100141325 - Method and arrangement for a linear mixer: A combination mixer arrangement comprising a first mixer and a second mixer coupled in parallel between first and second input ports and an output port. The mixers are arranged to be driven simultaneously by an input signal provided at the second input port. They are de-coupled, so a bias voltage... Agent: Ericsson Inc.

20100141326 - Driver circuit and method for reducing electromagnetic interference: An apparatus and a method switch a load through a power transistor. The apparatus includes: a first current generator for generating a current to charge a capacitance of a control terminal of the power transistor during power on of the power transistor; a second current generator for generating a current... Agent: Seed Intellectual Property Law Group PLLC

20100141327 - Compensation of nonlinearity of single ended digital to analog converters: This disclosure relates to a compensating for nonlinearity resulting from a capacitance feedback in current cells of a single ended digital to analog circuit.... Agent: Spryip, LLC Ifx

20100141328 - Dll-based temperature sensor: A temperature sensor includes an open-loop delay line comprising plural delay cells and a multiplexer configured to select a first number of the plural delay cells; a delay-locked loop comprising plural delay cells and a multiplexer configured to select a second number of the plural delay cells; a clock coupled... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20100141329 - Temperature sensor and method of compensating for change in output characteristic due to varying temperature: Described is a method and apparatus for compensating for a change in an output characteristic of a temperature sensor due to varying temperature. The temperature sensor includes a temperature sensing core, an analog-to-digital converter, a counter, and a temperature compensating circuit. The temperature sensing core generates a sense voltage corresponding... Agent: Harness, Dickey & Pierce, P.L.C

20100141330 - Power-down circuit with self-biased compensation circuit: A circuit includes a first power supply node at a first power supply voltage; a gated-node; and a first control device coupled between the first power supply node and the gated-node. The first control device is configured to pass the first power supply voltage to the gated-node or to disconnect... Agent: Slater & Matsil, L.L.P.

20100141332 - Internal voltage generator of semiconductor device: An internal voltage generator of a semiconductor device includes a charge pumping unit for performing a charge pumping operation on the basis of the voltage level of a reference voltage to generate a charge pumped voltage having a voltage level higher than the external power supply voltage; and an internal... Agent: Ip & T Law Firm PLC

20100141331 - Method of forming a charge pump controller and structure therefor: In one embodiment, a charge pump controller is configured with transistors having at least two different selectable on-resistance values may be used to charge a pump capacitor.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100141333 - Reservoir capacitor array circuit: A reservoir capacitor array circuit capable of allowing an internal voltage to be maintained stably, comprises a plurality of reservoir capacitors, each of the reservoir capacitors including a switch element which is connected between a power source voltage and a prescribed node and switched in response to a test enable... Agent: Cooper & Dunham, LLP

20100141334 - Bias circuit scheme for improved reliability in high voltage supply with low voltage device: Disclosed is a bias circuit with a first resistor connected between the supply voltage and a feedback node. Resistors are connected in series between the feedback node and the reference supply voltage. The connections between the resistors define at least one bias voltage. A second resistor is connected between the... Agent: Cochran Freund & Young LLC Lsi Corporation

20100141335 - Current mirror circuit, in particular for a non-volatile memory device: A current mirror circuit is provided with a first current mirror including a first and a second mirror transistors sharing a common control terminal; the first mirror transistor has a conduction terminal for receiving, during a first operating condition, a first reference current, and the second mirror transistor has a... Agent: Seed Intellectual Property Law Group PLLC

20100134150 - Power ic and driving method thereof: A power integration circuit includes: a first transistor having a control electrode connected to a first voltage source to be supplied with a control signal therefrom, the first transistor being connected between a switch and a ground. A sense resistor has one end connected to the ground. A second transistor... Agent: Sung-min Park

20100134151 - Method for locking a synthesised output signal of a synthesised waveform synthesiser in a phase relationship: A digital waveform synthesiser (1) is implemented as a single chip integrated circuit on a single chip (2) and comprises a direct digital synthesiser (10) which produces a synthesised output signal waveform on an output terminal (4) which is substantially phase and frequency locked to the phase and frequency of... Agent: Goodwin Procter LLP Patent Administrator

20100134152 - Phase interpolator: A phase interpolator receiving a first signal having an oscillation frequency Fin and providing a second signal having said oscillation frequency and having a phase shift Δφ with respect to the first signal which depends on a third signal. The interpolator includes a variable phase-shifter receiving the first signal and... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100134153 - Low latency multi-level communication interface: A multiphase receiver to compensate for intersymbol interference in the sampling of an input signal includes a first integrating receiver to integrate and sample data of the input signal on a first phase of a clock and a second integrating receiver to integrate and sample data of the input signal... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100134154 - Odd number frequency dividing circuit: A method and a frequency dividing circuit (1) for dividing a frequency of an input clock signal (CLKin) by an odd number to generate an output clock signal (CLKout) with a lower frequency comprising at least two serially connected edge triggered latches clocked by said input clock signal (CLKin), wherein... Agent: Docket Clerk

20100134155 - Power-down mode control apparatus and dll circuit having the same: A power-down mode control apparatus includes an internal power-down control block configured to receive a locking completion signal and to generate an internal power-down signal, which is toggled for a predetermined time; a noise check block configured to check occurrence/non-occurrence of noise on the basis of a phase detection signal... Agent: Baker & Mckenzie LLP Patent Department

20100134158 - Clock extraction device with digital phase lock, requiring no external control: A device for extracting a clock signal from a baseband serial signal, includes an injection-locked oscillator (19), a phase-locked loop (25) including a digital phase detector (26). The oscillator (19) includes a digital input for controlling the value of its natural frequency, and the phase-locked loop (25) includes a counting... Agent: Young & Thompson

20100134160 - Frequency synthesizer: There is provided a frequency synthesizer. The frequency synthesizer includes a frequency oscillator adjusting an output frequency according to a control bit; a programmable divider having a preset minimum division ratio, the programming divider dividing the output frequency of the frequency oscillator at a variable division ratio; a counter unit... Agent: Ampacc Law Group

20100134157 - Pll circuit and method of cotrolling the same: A PLL circuit according to an exemplary aspect of the present invention includes: a PFD that detects a phase difference between two clock signals; an LPF that outputs a voltage based on a detection result of the PFD; a VCO that controls a frequency of a VCO output clock output... Agent: Mcginn Intellectual Property Law Group, PLLC

20100134159 - Soft reference switch for phase locked loop: A phase locked loop includes a digital controlled oscillator and a number of phase detectors, each having a first input connected to a reference source and a second input coupled to the output of the digital controlled oscillator, and an output for producing a phase error signal. A loop filter... Agent: Marks & Clerk

20100134156 - Tri-state delay-typed phase lock loop: The present invention relates to a tri-state delay-typed phase lock loop, which comprises: a phase and frequency detector, a mode detector, a mode selector, a first sampling delay unit, a plurality of counters, a second sampling delay unit, and a phase and frequency calculator. The phase and frequency of the... Agent: Wpat, PC Intellectual Property Attorneys

20100134162 - Clock signal generation circuit: A clock signal generation apparatus includes a clock signal generation circuit generating a plurality of clock signals, and a self-test circuit measuring a phase difference of one pair of clock signals. The self-test circuit includes a clock signal selection circuit selecting the pair of clock signals among the plurality of... Agent: Arent Fox LLP

20100134161 - Phase detector circuit for automatically detecting 270 and 540 degree phase shifts: Embodiments include implementing a phase detector for a delay-locked loop (DLL) circuit that is operable to detect substantially 270 degree and substantially 540 degree phase differences between two clock signals. In an embodiment, a DLL circuit comprises a delay line receiving a system clock signal and generating a substantially 270... Agent: Courtney Staniford & Gregory LLP

20100134163 - Semiconductor integrated circuit: A phase locked loop (PLL) which has a desired frequency characteristic even though a manufacturing process of a semiconductor integrated circuit has fluctuations. The semiconductor integrated circuit includes the PLL and a control unit. The PLL has a phase frequency detector, a loop filter, a voltage controlled oscillator (VCO) and... Agent: Mattingly & Malur, P.C.

20100134164 - Delay locked loop circuit: A delay locked loop circuit includes a delay locking block configured to delay an input clock and output the delayed input clock as an internal clock to compensate a skew of an external clock and the internal clock, a pulse generating block configured to sequentially output a plurality of pulse... Agent: Ip & T Law Firm PLC

20100134166 - System and method for an accuracy-enhanced dll during a measure initialization mode: A clock generator having a delay locked loop and a delay control circuit. The delay locked loop receives an input clock signal and adjusts an adjustable delay circuit to generate an output clock signal that is synchronized with received input clock signal. The delay control circuit coupled to the delay... Agent: Dorsey & Whitney LLP Intellectual Property Department

20100134165 - Time-to-digital converter and all-digital phase-locked loop: A time-to-digital converter (TDC) includes a converter which receives a first signal and a second signal, delays the second signal in phases using a plurality of delay elements which are coupled in series, compares the delayed second signal with the first signal, and outputs a phase error of the second... Agent: Sughrue Mion, PLLC

20100134167 - Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptation: The device degradation of integrated circuits may be compensated for by appropriately adapting the duty cycle of the clock signal. For this purpose, a correlation between the duty cycle and the overall performance characteristics of the integrated circuit may be established and may be used during the normal field operation... Agent: Williams, Morgan & Amerson

20100134168 - System, method and apparatus having improved pulse width modulation frequency resolution: Using a combination of frequency dithering of a PWM counter and a variable time delay circuit yields improved PWM frequency resolution with realizable circuit components and clock operating frequencies. A controllable time delay circuit lengthens a PWM signal during the first PWM cycle. During the second PWM cycle, the PWM... Agent: King & Spalding LLP

20100134169 - Delay circuit: A delay circuit includes a ring oscillator and a control circuit. The control circuit includes an edge detector that outputs a first control signal in response to a rising edge or a falling edge of an input signal, and a counter that counts the number of pulses of an output... Agent: Mcginn Intellectual Property Law Group, PLLC

20100134170 - Delay cell of ring oscillator and associated method: A delay cell for use in a ring oscillator and associated method is provided. The delay cell includes a differential amplifier, a switched capacitance bank, and a Kvco equalizer. The differential amplifier comprises a differential pair, a first load and a second load. The differential pair includes a positive input... Agent: Wpat, PC Intellectual Property Attorneys

20100134171 - Clock generation circuit and integrated circuit: A clock generation circuit comprises: a first generation unit; a second generation unit; and a control unit that, using a plurality of third delay elements that respectively have a propagation delay time that correlates with the propagation delay time of a first delay element, and correlates with the propagation delay... Agent: Fitzpatrick Cella Harper & Scinto

20100134172 - Charge-sharing method and device for clock signal generation: A clock generation circuit has two output ends to provide a first clock signal and a second clock signal, in response to first and second input signals, respectively. A charge storage component is used to transfer some charge from the first output end to the charge storage component when the... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20100134173 - Integrator-based common-mode stabilization technique for pseudo-differential switched-capacitor circuits: A pseudo-differential switched-capacitor circuit using integrator-based common-mode stabilization technique is disclosed. A pseudo-differential switched-capacitor circuit with the differential floating sampling (DFS) technique has a common-mode gain value of one (1). An integrator is electrically coupled to the differential positive/negative outputs of the DFS circuit, and the integrator feeds back integrator... Agent: Stout, Uxa, Buyan & Mullins LLP

20100134174 - Circuit arrangement comprising feedback protection for switching in power applications: Disclosed is a circuit arrangement comprising feedback protection for switching the current flow in power applications. Said circuit arrangement comprises two serially connected MOSFETs (1, 2) on the conductor branch that is to be switched. Said MOSFETs are connected such that the inverse diodes thereof are arranged opposite each other... Agent: Ratnerprestia

20100134175 - Antifuse circuit having protection circuit: An antifuse circuit includes a protection circuit. The antifuse circuit receives a program voltage using a non-connection (NC) pin or ball of a semiconductor device. The protection circuit prevents an unintended voltage lower than the program voltage from being applied to the antifuse circuit.... Agent: F. Chau & Associates, LLC

20100134176 - Electronic device including circuitry comprising open failure-susceptible components, and open failure-actuated anti-fuse pathway: An electronic device including series-connected open failure-susceptible components and re-routing assemblies for directing current through an ancillary current path to maintain operability of the series array despite an open-failed component therein. The re-routing assembly can be constituted as an ancillary circuit containing a bypass control element arranged to maintain the... Agent: Intellectual Property / Technology Law

20100134178 - Boost circuit: A boost circuit includes: first transistors connected in series between a voltage input node and a voltage output node to constitute a charge transfer circuit; and first capacitors, one ends of which are coupled to the respective connection nodes between the first transistors, the other ends thereof being applied with... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100134177 - Charge pump circuit and method thereof: A charge pump circuit includes a charging capacitor, a plurality of pumping capacitors, a charging circuit, and a pumping circuit. The charging circuit is configured for charging the charging capacitor when the charge pump circuit is under a charging phase; and the pumping circuit is configured for coupling the charging... Agent: North America Intellectual Property Corporation

20100134179 - Circuit arrangement including voltage supply circuit: One embodiment of a circuit arrangement includes first and second input voltage terminals for applying an input voltage, and at least one first semiconductor switching element having a drive terminal and a load path, the load path being connected between the input voltage terminals. A drive circuit is configured to... Agent: Dicke, Billig & Czaja

20100134180 - Bandgap-referenced thermal sensor: A thermal sensor for an integrated circuit including a bandgap reference circuit. The thermal sensor includes a comparator that compares a temperature dependent voltage generated by the bandgap reference circuit to a temperature independent voltage, where both temperatures are referenced to the bandgap reference voltage generated by the bandgap reference... Agent: Bever Hoffman & Harms, LLP 901 Campisi Way

20100134182 - Apparatus and method for improving drive-strength and leakage of deep submicron mos transistors: An apparatus and method of manufacture for metal-oxide semiconductor (MOS) transistors is disclosed. Devices in accordance with the invention are operable at voltages below 2V. The devices are area efficient, have improved drive strength, and have reduced leakage current. A dynamic threshold voltage control scheme comprised of a forward biased... Agent: Glenn Patent Group

20100134181 - Circuit for switchably connecting an input node and an output node: A switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the input node to the output node in response to a switching signal. A sensor is provided for sensing the voltage between the input and output nodes... Agent: Kenyon & Kenyon LLP

20100134183 - Semiconductor device having electrode pad, and wireless circuit device including the semiconductor device: A semiconductor device includes a layered region (104) formed in a semiconductor substrate (101) of a first conductivity type, and an electrode pad (106) formed on the semiconductor substrate with an interlayer insulating film (105) interposed therebetween and placed above the layered region. The layered region includes a first impurity... Agent: Mcdermott Will & Emery LLP