|Miscellaneous active electrical nonlinear devices, circuits, and systems patents - Monitor Patents|
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Miscellaneous active electrical nonlinear devices, circuits, and systems December patent applications/inventions, industry category 12/09Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 12/31/2009 > patent applications in patent subcategories. patent applications/inventions, industry category
20090322379 - Peak hold circuit: A peak hold circuit includes an input transistor, which is provided with an input signal, and a first hold capacitor, which holds a maximum or minimum value of the input signal. A correction circuit, which corrects the hold voltage held by the first hold capacitor, includes an operational amplifier, which... Agent: Arent Fox LLP
20090322380 - Drive circuit device for a power semiconductor, and signal transfer circuit device for use therein: A power semiconductor drive circuit device includes: an electronic control device generating a control input signal; a signal transfer circuit device having a main path and a self-diagnosis functional block; and a power semiconductor driven by the control output signal from the signal transfer circuit device. The self-diagnosis functional block... Agent: Fish & Richardson P.C. Citigroup Center
20090322381 - Light receiving circuit, light receiving method, and storage medium: The PD converts the light into a current signal and supplies the converted a current signal to a TIA and a light intensity measuring unit. The TIA converts the current signal into a voltage signal. The CDR circuit identifies whether the voltage signal is 1 data or 0 data for... Agent: Mr. Jackson Chen
20090322382 - Semiconductor device, driving method thereof and electronic device: The invention provides a semiconductor device having a current input type pixel in which a signal write speed is increased and an effect of variations between adjacent transistors is reduced. When a set operation is performed (write a signal), a source-drain voltage of one of two transistors connected in series... Agent: Fish & Richardson P.C.
20090322383 - Semiconductor device, signal transmitter, and signal transmission method: A semiconductor device is provided with a plurality of semiconductor chips and at least one transmission coil (108) for transmitting signals by using inductor coupling between the semiconductor chips. A plurality of transmission coils are connected in series.... Agent: Sughrue Mion, PLLC
20090322384 - Drive and startup for a switched capacitor divider: Drive and startup circuits are described particularly suitable for use with a switched capacitor divider. In one example, a drive circuit has a level shifter coupled to a gate of each switch of a switched capacitor drive circuit to couple alternating current into the respective gate, a positive phase low... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090322385 - Device having clock generating capabilities and a method for generating a clock signal: A method for generating a clock signal and a device having clock generating capabilities, the device includes: (i) a first divider, adapted to receive an input clock signal and divide the input clock signal to provide a first clock signal; (ii) a second divider, adapted to receive an input clock... Agent: Freescale Semiconductor, Inc. Law Department
20090322386 - Programmable divider apparatus and method for the same: A programmable divider apparatus comprises a first divider, a second divider, a feedback control unit, and a plurality of control signals. The first divider provides a frequency division operation of division by at least three integers, the second divider is cascaded to the first divider to provide a frequency division... Agent: Hdls Patent & Trademark Services
20090322387 - Output enable signal generation circuit for semiconductor memory device: A circuit for generating an output enable signal includes a reset signal generator for synchronizing a reset signal with an external clock signal to generate an output enable (OE) reset signal, synchronizers for synchronizing the OE reset signal with an internal clock signal to generate a source reset signal, and... Agent: Ip & T Law Firm PLC
20090322388 - Multi-phase correction circuit: A multi-phase correction circuit adjusts the phase relationship among multiple clock signals such that their rising edges are equidistant in time from one another.... Agent: Woodcock Washburn LLP (microsoft Corporation)
20090322392 - Digital delay locked loop circuit: A phase determination section determines the quantity of first fixed delay elements for delaying a clock signal by one cycle and generates a selection signal indicating the determination result. A phase adjustment section determines, based on the selection signal, the quantity of second fixed delay elements for delaying an input... Agent: Arent Fox LLP
20090322390 - Duty cycle correction circuit and delay locked loop circuit including the same: A duty cycle correction circuit and a delay locked loop circuit including the same are capable of reducing area and power consumption of a circuit. The delay locked loop circuit includes a delay locked loop unit, a delay controller, a duty cycle ratio correction circuit, and a duty cycle ratio... Agent: Ip & T Law Firm PLC
20090322389 - Jitter attenuating delay locked loop (dll) using a regenerative delay line: In general, in one aspect, the disclosure describes a delay locked loop (DLL) with a regenerative delay line that includes a cascade of delay stages. A first delay stage includes a two-input delay device which receives a 180 degree phase shifted signal as feedback. This feedback signal configures the delay... Agent: RyderIPLaw C/o Cpa Global
20090322391 - Phase synchronization apparatus: A phase synchronization apparatus includes a bias control unit configured to sequentially delay an input clock signal to generate bias control signals having multiple bits, a bias generation unit configured to generate a pull-up bias voltage having a level that corresponds to logical values of the bias control signals, and... Agent: Baker & Mckenzie LLP Patent Department
20090322393 - Edge-timing adjustment circuit: According to some embodiments, a method and system are provided to receive a clock input at a first clock adjustment tuner, receive the clock input at a second clock adjustment tuner, output a tuned inverted rising clock signal via the first clock adjustment tuner, output a tuned inverted falling clock... Agent: Buckley, Maschoff & Talwalkar LLC
20090322394 - Ring oscillator and multi-phase clock correction circuit using the same: A ring oscillator including a plurality of buffer units, each of which has a cross-coupled structure, for generating clock signals using a bias voltage having a predetermined voltage level applied thereto, wherein the clock signals have a swing width corresponding to the bias voltage.... Agent: Ip & T Law Firm PLC
20090322395 - Transmission path driving circuit: A transmission line driving circuit that can support a high-rate signal transmission and further can perform appropriate loss compensation in accordance with a signal pattern. A transmission line driving circuit 1 comprises a plurality of driver input circuits 20 that serve as signal analyzing unit for analyzing the content of... Agent: Patenttm.us
20090322396 - Circuit to reduce duty cycle distortion: A method and a circuit for correcting duty cycle distortion. A delay insertion gate corrects data dependent delay distortion that is generated by CMOS flip-flop circuits. The delay insertion gate includes two field effect transistors and a current mirror. The two transistors each respectively receive an input signal from an... Agent: Honeywell/s&s Patent Services
20090322397 - Delay circuit and related method thereof: A delay circuit comprising a delay measurement unit, a delay mapping unit and a map delay module. The delay measurement unit generates a mapping table according to a reference signal and a reference clock signal. The delay mapping unit generates a mapped delay selection signal according to an input selection... Agent: North America Intellectual Property Corporation
20090322398 - Dual-path clocking architecture: A method and device are disclosed. In one embodiment the method includes driving a first clock domain reference signal on a first clock tree and driving a second clock domain reference signal on a second clock tree. The first tree routes the first signal from a PLL to a first... Agent: Intel Corporation C/o Cpa Global
20090322399 - Clock generating circuit and clock generating method thereof: A clock generating circuit, including a pulse generating unit to generate a plurality of pulse signals based on a reference clock, the pulse signals each having the same period, a phase difference between the adjacent pulse signals being a first phase difference; and a multi-phase clock generating unit to generate... Agent: Ip & T Law Firm PLC
20090322400 - Integrated circuit with non-crystal oscillator reference clock: An integrated circuit with a non-crystal reference clock includes: an oscillator adapted to generate and transmit an oscillator output signal, wherein the oscillator includes at least one of an inductor, a resistor, and a capacitor; a comparator adapted to receive the oscillator output signal and a calibration input signal, compare... Agent: Fraser Clemens Martin & Miller LLC
20090322401 - Method and apparatus for an event tolerant storage circuit: An apparatus for an event tolerant circuit including a latch. The event tolerant circuit may maintain correct data values even after the occurrence of an event such as a soft error. The event tolerant circuit may introduce a delay in a feedback loop, thereby passing the glitch value to an... Agent: Dorsey & Whitney LLP On Behalf Of Sun Microsystems, Inc.
20090322402 - Semiconductor integrated circuit device: A semiconductor integrated circuit device provided with a first circuit block BLK1, a second circuit block DRV1 and a conversion circuit MIO1 for connecting the first circuit block to the second circuit block. The first circuit block includes a first mode for applying a supply voltage and a second mode... Agent: Mattingly & Malur, P.C.
20090322403 - Multiple-phase, differential sampling and steering: Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to corresponding control signals, which may be out of phase with respect to one... Agent: Garrett Ip, LLC
20090322404 - Arrangement, use of an arrangement, reference voltage source and method for generating a voltage value linearly proportional to the temperature: The invention relates to an arrangement comprising a logarithmizing unit and a subtracting unit, wherein the subtracting unit has an output at which a voltage value linearly proportional to the temperature can be tapped off.... Agent: Coats & Bennett/infineon Technologies
20090322405 - Enhanced transistor gate drive: An enhanced transistor gate drive is disclosed in which a pair of Kelvin sense leads measure the voltage potential across at the gate and source of the transistor. The difference in the voltage potential of the Kelvin sense lead from the gate and the Kelvin sense lead of the source... Agent: Baker Botts, LLP
20090322406 - Semiconductor integrated circuit: A semiconductor integrated circuit includes a core circuit, a power supply switch situated on a path providing a current to the core circuit and configured to control a state of current supply to the core circuit in response to a control signal applied to a control node, a clamp circuit... Agent: Arent Fox LLP
20090322407 - Speed recognition for half bridge control: Circuit and method for controlling a high bridge circuit with increased efficiency is disclosed. Circuitry is provided outputting gating signals to a high side driver and a low side driver responsive to a time varying input signal. A frequency measurement circuit determines a high speed mode when the input signal... Agent: Slater & Matsil LLP
20090322408 - Method for reducing switching power loss: A method of controlling a switch in a power converter in order to reduce switching power loss is disclosed. A trigger voltage level is set and the voltage level across the switch VDS is measured. If the voltage level of VDS is lower than the trigger voltage level the slope... Agent: Sinorica, LLC
20090322409 - Power reduction apparatus and method: Provided is an approach to saving active power through lowering a supply voltage when operating temperature goes up, while substantially maintaining operating performance.... Agent: Intel Corporation C/o Cpa Global
20090322410 - System and method for monitoring a capacitive sensor array: A capacitive touch sensor circuitry comprises an interface for interconnecting with a plurality of I/O pins that connect to rows and columns of a capacitive sensor array. Monitoring circuitry, responsive to inputs from the plurality of I/O pins, determines when a capacitive switch in the capacitive sensor array has been... Agent: Howison & Arnott, L.l.p
20090322411 - Circuit and method for avoiding soft errors in storage devices: A storage element within a circuit design is identified. The storage element is replaced with both a first storage cell and a second storage cell. The second storage cell operates as a redundant storage cell to the first storage cell. An output of the first storage cell is connected to... Agent: Freescale Semiconductor, Inc. Law Department
20090322412 - Systems and methods for adjusting threshold voltage: Systems and methods for adjusting threshold voltage. A threshold voltage of a transistor of an integrated circuit is measured. A bias voltage, which when applied to a body well of the transistor corrects a difference between the threshold voltage and a desired threshold voltage for the transistor, is determined. The... Agent: Transmeta C/o Murabito, Hao & Barnes LLP
20090322413 - Techniques of ripple reduction for charge pumps: A charge pump system for supplying an output voltage to a load is described. It includes a regulation circuit connected to receive the output voltage and derive an enable signal from it and multiple charge pump circuits connected in parallel to supply the output voltage. Each of the charge pump... Agent: Davis Wright Tremaine LLP - Sandisk Corporation
20090322414 - Integration of switched capacitor networks for power delivery: Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090322415 - Regulated energy supply for a circuit: The device (12) is used to supply energy to a rapid cycling and/or rapidly cycled integrated circuit (13) which comprises a circuit load (17) and an internal capacity (15) which is switched in parallel to the circuit load (17). The integrated circuit (13) has a high cycle frequency (f1) which... Agent: Fasse Patent Attorneys, P.A.
20090322416 - Bandgap voltage reference circuit: A voltage reference circuit is provided with: an operational amplifier circuit; first and second resistor elements; first and second diodes; and first and second transistors. The first resistor element and the first diode are connected in series between a first input terminal of the operational amplifier circuit and a reference... Agent: Mcginn Intellectual Property Law Group, PLLC
20090322417 - Semiconductor component arrangement having a component with a drift zone and a drift control zone: Disclosed is a semiconductor including a component having a drift zone and a drift control zone. A first connection zone is adjacent to the drift zone and is doped more highly than the drift zone. A drift control zone is arranged adjacent to the drift zone and is coupled to... Agent: Dicke, Billig & Czaja
20090322418 - Discrete time multi-rate analog filter: A discrete time analog filter suitable for use in a receiver and other electronics devices is described herein. In one exemplary design, an apparatus may include a transconductance amplifier, a sampler, and a discrete time analog filter. The transconductance amplifier may amplify a voltage input signal and provide an analog... Agent: Qualcomm Incorporated12/24/2009 > patent applications in patent subcategories. patent applications/inventions, industry category
20090315591 - Power up circuit with low power sleep mode operation: A power up circuit that having reduced power consumption during power saving modes, while maintaining an active flag signal indicating that the power supply voltage is satisfactory. This is achieved by turning off the power up circuit during the power saving mode, and using a status holding circuit to maintain... Agent: Borden Ladner Gervais LLP Anne Kinsman
20090315593 - Partial switch gate driver: A power switch driver includes a top driver switch, a bottom driver switch, a driver node between them, and driver logic. The power switch driver can turn on the power switch by controlling a gate voltage of the power switch to a first voltage level and to turn off the... Agent: Sidley Austin LLP
20090315592 - Preemphasis driver with replica bias: In one embodiment, a system includes a replica driver that includes n-type digital-to-analog converter (NDAC) current sources. The replica driver can produce a reference voltage based on current supplied by the NDAC current sources. The system includes driver fingers that are coupled to the replica driver and each include a... Agent: Baker Botts L.L.P.
20090315595 - Output drive circuit: An output drive circuit includes: a totem-pole output including: a high-side transistor (HST) with drain and source, an output stage power supply voltage applied to the drain, the source connected to the first node (N1); and a low-side transistor with source and drain, a ground voltage applied to the source,... Agent: Young & Thompson
20090315594 - Source/emitter follower buffer driving a switching load and having improved linearity: A source follower or emitter follower buffer provided according to an aspect of the present invention includes a capacitor connected between the input path and a node formed by the junction of a pair of transistors forming a cascoded current source connected to the output of the buffer. The capacitor... Agent: Texas Instruments Incorporated
20090315596 - Matching circuit for a complex radio frequency (rf) waveform: A complex waveform frequency matching device is disclosed. In various embodiments, the matching device comprises a plurality of radio frequency generators coupled in parallel with one another. Each subsequent one of the plurality of radio frequency generators is configured to produce a harmonic frequency related by an integral multiple to... Agent: Schwegman, Lundberg & Woessner, P.A.
20090315597 - Clock selection for a communications processor having a sleep mode: A clock selector operative on two clocks operating on different domains and responsive to a SELECT input provides a transition from a first clock to a second clock, and from a second clock to a first clock with a dead zone therebetween. The delay is provided by a doublet register... Agent: Jay Chesavage
20090315599 - Circuit with a regulated charge pump: A circuit, method for regulation, and use thereof is provided, whereby the circuit can include a charge pump that is connected to a supply voltage terminal in order to produce a pump voltage from a supply voltage, and includes a control circuit whose inputs are connected to the output of... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20090315598 - Constant voltage boost power supply: A constant voltage boost power supply according to an aspect of the invention includes a voltage-controlled variable frequency oscillator that produces and supplies a clock signal and changes an oscillating frequency of the supplied clock signal according to an input control voltage; a charge pump into which the clock signal... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090315600 - Locked-loop quiescence apparatus, systems, and methods: Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to... Agent: Schwegman, Lundberg & Woessner/micron
20090315601 - Device and method for timing error management: A device having timing error management capabilities and a method for timing error management. The device includes a first input node adapted to receive input data; a first latch, a second latch and a comparator, rising a first multiplexer and a second multiplexer; wherein the second multiplexer is adapted to... Agent: Freescale Semiconductor, Inc. Law Department
20090315602 - Single-ended to differential converter: A single-ended to differential converter is presented. The converter may be configured to convert full-swing single-ended signals to low-swing differential signals within a single-stage, thereby reducing signal distortion. The converter may include a passive network of resistive elements, for example resistors and/or metal oxide semiconductor (MOS) devices operating in a... Agent: Hamilton, Brook, Smith & Reynolds, P.C.
20090315603 - Detection of a disturbance in the state of an electronic circuit flip-flop: A method and a circuit for detecting a disturbance of a state of at least one first flip-flop from a group of several first flip-flops of an electronic circuit, wherein: the respective outputs of the first flip-flops in the group are, independently from their functional purpose, combined to provide a... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.
20090315604 - Clock signal generation apparatus and discrete-time circuit: In a clock signal generation apparatus, a clock signal delay calculation section has a delay detection circuit for monitoring the delay characteristics of the variable delay circuits of a clock signal generation circuit due to external variation factors and calculates the delay amounts of N-phase clock signals, and a clock... Agent: Ratnerprestia
20090315605 - Variable delay apparatus: It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the... Agent: Pearne & Gordon LLP
20090315606 - Output circuit: The present invention is aimed at providing an output circuit that is of relatively small scale and may perform adjustment to make the output-signal rise slew rate and the fall slew rate equal to each other. An output circuit includes a signal output unit configured to produce at a signal... Agent: Arent Fox LLP
20090315608 - Energy saving driving circuit and associated method for a solid state relay: An energy saving driving circuit and method is provided for use with a solid state relay (SSR). The circuit and method reduce the overall energy required to drive a solid state relay by maintaining the SSR in an “on” state with a minimal maintenance or holding current after applying a... Agent: Kathy Manke Avago Technologies Limited
20090315607 - Programmable circuit for drift compensation: Systems and methods relating to programmable circuits are described. Several embodiments relate to systems and methods for controlling the long-term stability and accuracy of circuits that produce waveforms varying in frequency and amplitude. Such embodiments may include a circuit comprising a common vacuum environment that houses a pair of heater-thermocouples.... Agent: Cooley Godward Kronish LLP Attn: Patent Group
20090315610 - Integrated circuit devices having level shifting circuits therein: Level shifting circuits generate multiple tracking signals that are in-phase with an input signal, but are also level-shifted with wider voltage swings relative to the input signal. These input tracking signals are provided as separate inputs to an inverter having at least one PMOS pull-up transistor and at least one... Agent: Myers Bigel Sibley & Sajovec
20090315609 - Level shift circuit and power semiconductor device: A level shift circuit includes a drive transistor, a first PMOS transistor, and first and second clamp transistors of PMOS type. The drive transistor, which drives the gate of the high-side NMOS transistor in a power semiconductor device, has a source-drain path coupled between a boot potential generated by a... Agent: Foley And Lardner LLP Suite 500
20090315611 - Quadrature mixer circuit: A mixer is disclosed. In one embodiment, the mixer includes a polyphase filter that generates linear quadrature signals. The mixer also includes a potentiometric mixer that performs a frequency-conversion operation on the quadrature signal. According to the embodiments disclosed herein, the output of the potentiometric mixer has high linearity.... Agent: Sawyer Law Group PC
20090315612 - Switch driver with low impedance initial drive and higher impedance final drive: A driver circuit (for example, in a switching power supply or in a Class-D switching amplifier) drives a gate of a switch during a transition with a low output impedance during an initial period and then for the remainder of the transition drives the gate with a midrange output impedance.... Agent: Imperium Patent Works
20090315613 - Semiconductor device: A semiconductor device includes a semiconductor element and a connector. The semiconductor element has a power device of a voltage drive type for controlling an on operation and an off operation of a main current by input of a drive signal. The connector receives the drive signal without making contact... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090315614 - Diversity signal processing system and a producing method thereof: Each of APRM units equipped for each of the diversity channels has printed circuit boards having circuit patterns thereon and a circuit description elements installed on the printed circuit board. The circuit description elements are FPGA elements manufactured by mutually different providers for example and implemented an electric circuit described... Agent: Foley And Lardner LLP Suite 500
20090315615 - Charge coupled pump-efficient charge pump regulator with mos capacitor: A charge pump with a MOS-type capacitor, where the MOS-type capacitor is operated in an inversion region in which capacitance varies as a function of the frequency of the applied signal. The charge pump is switched to transfer charge from an input node to the capacitor and from the capacitor... Agent: Vierra Magen/sandisk Corporation
20090315616 - Clock generator circuit for a charge pump: A charge pump system is formed on an integrated circuit that can be connected to an external power supply. The system includes a charge pump and a clock generator circuit. The clock circuit is coupled to provide a clock output, at whose frequency the charge pump operates and generates an... Agent: Davis Wright Tremaine LLP - Sandisk Corporation
20090315617 - Method and algorithm of high precision on-chip global biasing using integrated resistor calibration circuits: Systems and methods for providing bias currents to multiple analog circuits are disclosed. An integrated circuit comprises a calibration circuit which compares a high tolerance external component to a plurality of internal components manufactured to span the variability of the process, voltage and temperature. The best fitting internal component is... Agent: Conexant Systems, Inc
20090315618 - Current mirror circuit: A current mirror circuit includes a first transistor, a plurality of second transistors whose bases are connected to a base of the first transistor, and a compensation transistor having a gate connected to a collector of the first transistor, a source and a back gate connected to the base of... Agent: Osha Liang L.L.P.
20090315619 - Circuit for adjusting cutoff frequency of filter: A cutoff frequency adjusting circuit includes a filter circuit (1) provided with a plurality of resister elements, and a switch to one of the resister elements, and a capacitor. A cutoff frequency of the filter circuit (1) is determined by a resistor value of the resister element selected by the... Agent: Connolly Bove Lodge & Hutz LLP12/17/2009 > patent applications in patent subcategories. patent applications/inventions, industry category
20090309632 - High-side switch arrangement: High-side switch arrangement having a switching transistor, the collector of which is connected to a battery connection of the high-side switch arrangement and the emitter of which is connected to an output connection of the high-side switch arrangement, an actuating transistor, the emitter of which is connected to the battery... Agent: Timothy R. Wyckoff Infineon Technologies Ag - Patent Department
20090309633 - Charge pump for switched capacitor circuits with slew-rate control of in-rush current: A ramp-up circuit for switched capacitor circuits with negative feedback to control the slew rate of in-rush current. Other embodiments are described and claimed.... Agent: Perkins Coie LLP Patent-sea
20090309634 - Transistor gate driving circuit with power saving of power converter: A transistor gate driving circuit is developed for power saving. It includes a first high-side transistor, a second high-side transistor and a low-side transistor. A voltage clamp device is connected to the gate terminal of the first high-side transistor to limit the maximum output voltage. A detection circuit is coupled... Agent: Sinorica, LLC
20090309635 - Constant slope ramp circuits for sampled-data circuits: A circuit includes a level-crossing detector to generate a level-crossing detection signal when an input signal crosses a predetermined voltage level. A first stage set of capacitors is operatively coupled to the level-crossing detector. A ramp circuit is operatively coupled to the set of series-connected capacitors. A second stage set... Agent: Gauthier & Connors, LLP
20090309636 - Triangle wave generator and switching regulator: A switching regulator maintain an output voltage substantially constant by using a first comparator that compares a power supply voltage with the output voltage of the switching regulator, a triangle wave formation circuit that changes amplitude of a triangle wave according to an output signal of the first comparator, and... Agent: Mcginn Intellectual Property Law Group, PLLC
20090309637 - Delay line off-state control with power reduction: A method and apparatus is provided for controlling a delay line for achieving power reduction. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal, said delay lock loop comprising at least one delay circuit... Agent: Dorsey & Whitney LLP Intellectual Property Department
20090309638 - variable-length digitally-controlled delay chain with interpolation-based tuning: A programmable delay element, variable-length delay chain, and ring oscillator are disclosed. The programmable delay element performs phase interpolation of input signals in response to a control signal and can be used in combination with other delay elements to create a highly-modular, variable-length delay chain or ring oscillator. The ring... Agent: Townsend And Townsend And Crew, LLP
20090309639 - processing method and apparatus for energy saving of an active infrared induction instrument powered by a dry battery: An active infrared induction instrument powered by a dry battery capable of reducing power consumption through the adjustment of the emitter pulse width. The infrared emitting LED emits infrared signals, which, after being reflected by an object, are received by the infrared photodiode. The infrared signals received by the infrared... Agent: Ladas & Parry LLP
20090309640 - Semiconductor integrated circuit including a master-slave flip-flop: A semiconductor integrated circuit having a flip-flop with improve soft error resistance, including a controller which controls a clock signal generating circuit to output a first clock signal and a second clock signal with a timing so that logic of data retained in a first data retaining terminal becomes identical... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090309641 - Dual mode edge triggered flip-flop: An edge triggered flip-flop including at least one inverter and at least one transmission gate section. Each transmission gate section includes an upper part having a first transmission gate and a second transmission gate connected in series, the first transmission gate being controlled in accordance with a clock signal, and... Agent: Sherr & Vaughn, PLLC
20090309642 - Signal delay devices, clock distribution networks, and methods for delaying a signal: In one aspect, a signal delay device includes an inverter circuit, a positive feedback circuit, and a programmable element. The inverter circuit is connected between an input node and an output node, and the positive feedback circuit is connected between the output node and the inverter circuit. The programmable element... Agent: Volentine & Whitt PLLC
20090309643 - Insulating communication circuit: According to an embodiment of the present invention, an insulating communication circuit includes a first insulating circuit 62#11 having first and second circuits, a second insulating circuit 62#12 having third and fourth circuits, and a communication interface that is connected to a first ground and transmits a signal to the... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20090309644 - Method and apparatus to limit circuit delay dependence on voltage: The present disclosure is an apparatus for generating a decreasing delay with increasing input voltage to a predetermined voltage value at which point the delay may remain constant. The apparatus may include a circuit comprising a voltage regulator receiving an input voltage and two paths of inverters. At least two... Agent: Ibm Corporation (accsp) C/o Suiter Swantz PC Llo
20090309645 - Switched capacitor apparatus providing integration of an input signal: An apparatus includes an operational amplifier, a switched capacitor network, an optical sensor, and a clock. The switched capacitor network is coupled to an input terminal of the operational amplifier and coupled to an output terminal of the operational amplifier. The optical sensor includes a sensor output coupled to the... Agent: Schwegman, Lundberg & Woessner, P.A.
20090309646 - Random number generation device: A random number generation device includes: a first source region; a first drain region; a first channel region provided between the first source region and the first drain region; a first insulating film provided on the first channel region; and a first gate electrode provided on the first insulating film.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090309647 - High voltage tolerant pass-gate assembly for an integrated circuit: A high-voltage tolerant pass-gate assembly (18) for controlling an electrical signal between a first pad (12) and a second pad (14) includes a pass-gate (24) and a first native device (26). In certain embodiments, the first native device (26) is positioned between the first pad (12) and the pass-gate (24).... Agent: Roeder & Broder LLP
20090309648 - Single photon detection with self-quenching multiplication: A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a... Agent: Steinfl & Bruno
20090309649 - Active band-pass filter and magnetic storage device: An active band-pass filter has a negative feedback circuit including a series-connection of a band-pass block, a second-order band-elimination block having a denominator polynomial equal to the band-pass block and an amplifier block which amplifies the output of the band-elimination block. The band width can be controlled independently of the... Agent: Greer, Burns & Crain
20090309650 - Booster circuit: A booster circuit includes a first capacitance device and a switch which makes a first node and a one end of the first capacitance device conductive or non-conductive in response to a first control signal. The booster circuit applies a voltage, which is applied to the first node, to the... Agent: Mcginn Intellectual Property Law Group, PLLC
20090309651 - Booster circuit: A booster circuit includes a first booster unit configured to boost a power supply voltage to a predetermined voltage value, a transfer gate transistor transferring the voltage received from the first booster unit to an output terminal, a switching transistor connected between an input terminal receiving the voltage from the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.12/10/2009 > patent applications in patent subcategories. patent applications/inventions, industry category
20090302895 - Constant output common mode voltage of a pre-amplifier circuit: A method, apparatus and system of constant output common mode voltage of a pre-amplifier circuit are disclosed. In one embodiment, a system includes a first circuit, a comparator circuit coupled with an output of the first circuit, a pre-amplifier circuit of the comparator circuit, a tracking circuit coupled with a... Agent: Texas Instruments Incorporated
20090302896 - Signal conditioning circuit with a shared oscillator: A circuit for signal conditioning including a first stage with a digital/analog converter, a second stage with an I/Q-modulator, and at least one third stage with a mixer. Instead of a multiplicity of independent oscillators, a shared oscillator is provided for the first, second, and third stages, from an output... Agent: Ditthavong Mori & Steiner, P.C.
20090302897 - Driver circuit having high reliability and performance and semiconductor memory device including the same: Example embodiments relate to a driver circuit and a semiconductor memory device including the driver circuit. The driver circuit includes a pull-up unit configured to connect an output node to a first power supply voltage in response to an input signal, an interface unit connected between the output node and... Agent: Harness, Dickey & Pierce, P.L.C
20090302898 - Multichannel drive circuit: The invention provides a multichannel drive circuit by which, even when there occurs a variation between channels in circuit characteristics of each channel including current source due to the semiconductor manufacturing process and the like, loads of each channel constituting a load array can be driven under conditions uniform between... Agent: Edwards Angell Palmer & Dodge LLP
20090302899 - Differential inverse aliasing digital to analog converter: This invention relates to a process for producing a pulsed sampled waveform comprising generating a baseband signal representing the integral of a desired output waveform; sampling and differentiating the baseband signal to produce frequency images of the baseband spectrum at multiples of the sampling rate; employing an analog bandpass filter... Agent: HowardIPLaw Group
20090302900 - Frequency dividing device: In a frequency dividing device, a 1/P frequency divider subjects an input clock signal to 1/P frequency division. A phase shifter shifts the phase of the 1/P frequency signal and outputs multiple different Q-phase signals. A switch controls phase shifting in accordance with a division ratio control signal, to switch... Agent: Hanify & King Professional Corporation
20090302901 - Command decoder and command signal generating circuit: A command decoder generates a command signal based on first to fourth control signals in response to a second chip select signal generated by delaying a first chip select signal for a predetermined interval.... Agent: Cooper & Dunham, LLP
20090302903 - Driving apparatus, liquid crystal display having the same and driving method thereof: A driving apparatus resets driving circuits provided therein after an internal supply voltage reaches a sufficient voltage level. The driving apparatus includes a reset signal generator that resets the driving circuits when the internal supply voltage exceeds the external supply voltage in a rising period of the internal supply voltage.... Agent: F. Chau & Associates, LLC
20090302902 - Power up signal generation circuit and method for generating power up signal: A power up signal generation circuit transits a power up signal at a predetermined target voltage level by providing a predetermined hysteresis characteristic to the target voltage level of a power supply voltage corresponding to the power up signal. The power up signal generation circuit includes a first voltage detection... Agent: Ip & T Law Firm PLC
20090302905 - Method and apparatus for on-chip phase error measurement to determine jitter in phase-locked loops: An apparatus includes a phase-locked loop (PLL) circuit including a phase-frequency detector configured to output phase error signals. A phase error monitor circuit is configured to determine instantaneous peak phase error by logically combining the phase error signals and comparing pulse widths of the logically combined phase error signals to... Agent: Keusey, Tutunjian & Bitetto, P.C.
20090302906 - Method and apparatus for on-chip phase error measurement to determine jitter in phase-locked loops: An apparatus includes a phase-locked loop (PLL) circuit including a phase-frequency detector configured to output phase error signals. A phase error monitor circuit is configured to determine instantaneous peak phase error by logically combining the phase error signals and comparing pulse widths of the logically combined phase error signals to... Agent: Keosey, Tutunjian G Bitetto, P.C.
20090302904 - Phase frequency detector circuit for implementing low pll phase noise and low phase error: A method and Phase Frequency Detector (PFD) circuit for implementing low phase locked loop (PLL) phase noise and low phase error, and a design structure on which the subject circuit resides are provided. The PFD circuit includes a PFD latch receiving clock and reset signals, and PFD output driver circuit... Agent: Ibm Corporation RochesterIPLaw Dept 917
20090302907 - Circuit arrangement for producing a defined output signal: A circuit arrangement for producing a defined output signal in CMOS integrated circuit is provided in which the output of a sensor signal conditioning circuit is connected to the drain terminal of a first N channel depletion transistor, to a source terminal of a second N channel depletion transistor and... Agent: Heslin Rothenberg Farley & Mesiti PC
20090302908 - Oscillator and a tuning method of a loop bandwidth of a phase-locked-loop: There is provided an oscillator including: a reference signal generator that generates a reference signal having a reference frequency; a phase comparator that outputs a voltage in accordance with a phase difference between the reference signal and a feedback signal; a loop filter that receives a voltage output from the... Agent: Jianq Chyun Intellectual Property Office
20090302909 - Semiconductor device having delay locked loop and method for driving the same: A delay locked loop includes: a control voltage generator configured to generate a voltage control signal having a voltage level corresponding to a phase difference between an external clock and a feedback clock; a voltage controlled delay line configured to generate a plurality of output signals by reflecting a different... Agent: Ip & T Law Firm PLC
20090302910 - Delay time measuring method, delay time adjusting method, and variable delay circuit: A variable delay circuit 1 includes: a multistage delay circuit 20 constructed by connecting delay elements D1 to Dn in series; a selecting unit 21 which selects one delayed signal obtained by introducing different amounts of delay by passing a reference clock through one or more of the delay elements... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20090302911 - Frequency jitter generator and pwm controller: A frequency jitter generator and a frequency jitter PWM controller are provided for overcoming the shortcoming that a conventional PWM controller reduces the electromagnetic interference issue by means of varying the operating frequency of the PWM controller based on an input voltage, while resulting in the uncertainty of the range... Agent: Schmeiser, Olsen & Watts
20090302912 - Duty cycle correction circuit of semiconductor memory apparatus: A duty cycle correction circuit of a semiconductor memory apparatus includes a duty ratio correcting unit configured to correct a duty ratio of a clock signal according to levels of a first reference voltage and a second reference voltage, and to output the clock signal as a correction clock signal,... Agent: Baker & Mckenzie LLP Patent Department
20090302913 - Circuit and method for initializing an internal logic unit in a semiconductor memory device: Provided is a semiconductor memory device and a driving method for initializing an internal logic circuit within the semiconductor memory device under a stable state of a source voltage without an extra reset pin. The semiconductor memory device includes a power-up signal generating unit for generating a power-up signal; an... Agent: Blakely Sokoloff Taylor & Zafman LLP
20090302914 - Pad input signal processing circuit: A pad input signal processing circuit includes a control unit for setting a level of a pad output terminal to which a first control signal is input in response to a power up signal, and a signal output unit for outputting a command signal in response to a signal of... Agent: Cooper & Dunham, LLP
20090302915 - Low power and full rail-to-rail swing pseudo cml latch: The incorporation of MOS (metal oxide semiconductor) switches in the first stage of a CML latch, which act to bring about a significant savings in current usage, and thus lower power, as well as full rail-to-rail output swing. This/these switch(es) are also used to deactivate the first stage of the... Agent: Ibm Corporation RochesterIPLaw Dept. 917
20090302916 - Low power and full swing pseudo cml latched logic-gates: “Negative And” (NAND) logic gate metal oxide semiconductor field effect transistor (MOSFET) switch(es) incorporated in the first stage of a “pseudo” current mode logic (CML) latch to provide a low-resistance (or high-resistance) circuit path to the output depending on the input voltage. This/these switch(es) are also used to deactivate the... Agent: Ibm Corporation RochesterIPLaw Dept. 917
20090302917 - Delay circuit and test method for delay circuit: A delay circuit includes: a delay unit configured to delay an input signal and output the delayed signal; a selecting unit configured to select a first signal at the time of a normal operation or a second signal at the time of a test operation, and provide the selected signal... Agent: Staas & Halsey LLP
20090302918 - Clock signal generation apparatus: A clock signal generation apparatus containing variable delay devices for varying the delay time of two-phase clock signals used in a load circuit that uses non-overlap clock signals; a non-overlap detector for detecting a non-overlap time in the H-level zones of the two-phase clock signals and outputting a detection signal... Agent: Ratnerprestia
20090302919 - Phase shifter: A phase shifter includes a phase shifting unit for operating at a timing at which a clock signal becomes equal to or greater than a threshold value and outputting periodic signals having phases shifted by 90 degrees from each other; a DC voltage setting unit for setting a voltage value... Agent: Hanify & King Professional Corporation
20090302920 - Circuit, method for receiving a signal, and use of a random event generator: A circuit is provided that includes an input for a clock signal, a random event generator for outputting a random signal, in particular random numbers, a settable delay device that is connected to the input for the clock signal and is connected to the random event generator for the purpose... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20090302921 - Apparatus and method for generating clock signals of semiconductor integrated circuit: An apparatus for generating a clock signal of a semiconductor Integrated circuit includes a first clock driver block configured to generate a plurality of first clock signals, a second clock driver block configured to generate a plurality of second clock signals, and a controller configured to stop an operation of... Agent: Baker & Mckenzie LLP Patent Department
20090302922 - Input and output circuit apparatus: An input and output circuit apparatus includes a signal generating circuit configured to generate a first signal, an input and output circuit configured to receive the first signal from the signal generating circuit and a second signal to generate an output signal responsive to the first signal and the second... Agent: Arent Fox LLP
20090302923 - Terminated input buffer with offset cancellation circuit: A system and method for compensation of offset voltage in a digital differential input buffer driven by a terminated transmission line. Offset compensation currents are injected at the output of the first stage of the input buffer, which has a higher impedance than the terminated transmission line at the input... Agent: Dr. Mark M. Friedman C/o Bill Polkinghorn - Discovery Dispatch
20090302924 - Level shifter capable of improving current drivability: A level shifter circuit is provided that is capable of improving current drivability and executing stable operation with a low voltage by boosting a voltage level of an input signal. The level shifter circuit includes a level shifting unit for producing a boosted voltage by boosting an input signal and... Agent: Cooper & Dunham, LLP
20090302925 - Orthogonal signal output circuit: An orthogonal signal output circuit having an error correction function for correcting an orthogonal error, including: first and second differential circuits; and first to fourth variable resistors, wherein the first variable resistor is connected to a positive output of the first differential circuit and a positive output of the second... Agent: Katten Muchin Rosenman LLP
20090302926 - On-chip source termination in communication systems: An apparatus and system are provided to adjust an output voltage of an integrated circuit (IC) die. For instance, the apparatus can include an on-chip source termination and a bias generator. The bias generator can be configured to provide a source current to the on-chip source termination to adjust the... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20090302927 - Controlling a mos transistor: A device for controlling (10) a power transistor (5), comprises: an amplifying device (15) for monitoring the transistor gate (5) via an output control signal, the device including: a first input connected to the transistor drain, the whole assembly forming a first circuit portion; a second input connected to the... Agent: Berenato & White, LLC
20090302928 - Motion detector for animals: A motion detector, in particular suitable for animals, comprising at least one motion element, wherein an element movable within a predetermined area is located, which brings about an electrical connection in at least one position, wherein the movable element is a magnetic element, which can move along a path of... Agent: Jacobson Holman PLLC
20090302929 - Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices: Methods and apparatus are provided for varying one or more of a supply voltage and reference voltage in an integrated circuit, using independent control of a diode voltage in an asymmetrical double-gate device. An integrated circuit is provided that is controlled by one or more of a supply voltage and... Agent: Ryan, Mason & Lewis, LLP
20090302930 - Charge pump with vt cancellation through parallel structure: A charge pump circuit for generating an output voltage is described. The charge pump includes an output generation section and a threshold voltage cancelation section, where these sections have the same structure including a first branch, which receives a first clock signal and provides a first output, and a second... Agent: Davis Wright Tremaine LLP - Sandisk Corporation
20090302931 - Low-power voltage reference: A circuit provides a voltage reference using very low power. It can also be used as a shut regulator for a quiescent current as low as 1.5μA. It includes a transconductance amplifier, a gain stage, and a power transistor. One embodiment of this invention utilizes a work function difference between... Agent: Perkins Coie LLP Patent-sea
20090302932 - Feeding arrangement for an ultrasonic device: The invention relates to a powerful 3-point inverter that is triggered by a pulse width modulator (5). The generated inverter voltage (Upwm) is used as an input signal for the LLCC bandpass filter (8) comprising a parallel inductor (Lp) that is arranged parallel to the ultrasonic device and a series... Agent: Birch Stewart Kolasch & Birch
20090302933 - Tuning methods and apparatus for inductively coupled power transfer (icpt) systems: A method is provided for controlling a resonant circuit (1) of an ICPT system. The resonant circuit has a controlled variable reactance (2), and a predetermined perturbation is introduced in the magnitude of variable reactance. The change in a property of the resonant circuit in response to the perturbation is... Agent: Darby & Darby P.C.
20090302934 - Low-consumption switched-capacitor circuit: A switched-capacitor circuit including at least one first capacitor and a circuit for switching at least one armature of the first capacitor alternately to one and the other of two terminals at a switching frequency. The circuit further includes a second capacitor connected to the first capacitor at a node;... Agent: Vedder Price P.C.12/03/2009 > 39 patent applications in 32 patent subcategories. patent applications/inventions, industry category
20090295433 - Method and apparatus for measuring and compensating for static phase error in phase locked loops: A method and circuit for static phase error measurement includes a reference clock delay chain having a selectable number of delay elements. A number of the delay elements are enabled in accordance with a select length signal to delay a reference clock signal. A feedback signal delay chain also has... Agent: Keusey, Tutunjian & Bitetto, P.C.
20090295434 - Signal receiving device: A signal receiving device includes: a first conversion unit comprising a first input terminal to which a signal including a voltage signal and a reference voltage is inputted, and a first output terminal which output a first current signal voltage-current converted from the signal; a second conversion unit comprising a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090295435 - Method and apparatus for reducing spurs in a fractional-n synthesizer: A method and apparatus for reducing in-band spurs in a fractional-N synthesizer (100) includes generating a compensated current signal by a charge pump (108) coupled to a phase detector (106). The compensated current signal includes in-band spurs having frequencies within a frequency bandwidth associated with a loop filter (110). The... Agent: Motorola, Inc
20090295436 - Electronic circuit, frequency divider and radio set: A master stage 101 comprises a differential circuit composed of transistors 1 and 2, a differential circuit composed of transistors 3 and 4, a differential circuit composed of transistors 5 and 6, a load circuit 7 (a first load circuit), a load circuit 8 (a second load circuit), and a... Agent: Pearne & Gordon LLP
20090295437 - Signal waveform generating circuit and method: A signal waveform generating circuit includes a first part storing waveform data of a signal to be generated, a second part storing additional data for adjusting the waveform data, and a third part adjusting the waveform data read from the first part by the additional data read from the second... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20090295438 - Optimum timing of write and read clock paths: An apparatus and method for timing calibration of write and read-back data exchanges between respective dies of an external memory/external device has a master arbiter or, alternatively, a test mux between a system bus master interface and an external memory controller for driving the external memory/external device, a calibration circuit... Agent: Mendelsohn, Drucker, & Associates, P.C.
20090295439 - Phase lock loop (pll) with gain control: A Phase Lock Loop (PLL) with gain control is provided. The PLL has a dual-path configuration, where a first and a second VCO control voltage are generated in response to a phase or frequency difference between a PLL input signal and an output signal. The PLL comprises a dynamic voltage... Agent: Slater & Matsil, L.L.P.
20090295440 - Systems and methods for cancelling phase-locked loop supply noise: One embodiment of an apparatus for cancelling supply noise includes an input circuit operable to receive an input from a charge pump and a drive circuit connected to an output of the input circuit. The drive circuit is operable to provide an output matching the input to the input circuit... Agent: Texas Instruments Incorporated
20090295441 - Apparatus and method for multi-phase clock generation: An apparatus and method for multi-phase clock generation are disclosed. One embodiment of the apparatus includes a module generating first and second intermediate signals delayed from first edges of a clock signal having a first frequency. Each of the first and second intermediate signals has a second frequency that is... Agent: Knobbe Martens Olson & Bear LLP
20090295442 - Apparatus and method for multi-phase clock generation: An apparatus and method for multi-phase clock generation are disclosed. One embodiment of the apparatus includes a clock divider generating first and second intermediate signals having edges delayed from first edges of a clock signal having a first frequency. Each of the first and second intermediate signals has a second... Agent: Knobbe Martens Olson & Bear LLP
20090295443 - System and method for modifying signal characteristics: The present invention embodiments provide a system to modify signal characteristics to produce a desired signal. The system comprises a signal module to modify signal characteristics. The signal module includes at least one input to receive an input signal including a substantially rectangular signal and one or more control signals... Agent: Edell, Shapiro & Finnan, LLC
20090295445 - Double-edge pwm controller and its control method thereof: The present invention discloses a double-edge pulse width modulation (PWM) controller based on the output current and output voltage which is modulated in real time by the output current and the output voltage. The controller uses an extra first adder to sum up the compensation signal and a triangular signal... Agent: Perkins Coie LLP Patent-sea
20090295444 - Phase recovery circuit: A phase recovery circuit for avoiding noise interfering with the clock signal generated from an oscillator is disclosed. The phase recovery circuit includes a noise detector, a phase detector, and a phase locker. The noise detector detects noise and accordingly generates a noise detecting signal. The phase detector is triggered... Agent: North America Intellectual Property Corporation
20090295446 - Duty cycle correcting circuit and method of correcting a duty cycle: A duty cycle correcting circuit includes a duty ratio control unit configured to alternately change logical values of a plurality of bits of a pull-up control signal and a plurality of bits of a pull-down control signal in response to a duty ratio detection signal, a duty ratio correcting unit... Agent: Baker & Mckenzie LLP Patent Department
20090295447 - Apparatus and methods for a high-voltage latch: Some embodiments include a device having storage node and a latch circuit coupled to the storage node to latch data provided to the storage node during one of a first mode and a second mode of the device. The latch circuit includes a first transistor, a second transistor, and a... Agent: Schwegman, Lundberg & Woessner / Atmel
20090295448 - Radiation hardened cmos master latch with redundant clock input circuits and design structure therefor: A radiation hardened master latch for use in a programmable phase frequency divider operating at GHz frequencies is implemented in deep submicron CMOS technology, and consists of two identical half circuits interconnected in a DICE-type configuration that makes the master latch immune to a single event upset (SEU) affecting at... Agent: Ibm Corporation
20090295449 - Duty cycle measurement circuit for measuring and maintaining balanced clock duty cycle: A circuit and method for measuring duty cycle uncertainty in an on-chip global clock. A global clock is provided to a delay line at a local clock buffer. Delay line taps (inverter outputs) are inputs to a register that is clocked by the local clock buffer. The register captures clock... Agent: Law Office Of Charles W. Peterson, Jr. Yorktown
20090295450 - Signal processing apparatus, signal processing system and signal processing method: A signal processing apparatus is provided, which generates a data signal having a signal waveform corresponding to a first bit value of a signal waveform transitioning from a high level to a low level or a signal waveform transitioning from a low level to a high level, a pre-transition signal... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20090295452 - Boosting circuit: A boosting circuit configuration with high boosting efficiency is provided which is based on a boosting circuit that performs an operation in accordance with a two-phase clock and which includes a plurality (M≧4) of boosting cell sequences (units). A boosting cell in a K-th sequence (1≦K≦M) is controlled, depending on... Agent: Mcdermott Will & Emery LLP
20090295451 - Systems and methods of digital isolation with ac/dc channel merging: Systems and methods for digital isolation in circuits are provided. On power-up in an isolation application, there may be multiple power supplies. For example, one for an input side and one for an output side, both in relation to an isolation barrier. Upon power up, the input and output may... Agent: Texas Instruments Incorporated
20090295453 - Signal reading method, signal reading circuit, and image sensor: A signal reading method successively outputs a read signal by scanning a voltage value of an integrating capacitor in an image sensor in which a plurality of sensor parts are arranged in a two-dimensional array made up of rows and columns and each sensor part includes the integrating capacitor accumulating... Agent: Arent Fox LLP
20090295454 - Low voltage mixer circuit: A mixer circuit (102) for use in radio frequency (RF) equipment is disclosed. The mixer comprises a current source (Io) and a differential amplifier (Q1, Q2) connected to the current source and having input terminals (RF+, RF−) for receiving an RF input signal and output terminals (IF+, IF−) for providing... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20090295455 - System for controlling an electronic driver for a nebuliser: A system for controlling an electronic driver for a nebuliser or aerosol, the system comprising: an H-bridge driver for connection around a membrane to be driven; a voltage source for applying a voltage to the H-bridge driver; a feedback loop from the H-bridge to a phase shift oscillator, the output... Agent: John P. De Luca
20090295456 - Switching circuit and imaging apparatus utilizing the same: In a complementary-MOSFET driving circuit for driving the charge multiplication gate of an EM-CCD, a ferrite bead is connected to a conduction-termination direction diode in parallel thereto, the conduction-termination direction diode being inserted into the gate electrodes of complementary MOSFETs in series therewith, the impedance of the ferrite bead at... Agent: Brundidge & Stanger, P.C.
20090295457 - Cold temperature control in a semiconductor device: Operation of complex integrated circuits at low temperatures may be enhanced by providing active heating elements within the integrated circuit so as to raise the temperature of at least critical circuit portions at respective operational phases, such as upon power-up. Consequently, enhanced cold temperature performance may be obtained on the... Agent: Williams, Morgan & Amerson
20090295458 - Semiconductor integrated circuit and operation method for the same: The semiconductor integrated circuit is provided, in which an external temperature control or temperature monitoring is possible, with little influence by the noise of a system board which mounts the semiconductor integrated circuit. The semiconductor integrated circuit includes the temperature detection circuit which detects the chip temperature, and the functional... Agent: Miles & Stockbridge PC
20090295459 - Temperature control device: A temperature control device for controlling temperature of semiconductor device. The temperature control device comprising, a leak current detection unit for detecting leak current of the semiconductor device, and a temperature control unit for controlling temperature of the semiconductor device so that the leak current is within predetermined current range,... Agent: Staas & Halsey LLP
20090295460 - Electronic device and method for evaluating a variable capacitance: An apparatus is provided. The apparatus comprises a digital signal generator, an analog filter, an amplitude modulator, and an analog-to-digital converter (ADC). The digital signal generator has a demodulator and provides a digital excitation signal. The analog filter is coupled to the digital signal generator. The amplitude modulator has a... Agent: Texas Instruments Incorporated
20090295461 - Device configuration: A process and apparatus for configuring one or more integrated circuits within a device in a manufacturing process is described. In an exemplary process, a device is manufactured by assembling a chip onto a board such as a printed circuit substrate and the chip is fused from power routed across... Agent: Apple Inc./bstz Blakely Sokoloff Taylor & Zafman LLP
20090295462 - Voltage divider, constant voltage circuit using same, and trimming method in the voltage divider circuit: A voltage divider circuit generating a divided voltage by dividing an input voltage with a predetermined voltage division ratio, and outputting the divided voltage is disclosed. The voltage divider circuit includes a first resistor circuit including multiple resistors connected in series, the resistors being connected in parallel to corresponding fuses;... Agent: Dickstein Shapiro LLP
20090295463 - Semiconductor device: A semiconductor device includes a semiconductor substrate, a first lower-layer line for supplying power to a transistor formed on the semiconductor substrate, a first interlayer line which is connected to the first lower-layer line, and an allowable current of which is larger than that of the first lower-layer line; and... Agent: Mcginn Intellectual Property Law Group, PLLC
20090295464 - Booster circuit: Analog comparison circuits are provided, each of which compares the potentials of the same stage of a first boosting cell row and a second boosting cell row and selecting and outputting the lower potential. The P-well potentials of switching devices having a triple-well structure are controlled using the output potentials... Agent: Mcdermott Will & Emery LLP
20090295465 - All npn-transistor ptat current source: The present invention relates to an improved PTAT current source and a respective method for generating a PTAT current. Opportune collector currents are generated and forced in two transistors exploiting the logarithmic relation between the base-emitter voltage and the collector current of a transistor. A resistor senses a voltage difference... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20090295466 - Method to reduce variation in cmos delay: Controlled voltage circuit for compensating the performance variations in integrate circuits caused by voltage supply, temperature, and process variations is proposed. The controlled voltage circuit includes several MOSFET transistors connected in series, a unity gain operational amplifier, and a constant current source with an input terminal and an output terminal.... Agent: North America Intellectual Property Corporation
20090295467 - Circuitry and method for buffering a power mode control signal: A circuit has an input for receiving a power mode control signal to indicate a low power mode. A plurality of non-inverting buffers forms a fanout signal distribution network and provides buffering of the power mode control signal for gated power domain functional circuitry. Each non-inverting buffer has an even... Agent: Freescale Semiconductor, Inc. Law Department
20090295469 - Primary side control circuit and method for ultra-low idle power operation: A method and circuit for reducing power consumption during idle mode to ultra-low levels, such as about 1/10th to 1/1000th or less of active power is disclosed. An ultra-low idle power supply comprises a primary circuit, a secondary circuit and a control circuit. The control circuit monitors behavior of the... Agent: Snell & Wilmer L.L.P. (main)
20090295468 - System for minimizing the power consumption of a device in a power down mode: A system is disclosed for reducing power drain of a component when the component is in a powered down state. The system comprises a power input configured to receive power, a power output to the component, monitor logic configured to monitor a level of power moving between the input and... Agent: Gateway, Inc. Attn: Patent Attorney
20090295470 - Fast turn on active dcap cell: A fast active DCAP cell which has a short turn-on time, achieves a high capacitance density, and which minimizes leakage overhead during its normal operation mode is disclosed. The DCAP cell has a pair of PMOS transistors that have their drains connected to a gate of a PMOS transistor and... Agent: Lsi Corporation
20090295471 - Method for compensating the non-linear distortions of high-frequency signals and device for carrying out said method: The present invention refers to a method for compensating the non-linear distortions of high-frequency signals, especially when observing the amplitude modulated signals with narrow band receiver. The invention refers also to a device to carry out the said method. In the invention it is supposed that the ratio between the... Agent: Beem Patent Law FirmPrevious industry: Electronic digital logic circuitry
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