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Miscellaneous active electrical nonlinear devices, circuits, and systems October categorized by USPTO classification 10/09

20090256595 - Phase detecting module and detecting method thereof: A phase detecting module capable of optimizing detection accuracy and noise robustness, and a detecting method, are included. The phase detecting module includes a phase detecting circuit, an energy estimating circuit and a selecting circuit. The phase detecting circuit detects a phase of an input signal to generate a phase... Agent: Wpat, PC

20090256596 - Flip-flop, frequency divider and rf circuit having the same: A flip-flop, and a frequency divider and an RF circuit using the flip-flop. The frequency divider, which receives a first signal and generates a second signal by dividing a frequency of the first signal, including a plurality of flip-flops that each latch and output a signal based on the first... Agent: Stanzione & Kim, LLP

20090256597 - Power-on reset circuit: A power-on reset circuit according to an embodiment of the present invention includes an input control unit configured to generate a default input signal in response to a power-on reset signal and a clock, a counting unit configured to perform a counting operation in response to the default input signal... Agent: Townsend And Townsend And Crew, LLP

20090256598 - Power-up signal generator of semiconductor memory apparatus and method for controlling the same: A power-up signal generator of a semiconductor memory apparatus includes a power-up signal generating unit that includes a MOS transistor having a gate receiving a divided voltage of an external supply voltage, the power-up signal generating unit determining a level of a power-up signal according to a turn-ON state of... Agent: Baker & Mckenzie LLP Patent Department

20090256599 - Semiconductor integrated circuit device: In a semiconductor integrated circuit device generating internal power from external power, an abnormal operation may occur due to an indefinite state of a control signal when the external power is applied and the internal power rises. The semiconductor integrated circuit includes an internal power generating circuit, a control circuit... Agent: Mattingly & Malur, P.C.

20090256600 - Input clock detection circuit for powering down a pll-based system: An apparatus is provided for detecting the loss of an input clock signal for a phase-locked loop (PLL). The apparatus includes a time delay circuit, a first frequency divider and a digital logic circuit. The time delay circuit receives the input clock signal and outputs a first time-delayed clock signal.... Agent: Panitch Schwarze Belisario & Nadel LLP

20090256601 - Phase to digital converter in all digital phase locked loop: A phase to digital converter, all digital phase locked loop, and apparatus having an all digital phase locked loop are described herein. The phase to digital converter includes a phase to frequency converter driving a time to digital converter. The time to digital converter determines a magnitude and sign of... Agent: Qualcomm Incorporated

20090256602 - Variable loop bandwidth phase locked loop: An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may... Agent: Christopher P Maiorana, PC Lsi Corporation

20090256605 - Phase controlling apparatus, phase-control printed board, and controlling method: In response to an input signal, in a first delay line, a delay amount is added to a phase of the input signal by each delay unit. In a DLL circuit, in response to an external signal that can be externally switched to a signal different in frequency is accepted,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090256603 - Register controlled delay locked loop circuit: A register controlled delay locked loop (DLL) circuit, including: a phase comparator configured to compare phases of a source clock and a feedback clock with each other, and a clock delay circuit configured to delay a phase of an internal clock synchronized with a clock edge of the source clock... Agent: Mannava & Kang, P.C.

20090256604 - Register controlled delay locked loop circuit: A register controlled DLL circuit occupies a relatively small area in a semiconductor device by reducing the number of flip-flops for generating timing pulses that are used to control a DLL operation and sequentially toggled. The registered controlled DLL circuit for generating a DLL clock by delaying internal clocks includes... Agent: Mannava & Kang, P.C.

20090256606 - Digital signal input device and method of controlling the same: A digital signal input device has a first input terminal and a second input terminal, a charging circuit connected between the first input terminal and the second input terminal, and a digital signal detection unit that outputs a digital signal of a logical value corresponding to a level of a... Agent: Buchanan, Ingersoll & Rooney PC

20090256607 - Powered ring to maintain io independent of the core of an integrated circuit device: In an integrated circuit device, a power circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The device includes a power circuit disposed along the periphery of the device, the power circuit configured... Agent: Nvidia C/o Murabito, Hao & Barnes LLP

20090256608 - Low leakage data retention flip flop: A disclosed embodiment is a low leakage data retention flip flop comprising a master circuit for retaining data during sleep mode, wherein the master circuit is configured to receive a reduced supply voltage during the sleep mode. The flip flop includes a slave circuit having low threshold voltage transistors, where... Agent: Farjami & Farjami LLP

20090256609 - Low power flip flop through partially gated slave clock: A system and method for reducing power consumption within a flip-flop circuit on a semiconductor chip. A gated input clock signal is received by a slave latch. The gated input clock is derived from an ungated input clock signal and a clock gating condition. The clock gating condition determines when... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090256610 - Quadrature phase correction circuit: A quadrature phase correction circuit includes an N-bit code counter configured to generate an N-bit code value according to a detected phase difference when a quadrature phase correction is carried out; a storage configured to store N-bit code values according to a plurality of detected phase differences; and a controller... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090256611 - Semiconductor device and timing adjusting method for semiconductor device: In a semiconductor device, a delaying circuit is configured to delay an input signal based on an internal setting data to output as a timing signal. A delay determining section is configured to determine a delay state of each of a plurality of delay signals obtained by delaying the timing... Agent: Foley And Lardner LLP Suite 500

20090256612 - Delay circuit and semiconductor memory device including the same: A delay circuit that includes a logic gate through which an input signal passes, a capacitor configured to be charged and discharged at an output terminal of the logic gate and delaying the input signal, and a mirroring unit configured to constantly maintain current output by the logic gate by... Agent: Mannava & Kang, P.C.

20090256614 - Apparatus and method for generating clock signal: The invention is related to an apparatus and a method for generating an output clock. The method comprises: receiving a transmitted signal comprising at least one data signal and at least one synchronized signal; producing a reference signal according to the synchronization signal; counting the first reference signal according to... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090256613 - Pulse signal generating device, transport device, image forming apparatus, and pulse generating method: A pulse signal generating device includes: an encoder that outputs a pulse with a period corresponding to the speed of an object to be detected; a measurement unit that measures a period of the pulse; a storage unit that stores the measured period; an operation unit that calculates a reasonable... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090256615 - Pulse signal generating device, transport device, image forming apparatus, and pulse generating method: A pulse signal generating device includes: the plurality of encoders each of which outputs an encoder signal with a pulse period corresponding to the speed of an object to be detected; delay amount control unit that controls a relative delay amount with respect to a pulse signal for each of... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090256616 - Hot swap controller with zero loaded charge pump: The present invention includes a pass transistor that limits current drawn from a circuit without using a series resistor and while drawing minimal current from an external supply. A current mirror of the output current is formed and compared to a reference current. When the output current increases, the mirror... Agent: Cesari And Mckenna, LLP

20090256617 - Voltage level shifter: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage... Agent: Townsend And Townsend And Crew, LLP

20090256618 - Switching element driving device and switching element driving method: A switching element driving device has a first transistor that decreases the gate voltage of a power element at a faster rate than during a normal turn-off, and a second transistor that decreases the gate voltage of the power element at a slower rate than during a normal turn-off. If... Agent: Kenyon & Kenyon LLP

20090256619 - High-side driver: A high-side driving circuit is provided, where Q terminal and Q terminal of the latch circuit respectively feed back to the first switch and the second switch, which may control asymmetric impedance, such that the high-side driving circuit can prevent noise.... Agent: Chih Feng Yeh Brian M. Mcinnis

20090256620 - Programmable signal routing: A distributed signal multiplexer circuit programmably routes electronic signals. The circuit includes at least two distributor subcircuits. Each distributor subcircuit is configured to connect an input port to an output port through a switch, with a state of each switch being controlled by information received at a control port. The... Agent: Townsend And Townsend And Crew, LLP

20090256621 - Signal transfer circuit: There is provided a signal transfer circuit, comprising a first pull-up transistor and a first pull-down transistor configured to drive a first signal transmission line in response to a signal of a second signal transmission line, a first path controlling unit configured to prevent a signal from being transferred through... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090256622 - Soft thermal failure in a high capacity transmission system: A method of managing operation of an Integrated Circuit (IC) designed to process a signal A temperature of the IC is detected, and signal processing performed by the IC adjusted based on the detected temperature.... Agent: Blake, Cassels & Graydon, LLP

20090256623 - Temprature sensor circuit: In a temperature sensor circuit, a temperature sensor is configured to output a first voltage corresponding to temperature. A voltage source is configured to output a second voltage having the same nonlinear dependence on the temperature as a nonlinear dependence of the first voltage on the temperature. An amplifier is... Agent: Foley And Lardner LLP Suite 500

20090256624 - Antifuse and methods of operating and manufacturing the same: Provided are an antifuse and methods of operating and manufacturing the same. The antifuse may include first and second conductors separate from each other; a dielectric layer for an antifuse between the first and second conductors; and a diffusion layer between one of the first and second conductors and the... Agent: Harness, Dickey & Pierce, P.L.C

20090256625 - Circuit and method for a gate control circuit with reduced voltage stress: Circuit and method for a gate control output circuit having reduced voltage stress on the devices is disclosed. In a circuit of MOS transistors for supplying an output to control a transfer gate, the output having a high voltage level that exceeds a supply voltage, first and second clamping circuits... Agent: Slater & Matsil, L.L.P.

20090256626 - Multi-step charge pump and method for producing multi-step charge pumping: A multi-step charge pump having a power input terminal and a power output terminal is provided. The multi-step charge pump includes a plurality of capacitors, wherein each of the capacitors has a capacitance. A plurality of switching devices is connected among the capacitors, the power input terminal and the power... Agent: Jianq Chyun Intellectual Property Office

20090256627 - Multistage charge pumps with diode loss compensation: Multistage charge pumps with diode loss compensation are disclosed. In one example, a pre-regulated charge pump to generate a voltage is described. The example pre-regulated charge pump includes a charge pump having a plurality of stages and one or more diodes. The stages are configured to generate an output voltage... Agent: Texas Instruments Incorporated

20090256628 - Reference current circuit and low power bias circuit using the same: A reference current circuit has an input configured to receive an input current, a first transistor, a second transistor, and an output configured to provide a reference current. The input is directly connected to a control input of the second transistor and a first terminal of the first transistor, and... Agent: Slater & Matsil LLP

20090251175 - Input buffer capable of reducing delay skew: An input buffer includes a delay compensation unit for combining (a) a first signal obtained by buffering an input signal using another signal, which is out of phase with the input signal, with (b) a second signal obtained by buffering the input signal using a reference voltage signal, to output... Agent: Cooper & Dunham, LLP

20090251174 - Output buffer of a source driver applied in a display: An output buffer and a controlling method are disclosed. The output buffer comprises an upper buffer and a lower buffer. In the controlling method, at first, a first voltage (V1) and a second voltage (V2) are applied on the upper buffer, and a third voltage (V3) and a fourth voltage... Agent: Hayes Soloway P.C.

20090251176 - Frequency divider circuits: A circuit for deriving an output clock signal from an input clock signal, the output clock signal having a frequency which is 1/Nth of the frequency of the input clock signal, where N is an odd number. The circuit comprises a plurality of latches configured as a latch ring, the... Agent: Caesar, Rivise, Bernstein, Cohen & Pokotilow, Ltd.

20090251177 - Injection-locked frequency divider: An injection-locked frequency divider for dividing a frequency of an injection signal and obtaining a frequency divided signal is provided. The injection-locked frequency divider includes a signal injection unit and an oscillator. The signal injection unit includes a first input terminal and a second input terminal for receiving the injection... Agent: Jianq Chyun Intellectual Property Office

20090251178 - Ultra low power servo-controlled single clock ramp generator with amplitude independent to clock frequency: A low power servo-controlled single clock ramp generator (100) includes a fast switched comparator (102), charge pump (110) and voltage-to-current converter (120) connected to provide a feedback control mechanism under control of a pulse comparison clock signal (pulse_comp) and a reset pulse clock signal (rst_pulse) that are generated from a... Agent: Hamilton & Terrile, LLP - Freescale

20090251179 - Clock disabling circuit and clock switching device utilizing the same: A clock disabling circuit includes a control unit, an OR gate, and a first AND gate. The control unit generates a first delay signal by delaying a selected enable signal when the selected enable signal is at a first level. The control unit generates a second delay signal by delaying... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090251180 - Analog phase-locked loop: Aspects of the present invention are related, in general, to Type-III phase-locked loops. In particular, aspects of the present invention relate to analog Type-III phase-locked loop anangements comprising at least two signal paths, wherein each signal path may correspond to a bandwidth partition and may be selected by a selector... Agent: Matthew D. Rabdau Tektronix, Inc.

20090251182 - Constant phase angle control for frequency agile power switching systems: Power switching systems often benefit from controlling the instant at which the power devices change state so as to minimize dissipation in these devices. Such systems often require fairly tight tolerances on reactive components and a relatively narrow frequency operating range to be certain these switching times occur as intended.... Agent: Rothwell, Figg, Ernst & Manbeck, P.C.

20090251181 - Method and apparatus for tuning phase of clock signal: A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency... Agent: Lee & Morse, P.C.

20090251183 - Delay lock loop circuit and semiconductor device: A simple circuit for preventing occurrence of a hazard and output delay for an asynchronous input signal in a clock signal. A flip-flop circuit (FF) outputs an output signal at a low level to a clocked inverter circuit (INVO) when a clock signal (PCLKB) transitions from a high level to... Agent: Sughrue Mion, PLLC

20090251184 - Duty cycle correction circuit apparatus: A duty cycle correction circuit apparatus includes a flip-flop, a feedback unit connected between an input node and an output node of the flip-flop to invert an output signal of the flip-flop and to output the inverted signal as an output signal of the feedback unit, and a selection unit... Agent: Stanzione & Kim, LLP

20090251185 - Data retention device for multiple power domains: A data retention device includes a first latch disposed between a data input terminal and a data output terminal for storing a data signal received from the data input terminal and transmitting the data signal through a data forward path to the data output terminal according to a clock signal... Agent: Wpat, PC

20090251186 - Semiconductor integrated circuit: Provided is a semiconductor integrated circuit which includes a logical, operation circuit, a clock generator, a relay circuit, and a signal generating unit that are integrated. The clock generator generates multiphase clocks. The relay circuit distributes the generated multiphase clocks to the logical operation circuit. The signal generating unit detects... Agent: Nec Corporation Of America

20090251187 - Output enable signal generating circuit and method: An output enable signal generating circuit including a first count value generation unit that provides a first count value by executing a counting operation, starting from an initial count value corresponding to a CAS latency information, the counting operation being executed in response to an internal clock signal, a second... Agent: Mannava & Kang, P.C.

20090251188 - Clock driver and charge pump incluing the same: A clock driver capable of minimizing the ripple of an output signal of a charge pump, and the charge pump including the clock driver are disclosed. The clock driver that generates at least one control clock signal for controlling a pumping circuit, the clock driver includes: a first driver generating... Agent: Harness, Dickey & Pierce, P.L.C

20090251189 - Multi-phase phase interpolator: A multi-phase phase interpolator receives two input clocks to generate several equally spaced output clocks using several phase interpolators. A phase interpolator may include a first circuit branch and a second circuit branch with output nodes that are connected together to provide an output clock. The output clock may be... Agent: Okamoto & Benedicto, LLP

20090251190 - System and method for generating two effective frequencies using a single clock: A method and apparatus are disclosed for generating a second clock signal, having a second effective clock frequency, from a first clock signal, having a first effective clock frequency. Clock pulses of the first clock signal are counted to generate a count value. When the count value reaches a predetermined... Agent: Mcandrews Held & Malloy, Ltd

20090251191 - Operating circuit: An operating circuit includes a differential amplifier stage, which has a first input node for receiving a first input signal of a differential input, a second input node for receiving a second input signal of the differential input, a first output node for outputting a first output signal of a... Agent: North America Intellectual Property Corporation

20090251192 - Self-calibration circuit for usb chips and method thereof: A USB chip having a self-calibration circuit is provided. The USB chip includes a comparing circuit, a digital circuit and an adjustable current output device. A close-loop structure is provided to monitor an output voltage level of the USB chip and then an output current is dynamically adjusted to calibrate... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090251194 - Dc common mode level shifter: A switched-mode level-shifter shifts a differential voltage superimposed on a common-mode voltage. In the level shifter, a common-mode inductive reactor has at least two windings, and at least one of the differential voltage and the common-mode voltage are applied to at least one of the windings of the reactor. A... Agent: Rudoler & Derosa LLC Attn: Docket Clerk

20090251193 - Level shifter and circuit using the same: A level shifter consisting of first to fifth transistors is provided. First ends of the first and second transistors are coupled to a first supply voltage. Control ends of third and fourth transistors respectively receive first and second input signals. First ends of the third and fourth transistors are respectively... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090251195 - Calibration techniques for non-linear devices: An apparatus may include a non-linear module, a control module, and a calibration module. The non-linear module produces an output signal from an input signal. The control module selects, upon an occurrence of a calibration condition, a calibration operation from two or more calibration operations. Each of the two or... Agent: Tyco Technology Resources Suite 140

20090251196 - Mosfet parametric amplifier: A circuit includes an input terminal adapted to receive an input voltage, a MOSFET having its drain terminal and its source terminal connected together, a first switching arrangement configured to be controlled by a first clock signal and adapted to selectively couple the gate terminal to the input terminal, and... Agent: Baker Botts L.L.P.

20090251197 - Simplified circuit to use a normally conducting circuit element that requires a normally blocking circuit element: An embodiment of the invention relates to a switching system that includes a depletion-mode semiconductor device, such as a silicon carbide device, coupled in series with an enhancement-mode semiconductor device, such as a silicon field effect transistor, so that a controller can be configured to disable conductivity of the series... Agent: Slater & Matsil LLP

20090251198 - Circuit arrangement and method for driving an electronic component with an output signal from a microprocessor: A circuit arrangement for driving an electronic component with the output signal (V6) from a microprocessor (MP), includes: the electronic component with a control input; a microprocessor (MP), which provides an output signal (V6) at an output (A1); wherein it furthermore includes: a first bipolar transistor (Q5) in common-base connection,... Agent: Osram Sylvania Inc

20090251199 - Switching element: A switching element 100 includes an insulating substrate 10, a first electrode 20 provided on the insulating substrate 10, a second electrode 30 provided on the insulating substrate 10, and an interelectrode gap 40 provided between the first electrode 20 and the second electrode 30, a distance G between the... Agent: Harness, Dickey & Pierce, P.L.C

20090251200 - Master fuse module: A master fuse module includes a base housing configured to be disposed on a battery, a fuse assembly connected to the base housing, and a cover disposed on the base housing. The fuse assembly includes a first generally planar portion including a first terminal, a second generally planar portion disposed... Agent: K&l Gates LLP

20090251201 - Multi-level anti-fuse and methods of operating and fabricating the same: Provided may be a multi-level anti-fuse and methods of fabricating and operating the same. The multi-level anti-fuse may include at least three anti-fuses having a plurality of anti-fuses connected in parallel constituting a parallel connection structure and at least one anti-fuse connected to the parallel connection structure in series, wherein... Agent: Harness, Dickey & Pierce, P.L.C

20090251202 - Semiconductor integrated circuit device: A control target circuit formed by transistors is provided with a power supply level control circuit for controlling the power supply voltage supplied to the control target circuit, a substrate level control circuit for controlling the substrate voltages of the transistors, and a special substrate level control circuit for controlling... Agent: Mcdermott Will & Emery LLP

20090251203 - Reference voltage circuit: Disclosed is a reference voltage circuit including a first I-V(current-to-voltage) converter, a second I-V converter, a current mirror and a control circuit. The first I-V converter includes a parallel connection of a diode and a resistor, and the second I-V converter includes parallel-connected diodes, series-connected resistors connected in parallel with... Agent: Sughrue Mion, PLLC

20090251204 - temperature compensated work function based voltage reference: A temperature compensated voltage reference is created from an operational amplifier circuit having two substantially identical P-channel metal oxide semiconductor (P-MOS) transistors with each one having a different gate dopant. The different gate dopants result in different threshold voltages for each of the two otherwise substantially identical P-MOS transistors. The... Agent: King & Spalding LLP

20090251205 - Power supply circuit having standby detection circuit: A power supply circuit includes a voltage output controller configured for outputting voltages, a standby controller configured for directing the voltage output controller to provide voltage to a load, and a microprocessor configured for controlling the standby controller according to a mode of the load. The voltage output controller is... Agent: Wei Te Chung Foxconn International, Inc.

20090251206 - Integrated circuit and method for manufacturing the same: An integrated circuit comprising at least one signal path which is adapted to route at least one signal from an origin to a target block, said signal path comprising at least an adjustable driver circuit comprising an input and an output, which is adapted to receive an electric signal having... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090243659 - Method and device for detecting the absence of a periodic signal: A method and device may determine the absence of a periodic signal or the absence of an edge of the periodic signal. The periodic signal may be a transmitted clock signal in a forwarded clock architecture. The periodic signal may be delayed by a fixed phase difference to produce a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090243660 - Mutual charge cancelling sample-reset loop filter for phase locked loops: In general, in one aspect, an apparatus includes a phase frequency detector, a charge pump, a voltage controlled oscillator, an integral capacitor to maintain an integral charge and provide an integral voltage, and a mutual-charge canceling sample reset (MCSR) capacitor to maintain a proportional charge and provide a proportional voltage... Agent: RyderIPLaw C/o Cpa Global

20090243661 - System and method to detect order and linearity of signals: A method comprises applying a first delay to a first signal that is ahead of a second signal in a series of signals and determining a first number of delay units that provides the first delay to change an order between the delayed first signal and the second signal that... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090243662 - Mos integrated circuit and electronic equipment including the same: A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare... Agent: Mcdermott Will & Emery LLP

20090243663 - Analog comparator comprising a digital offset compensation: A digital compensation of an input stage of a comparator may be achieved by providing switched load elements, which may be appropriately connected to the differential input pair of the comparator in order to match transistor characteristics of the input pair and also match the load value of the input... Agent: Williams, Morgan & Amerson

20090243664 - Data transfer method, data transfer circuit, output circuit, input circuit, semiconductor device, and electronic apparatus: A data transfer circuit comprises a voltage/current converter circuit for converting a first binary voltage data of n bits (n is an integer equal to or larger than two) to multi-value current data of 2n values which is output to a single data transfer line. A current comparator circuit converts... Agent: Drinker Biddle & Reath (dc)

20090243666 - A driving circuit to drive an output stage: A driving circuit to drive an output stage comprising a high side NMOS and a low side NMOS is provided. The driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source and the sources of a first and... Agent: Hayes Soloway P.C.

20090243665 - Cascode driver with gate oxide protection: An apparatus including a bias voltage generator and one or more cascode drivers. Each of the one or more cascode drivers may include a plurality of cascode transistors. The bias voltage generator may control the cascode bias voltages provided to the cascode transistors based on a plurality of programmable control... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090243667 - Output driving device: An output driving device capable of improving a slew rate is provided. The output driving device includes a push-pull type driving unit configured with a pull-up PMOS transistor and a pull-down NMOS transistor, wherein body biases of the pull-up PMOS transistor and the pull-down NMOS transistor are controlled for control... Agent: Mannava & Kang, P.C.

20090243668 - Frequency divider speed booster: Embodiments of the present invention synthesize a core frequency divider by adding a switching feedback shell and using multiple clock edges to trigger the frequency divider. Feedback logic is used to determine which edge will be used. Embodiments allow multiple recursive use, which boosts the overall speed resulting frequency divider... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090243669 - Power-on reset circuit: A power-on reset circuit includes a voltage-dividing circuit, a first switch and a second switch. The voltage-dividing circuit includes a first resistor and a second resistor connected in series. A first terminal of the voltage-dividing circuit is configured for connect to a power source, a second terminal of the voltage-dividing... Agent: PCe Industry, Inc. Att. Steven Reiss

20090243676 - Design structure for fractional-n phased-lock-loop (pll) system: In one general embodiment, a hardware description language (HDL) design structure is encoded on a machine-readable data storage medium, said HDL design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a fractional-N phased-lock-loop (PLL) structure. The fractional-N PLL structure comprises a first... Agent: Zilka-kotab, PC- Ibms

20090243671 - Disturbance suppression capable charge pump: One embodiment described is charge pump arrangement that includes a regulator to regulate signals associated with two output nodes. A switching mechanism may be coupled to the regulator. The switching mechanism is to interrupt the regulator.... Agent: Spryip, LLC Ifx

20090243674 - Fractional-n phased-lock-loop (pll) system: In one general embodiment, a fractional-N phased-lock-loop (PLL) structure comprises a first circuit located on an integrated circuit, where the first circuit includes a voltage controlled oscillator for generating a periodic output signal, a phase detector for controlling the voltage controlled oscillator, a charge pump for modifying an input to... Agent: Zilka-kotab, PC- Ibms

20090243672 - Multi-pole delay element delay locked loop (dll): In general, in one aspect, the disclosure describes a delay line including a cascade of delay stages where each stage delays the phase a defined amount. Each delay stage includes an active voltage control delay element and one or more passive delay elements (e.g., resistive-capacitive (RC) networks). The aggregate amplitude... Agent: RyderIPLaw C/o Cpa Global

20090243675 - Optimization method for fractional-n phased-lock-loop (pll) system: In one general embodiment, a method is provided. In operation, a first phase noise in a first circuit located on an integrated circuit is determined. Additionally, a second phase noise in a second circuit coupled to the first circuit but which is not located in the integrated circuit is determined,... Agent: Zilka-kotab, PC- Ibms

20090243673 - Phase locked loop system and phase-locking method for phase locked loop: A PLL (phase locked loop) system includes a PLL and a lock detector. The PLL is for outputting a phase-locking clock signal. The lock detector is coupled to the PLL for detecting whether or not the frequency of the phase-locking clock signal falls within a predetermined frequency range and detecting... Agent: Jianq Chyun Intellectual Property Office

20090243670 - Self-regulated charge pump with loop filter: One embodiment described is a charge pump arrangement that includes at least one input node and two output nodes. A regulator is included to regulate at least one of the two output nodes, the regulator is decoupled from one of the two output nodes, and the regulator has at least... Agent: Spryip, LLC Ifx

20090243677 - Clock generator and methods using closed loop duty cycle correction: Closed-loop duty-cycle correctors (DCCs), clock generators, memory devices, systems, and methods for generating an output clock signal having a particular duty cycle are provided, such as clock generators configured to generate an output clock signal synchronized with a received input clock signal having a predetermined duty cycle. Embodiments of clock... Agent: Jennifer M. Lane, Esq. Dorsey & Whitney LLP

20090243678 - Delay locked-loop circuit and display apparatus: A delay locked-loop circuit includes: a phase comparator detecting a phase difference between an external clock and an internal clock; an up/down counter controlling a delay time in accordance with an output signal from the phase comparator; and a delay line including plural unit delay circuits corresponding to plural bits... Agent: Rader Fishman & Grauer PLLC

20090243679 - Semi-digital delay locked loop circuit and method: A scalable DLL (delay locked loop) circuit that has a calibration mechanism to auto tune locking precision. The delay locked loop circuit includes a multi-phase phase locked loop circuit for generating a plurality of phase signals according to a system clock, wherein one of the phase signals is a pixel... Agent: Edell, Shapiro & Finnan, LLC

20090243680 - Data signal generating apparatus: It is an object of the present invention to provide a data signal generating apparatus which is small in size, and can output the serial data in a desired sequence without assuming an indefinite state as well as being capable of dealing with the jitter measurement. In the data signal... Agent: Greer, Burns & Crain

20090243681 - Embedded source-synchronous clock signals: A synchronous communication system includes two transmitters that transmit respective first and second data signals that are phase offset from one another by about 90 degrees. On the receive side, a pair of extraction circuits extract a first clock signal from the first data signal and a second clock signal... Agent: Silicon Edge Law Group, LLP

20090243682 - Method, system and device for eliminating intra-pair skew: A method, system and device for eliminating intra-pair skew are disclosed. The method includes: measuring a phase difference between the received differential signals as a transmission delay difference; and compensating delays of the differential signals using the transmission delay difference, to eliminate intra-pair skew of the differential signals. A phase... Agent: Huawei Technologies Co., Ltd. C/o Darby & Darby P.C.

20090243683 - Pulse transformer driver: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level... Agent: Townsend And Townsend And Crew, LLP

20090243684 - Method and device for generating a digital data signal and use thereof: In an embodiment, the present invention relates to an integrated circuit comprising at least one data signal input (data1, data2), at least one clock signal input (Clock), at least one control signal input (Cnt_del1, Cnt_del2) and a data signal output (Data_out). According to the invention, the integrated circuit is configured... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090243685 - Signal processing device: A signal processing device includes a correction circuit configured to correct the distortion of the duty cycle in a data signal having different occurrence probabilities of 0 and 1.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090243686 - Latch circuit and electronic device: A latch circuit includes: four or more gates; three input terminals and one or two output terminals which are connected to at least one of the four or more gates; a feedback circuit in which respective input terminals of the four or more gates are connected to output terminals of... Agent: Arent Fox LLP

20090243687 - Robust time borrowing pulse latches: Configurable time-borrowing flip-flops may be based on configurable pulse generation circuitry and pulse latches. The circuitry may use a self-timed architecture that controls the width of clock pulses that are generated so that the pulse latches that are controlled by the clock pulses exhibit a reduced risk of race through... Agent: Treyz Law Group

20090243688 - System and method of changing a pwm power spectrum: In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively apply a phase shift operation to the at least one PWM signal at integer submultiples... Agent: Schwegman, Lundberg & Woessner, P.A.

20090243689 - Delay line circuit: Delay circuitry is described that includes clock mixing circuitry to provide a selectable propagation time. Output signals from the mixing circuitry are selectively coupled through a variable delay line to synchronize two clock signals.... Agent: Schwegman, Lundberg & Woessner/micron

20090243690 - Single-clock-based multiple-clock frequency generator: In an embodiment of the present invention, a clock generator circuit is disclosed to include a phase locked loop (PLL) that is responsive to a clock signal quadrature output frequency and a clock signal in-phase output frequency. The clock generator circuit generates a single clock frequency that is a fraction... Agent: Maryam Imam

20090243691 - Signal output circuit: Disclosed is a signal output circuit comprising: a first transistor of an emitter follower configuration, which receives an input signal; a second transistor of an emitter follower configuration, which receives the input signal, and has an output connected to an external load (106); a comparator circuit which has an input... Agent: Mcginn Intellectual Property Law Group, PLLC

20090243695 - Bi-directional level shifted interrupt control: The present example provides a circuit offering interoperability between circuits that may be powered from differing voltages, and that may operate at differing logic levels. Isolation may be provided from the impedance provided by transistor circuits and level shifting may be provided by a divider network. Accordingly, an exemplary slave... Agent: Kyocera Wireless Corp.

20090243693 - Circuit for providing deterministic logic level in output circuit when a power supply is grounded: A high voltage analog interface circuit capable of producing a determinate zero or other low voltage when the high voltage power supply is turned off or grounded.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090243696 - High voltage semiconductor device having shifters and method of fabricating the same: Provided are a high-voltage semiconductor device including a junction termination which electrically isolates a low voltage unit from a high voltage unit, and a method of fabricating the same. The high voltage semiconductor device includes a high voltage unit, a low voltage unit surrounding the high voltage unit, and a... Agent: Hiscock & Barclay, LLP

20090243697 - Level shift circuit, method for driving the same, and semiconductor circuit device having the same: A level shift circuit includes a level shift section for receiving a low potential signal oscillating between a high potential and a ground potential and converting it into a high potential signal oscillating between the high potential and the ground potential, the level shift section being connected to at least... Agent: Arent Fox LLP

20090243692 - Two voltage input level shifter with switches for core power off application: A voltage level shifter includes a first switch module having a first transistor and a second transistor, each transistor having a drain, a gate, and a source, wherein the drains of the first and the second transistors are coupled to a first voltage terminal. The voltage level shifter further includes... Agent: K & L Gates LLPIPDocketing

20090243694 - Voltage converting driver apparatus: A voltage converting apparatus is provided that includes a dynamic driver circuit and a voltage converting circuit. The dynamic driver circuit may receive a clock signal and input signals and provide a dynamic signal based on the clock signal and the input signals. The voltage converting circuit may receive the... Agent: Ked & Associates, LLP Intel Corporation

20090243698 - Mixer and frequency converting apparatus: A mixer includes: a magnetoresistive effect element including a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer; and a magnetic field applying unit that applies a magnetic field to the free magnetic layer. The mixer... Agent: Greenblum & Bernstein, P.L.C

20090243700 - Mixer circuit for frequency mixing of differential signals: A mixer circuit designed for low voltage operation with rail-to-rail local signals. First and second transistors form a first input section to produce a first signal. Third and fourth transistors form a second input section to produce a second signal. Fifth and sixth transistors form a third input section to... Agent: Katten Muchin Rosenman LLP

20090243699 - System and method of companding an input signal of an energy detecting receiver: An apparatus configured as a compandor to achieve a defined dynamic range for an output signal in response to an input signal. In particular, the apparatus comprises a first circuit adapted to generate a first signal from the input signal, wherein the first signal includes a first dynamic range (e.g.,... Agent: Qualcomm Incorporated

20090243701 - Power supply with digital control loop:

20090243702 - Varactor bank switching based on negative control voltage generation: A method and apparatus for varactor bank switching for a voltage controlled oscillator is disclosed. Varactor bank switching involves generating a negative bias voltage signal as a control signal for a varactor bank switch in an off-state, the varactor bank switch comprising a pass-gate circuit including switching transistors. Generating the... Agent: Ibm-acc-washington C/o Myers Dawes Andras & Sherman, LLP

20090243703 - High-frequency switching circuit module: A high-frequency switching circuit module includes a high-frequency switch that includes an FET switching element and that selectively connects between a common input/output terminal and one of input/output terminals, and a matching circuit that is provided to the common input/output terminal Pc and is not provided to the input/output terminals.... Agent: Murata Manufacturing Company, Ltd. C/o Keating & Bennett, LLP

20090243704 - Internal voltage generator: An internal voltage generator includes an internal voltage detecting unit that receives an active signal activated in an active operation mode of a semiconductor memory and a bias voltage varying according to temperature variation, detects a level of an internal voltage by using a reference voltage and outputs an internal... Agent: Cooper & Dunham, LLP

20090243705 - High voltage tolerative driver circuit: A high voltage tolerative inverter circuit is disclosed, which comprises a PMOS transistor with a source and drain being connected to a first high voltage power supply (VDDQ) and an output terminal, respectively, a gate of the PMOS transistor being controlled by a first signal having a voltage swing between... Agent: K & L Gates LLPIPDocketing

20090243706 - Voltage regulated charge pump: A voltage regulated charge pump includes a charge pump circuit for receiving an input voltage to generate an output voltage, in which the charge pump circuit further includes a capacitor, a first switch and a second switch. The first switch is coupled between the input voltage and a first end... Agent: Hayes Soloway P.C.

20090243707 - Semiconductor integrated circuit apparatus and electronic apparatus: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of... Agent: Greenblum & Bernstein, P.L.C

20090243708 - Bandgap voltage reference circuit: A bandgap voltage reference circuit which provides a bandgap reference voltage without requiring a resistor. The circuit comprises an amplifier having an inverting input, a non-inverting input and an output. First and second bipolar transistors are provided which operate at different current densities each coupled to a corresponding one of... Agent: Wolf Greenfield & Sacks, P.C.

20090243709 - Devices, systems, and methods for generating a reference voltage: Methods, devices, and systems are disclosed for a voltage reference generator. A voltage reference generator may comprise a bandgap voltage reference circuit configured to output two complementary-to-absolute-temperature (CTAT) signals. The voltage reference generator may further comprise a differential sensing device configured to sense the two complementary-to-absolute-temperature (CTAT) signals and generate... Agent: Trask Britt, P.C./ Micron Technology

20090243710 - Firewall/isolation cells for ultra low power products: In an integrated circuit (IC) may have several functional blocks adapted to be inactivated independently from each other. At least one firewall cell may be embedded independently of other firewall cells in the vicinity of one functional block. The firewall cell may be electrically isolated from the functional block and... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090243711 - Bias current generator: A bias current generator for generating bias current is described. The generator comprises an amplifier having an inverting input, a non-inverting input and an output. A first bipolar transistor is associated with one of the inverting and non-inverting inputs of the amplifier. A load MOS device is associated with the... Agent: Wolf Greenfield & Sacks, P.C.

20090243712 - Device for reducing power consumption inside integrated circuit: The present invention discloses a device for reducing power consumption inside an integrated circuit (IC), comprising: an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor; and a resistor located outside the IC,... Agent: Tung & Associates

20090243713 - Reference voltage circuit: A reference voltage circuit which is less dependent on semiconductor process variations compared to bandgap based reference voltage circuits. The circuit comprises a first amplifier having an inverting input, a non-inverting input and an output. A current biasing circuit provides first and second PTAT currents, and a CTAT current. The... Agent: Wolf Greenfield & Sacks, P.C.

20090243714 - Power noise immunity circuit: A power noise immunity circuit includes a unidirectional device and a switch both connected between a power input terminal and a power output terminal, and a noise detector to control the switch. The power input terminal is for being connected to an external voltage source, and the power output terminal... Agent: Rosenberg, Klein & Lee

20090243715 - Device and method for limiting di/dt caused by a switching fet of an inductive switching circuit: The main switching FET and the auxiliary FET can be formed from a single die with shared source and drain. The auxiliary inductor can be implemented as a parasitic inductance of an inherently required bonding wire connecting the main switching FET to its device terminal to simplify packaging with reduced... Agent: Chein-hwa S. Tsao