|Miscellaneous active electrical nonlinear devices, circuits, and systems patents - Monitor Patents|
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Miscellaneous active electrical nonlinear devices, circuits, and systems July category listing 07/09Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 07/30/2009 > patent applications in patent subcategories. category listing
20090189644 - Short pulse rejection circuit and method thereof: A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter... Agent: Harness, Dickey & Pierce, P.L.C
20090189645 - Filter and filtering method: A filter and a filtering method are provided. The filter includes a first compare voltage generation unit, a second compare voltage generation unit, a comparator and a first inverter. The first compare voltage generation unit generates a first compare voltage according to an input signal. The second compare voltage generation... Agent: Rabin & Berdo, PC
20090189647 - Bias current generator for multiplie supply voltage circuit: An electronic device supplied by multiple supply voltages includes a bias current generating stage and maximum current selection stage. The bias current generating stage comprises a crude bias current generator for generating an crude bias current during a power up phase in which at least one of the multiple supply... Agent: Texas Instruments Incorporated
20090189646 - Method and apparatus for detection and accommodation of hot-plug conditions: An apparatus, method, and discriminator circuit are provided for filtering false signals. A discriminator circuit receives a low-state signal via an input and, responsive to receiving the low-state signal, the discriminator circuit compares the low-state signal to a static signal. Responsive to the low-state signal being greater than the static... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090189648 - Clock signal recovery device and method for recovering clock signals: A clock signal recovery device has a digital data signal input for the input of a digital data signal and a clock signal output for the output of a recovered clock signal. The digital data signal has a given nominal clock signal frequency. The clock signal recovery device is a... Agent: Lerner Greenberg Stemer LLP
20090189649 - Electronic circuit and method therefor: The electronic circuit comprises a functional module (10), a condition signaling module (20), a reference module (30) and a control circuit (40). The condition signaling module (20) generates an indication signal (Imeas) indicative for PVT conditions local to the functional module. The PVT conditions comprise a set of conditions relevant... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090189650 - Pll circuit including voltage controlled oscillator having voltage-current conversion circuit: A Phase-Locked Loop (PLL) circuit includes a voltage-controlled oscillator. The voltage-controlled oscillator includes a voltage-current conversion circuit and a current-controlled oscillation circuit. The voltage-current conversion circuit includes an input transistor having a gate terminal connecting a control voltage, a first transistor connected in series to the input transistor, a second... Agent: Mcginn Intellectual Property Law Group, PLLC
20090189651 - High speed arbitrary waveform generator: A high-speed arbitrary waveform generator (AWG) that utilizes multiple digital-to-analog converters (D/A converters) and overcomes bandwidth limitations of individual D/A converters to produce high-speed waveforms.... Agent: Lecroy Corporation
20090189652 - Frequency multiplier: A frequency multiplier is disclosed. A plurality of voltage regulators each regulate levels of voltages at first and second common nodes in response to a corresponding one of input signals from a voltage-controlled delay line. An input buffer charges the first node or discharges the second node in response to... Agent: Christie, Parker & Hale, LLP
20090189653 - Phase lock loop clock distribution method and system: A method and apparatus and program use the quiet, regulated power supply inherent to the PLL to drive a CMOS buffer. In this manner, the CMOS buffer may distribute the reference clock in a manner that minimizes the power and space consumption associated with clock distribution processes.... Agent: Ibm-rochester C/o Toler Law Group
20090189654 - Common-mode feedback method using a current starved replica biasing: A method, system, and circuit design product for setting the common-mode voltage level of a charge pump to yield low duty cycle distortion from a voltage controlled oscillator (VCO). Differential charge pumps utilize common-mode feedback (CMF) networks to control the common-mode voltage level. A replica circuit of a current starved... Agent: Dillon & Yudell LLP
20090189655 - Phase-locked loop circuit and delay-locked loop circuit: A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes... Agent: Arent Fox LLP
20090189657 - Delay locked loop circuit and method for eliminating jitter and offset therein: A delay locked loop circuit includes a phase-frequency detector, a sampler, a charge pump, a bias generator and a voltage-controlled element. The phase-frequency detector outputs at least one difference signal by detecting a phase difference between an input clock signal and a feedback clock signal. The sampler outputs at least... Agent: Rabin & Berdo, PC
20090189656 - Delay-locked loop and a stabilizing method thereof: A delay-locked loop includes a phase detector, a shift register, a digital low pass filter, a digital to analog converter, a bias circuit, and a delay circuit. The phase detector generates a lagging signal and a leading signal corresponding to a phase difference between an input clock signal and a... Agent: Rabin & Berdo, PC
20090189658 - Dll circuit, semiconductor device using the same, and method for controlling dll circuit: There is provided a DLL circuit that uses a small amount of area on a chip, and is compatible with a wide range of clock frequencies. The DLL circuit has a delay line 210 for delaying an external clock signal CLK, and a control circuit for controlling a delay value... Agent: Mcginn Intellectual Property Law Group, PLLC
20090189659 - Switching circuit in a phase locked loop (pll) to minimize current leakage in integrated circuits: In an apparatus and method for reducing current leakage in a phase locked loop (PLL), a pair of resistive divider circuit is coupled to receive a pair of differential input signals and provide a pair of differential output signals. A timing control circuit controls a pair of switches, the pair... Agent: Texas Instruments Incorporated
20090189660 - Semiconductor device: A semiconductor device includes an input circuit, an output circuit, and a test circuit that is adapted to evaluate delaying of a signal which is input to the input circuit to be output from the output circuit. The test circuit includes a first delay circuit for delaying a signal output... Agent: Oliff & Berridge, PLC
20090189661 - Pulse width modulation controller and the controlling method thereof: A pulse width modulation controller comprises a disabling unit, a level sensor and an over current protector. These three devices are all coupled to a multi-function node for accomplishing a disable function, input level sensing, and over-current protection, respectively.... Agent: Wpat, PC Intellectual Property Attorneys
20090189662 - Apparatus and circuit including latch circuit, and method of controlling latch circuit: An apparatus includes a first selector which selects a test data during a first operation mode, and selects a first input data during a second operation mode, a first latch circuit which latches an output signal of the first selector according to a first clock signal, a second selector which... Agent: Mcginn Intellectual Property Law Group, PLLC
20090189663 - Standard cell and semiconductor device: The present invention provides a standard cell and a scan flip flop circuit capable of introducing a scan test also to a system LSI having an ACS circuit. One standard cell is configured by: a 3-input selection circuit for selecting one signal from three input signals; and a flip flop... Agent: Miles & Stockbridge PC
20090189664 - State retaining power gated latch and method therefor: A circuit has first latch, a second latch, a coupling circuit, and a power down circuit. The first latch has an input/output coupled to a data node. The second latch has an input/output. The coupling circuit is coupled between the input/output of the second latch and the data node. The... Agent: Freescale Semiconductor, Inc. Law Department
20090189665 - Schmitt-trigger-based level detection circuit: A Schmitt trigger includes A first PMOS transistors having the drains and sources thereof serially connected and coupled between a voltage source and an output end, and having gates thereof coupled to an input end; B first NMOS transistors having the drains and sources thereof serially connected and coupled between... Agent: Wpat, PC
20090189666 - Jitter injection circuit, pattern generator, test apparatus, and electronic device: Provided is a jitter injection circuit that generates a jittery signal including jitter, including a plurality of delay circuits that receive a supplied reference signal in parallel and that each delay the received reference signal by a preset delay amount and a signal generating section that generates each edge of... Agent: Jianq Chyun Intellectual Property Office
20090189667 - Jitter injection circuit, pattern generator, test apparatus, and electronic device: Provided is a jitter injection circuit that generates a jittery signal including jitter, including a plurality of delay circuits that are connected in a cascading manner and that each sequentially delay a supplied reference signal by a preset delay amount and a signal generating section that generates each edge of... Agent: Jianq Chyun Intellectual Property Office
20090189668 - Voltage detecting circuit: A voltage detecting circuit for comparing a voltage to be detected with a reference voltage and outputting an output signal having a level depending on the comparison is disclosed. The voltage detecting circuit includes an inverting amplifier circuit configured to receive an intermediate signal having a level depending on the... Agent: Cooper & Dunham, LLP
20090189670 - Level shifter with reduced power consumption and low propagation delay: A level shifter includes a Not gate coupled to a signal input and operable between a first high level and a low level; a first PMOS transistor coupled to a second voltage source and a control end; a first NMOS transistor coupled to the first PMOS transistor, a Not-gate output... Agent: Wpat, PC
20090189669 - Methods and apparatus to reduce propagation delay of circuits: Methods and apparatus to reduce propagation delay of circuits are disclosed. A disclosed apparatus to reduce propagation delay of a circuit comprises a level shifter to selectively turn a first circuit on and off; a first switch to couple the first circuit to a second circuit when the first circuit... Agent: Texas Instruments Incorporated
20090189671 - Method and apparatus for improvement of matching fet currents using a digital to analog converter: A method and apparatus to equalize currents on a matching pair of FETs having sources connected together on a silicon on insulator semiconductor chip, or other chip wherein FET bodies can be individually biased. During a determination period, functional inputs coupled to the gates of the matching pair of FETs... Agent: Robert R. Williams IBM Corporation, Dept. 917
20090189672 - Pseudo-differential active rc integrator: A pseudo-differential active RC integrator is described. The pseudo-differential active RC integrator includes a common-mode feedback sub-circuit to control the common-mode output signal of the integrator. The common-mode feedback subcircuit may be coupled to one or more virtual ground nodes of the pseudo-differential active RC integrator, and may include one... Agent: Wolf Greenfield & Sacks, P.C.
20090189673 - Mixer with balanced local oscillator signal: A mixer includes a first field effect transistor (FET) having a gate that receives a first signal of a balanced local oscillator (LO) signal, a first source/drain coupled to a ground voltage, and a second source/drain; and a second FET having a gate that receives a second signal of the... Agent: Kathy Manke Avago Technologies Limited
20090189674 - Circuit that facilitates proximity communication: One embodiment of the present invention provides a system that facilitates proximity communication. This system includes a circuit containing a bootstrap transistor and a pass-gate transistor, where the drain of the bootstrap transistor is coupled to the gate of the pass-gate transistor. Note that a first coupling capacitance exists between... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP
20090189675 - High performance pseudo dynamic pulse controllable multiplexer: A high performance, set associative, cache memory tag multiplexer provides wide output pulse width without impacting hold time by separating the evaluation and restore paths and using a wider clock in the restore path than in the evaluation path. A clock controls the evaluation of the input signals. Its leading... Agent: International Business Machines Corporation Richard Lau
20090189676 - Semiconductor device: A semiconductor device includes a first conductive type first transistor, a first conductive type second transistor, a first power supply pad arranged between the first transistor and the second transistor and supplying a first potential, a second conductive type third transistor, a second conductive type fourth transistor, a second power... Agent: Mcginn Intellectual Property Law Group, PLLC
20090189677 - Gate driving circuit and display apparatus having the same: A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period... Agent: Cantor Colburn, LLP
20090189678 - High temperature operating package and circuit design: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the... Agent: Hiscock & Barclay, LLP
20090189679 - Gate driving circuit and display apparatus having the same: A gate driving circuit includes cascaded stages, each including a pull-up part, a carry part, a pull-up driving part, a holding part and an inverter. The pull-up part pulls up a gate voltage to an input clock. The carry part pulls up a carry voltage to the input clock. The... Agent: Cantor Colburn, LLP
20090189680 - Voltage-controlled semiconductor inductor and method: A voltage-controlled semiconductor inductor and method is provided. According to various embodiments, the voltage-controlled inductor includes a conductor configured with a number of inductive coils. The inductor also includes a semiconductor material having a contact with at least a portion of at least one of the coils. The semiconductor material... Agent: Schwegman, Lundberg & Woessner/micron
20090189681 - Self-oscillating regulated low-ripple charge pump and method: Charge pump circuitry (30) compares bottom plate voltages of first (C1) and second (C2) flying capacitors in a current mode charge pump (1B) to a reference value (VDD−V28) by means of a comparator (20) which drives a flip-flop (22) that generates first (F1) and second (F2) complementary phase signals. The... Agent: Texas Instruments Incorporated
20090189682 - Method and apparatus for mode selection for high voltage integrated circuits: A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost... Agent: Blakely Sokoloff Taylor & Zafman LLP
20090189684 - Apparatus and method for waking up a circuit: A method for waking up a circuit, comprising charging a voltage line of the circuit with a constant wake-up current until the voltage line reaches a predetermined voltage. Also, an apparatus, comprising a circuit portion, a switch configured to selectively couple an input of the circuit portion to a supply... Agent: Banner & Witcoff, Ltd. Attorneys For Client 007052
20090189683 - Circuit for generating a reference voltage and method thereof: A circuit for generating a reference voltage at an output node comprises a first branch, a second branch, and a main current source. The first branch is electrically connected between a first terminal and a second terminal of the circuit, and comprises at least one first semiconductor device. Each first... Agent: North America Intellectual Property Corporation
20090189685 - Leakage control: In one embodiment, a leakage reduction circuit is provided that includes: a virtual power supply node; a first PMOS transistor coupled between the virtual power supply node and a power supply node; a second PMOS transistor having a source coupled to the power supply node; and a native NMOS transistor... Agent: Haynes And Boone, LLPIPSection
20090189686 - Semiconductor integrated circuit and power control method: Each of computing units on a semiconductor integrated circuit includes a first signal output unit that outputs a first status signal indicating a state of a input/output control unit with regard to an access to a storage unit, a second signal output unit that outputs a second status signal indicating... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20090189687 - Multi-mode reconstruction filter: A circuit (e.g., a reconstruction filtering circuit) may include a single operational amplifier (op-amp) that is arranged to receive a voltage input and that is arranged to have a biasing of constant gmR, a first device capacitor that is operatively coupled to an output of the single op-amp, a first... Agent: Brake Hughes Bellermann LLP C/o Cpa Global07/23/2009 > patent applications in patent subcategories. category listing
20090184735 - Automatic phase-detection circuit for clocks with known ratios: An automatic phase detection circuit for generating an internal synchronization signal when two clock input signals achieve a certain phase relationship. No external reference signal is required. The logic state of one clock is sampled on the active edge of the other clock and stored in a shift register. The... Agent: Dorsey & Whitney LLP On Behalf Of Sun Microsystems, Inc.
20090184736 - Flexible waveform generator with extended range capability: A frequency synthesizer includes a first clock running at a frequency fCLK1, a second clock running at a frequency fCLK2, wherein frequency fCLK2 is higher than frequency fCLK1, the frequencies having a fixed ratio QFB=fCLK2/fCLK1; and a counter driven by the first clock. A decoder for produces QFB output values... Agent: Laubscher & Laubscher, P.C.
20090184737 - Semiconductor device having input circuit with auxiliary current sink: A semiconductor device stabilizes an operation of an input buffer. A semiconductor device includes an input potential detection unit outputting a detection signal in response to a level of an input signal. An input buffer buffers the input signal by performing a differential amplifying operation through a first current sink... Agent: Ladas & Parry LLP
20090184738 - Drive circuit for reducing inductive kickback voltage: In one embodiment a drive circuit includes two comparators which are adapted to sense kickback voltage generated in an inductive load and conduct two field-effect transistors connected to ground in a very short period of time so as to quickly reduce the kickback voltage to a minimum value. In another... Agent: Sam Chen
20090184739 - Dual-injection locked frequency dividing circuit: A dual-injection locked frequency dividing circuit is proposed, which is designed for integration to a gigahertz signal processing circuit system for providing a frequency dividing function to gigahertz signals. The proposed circuit architecture is characterized by the provision of a dual-injection interface module on the input end for dividing the... Agent: Pearne & Gordon LLP
20090184740 - Phase-locked loop circuit with accelerated frequency acquisition: Frequency acquisition is accelerated in a phase-locked loop circuit. A duration of time for sinking current from or sourcing current to a loop filter is calculated in order to accelerate frequency acquisition of a reference frequency of a reference signal and a feedback frequency of a feedback signal fed back... Agent: Agilent Technologies Inc.
20090184741 - Delay lock loop circuit, phase lock loop circuit, timing generator, semiconductor tester and semiconductor integrated circuit: A delay lock loop circuit and a phase lock loop circuit are designed to reduce a lock-up time, extend a lock range without increasing the number of bits of a counter, and quickly return to a lock target upon deviation from the lock target. There are provided with a plurality... Agent: Muramatsu & Associates
20090184742 - Externally synchronizing multiphase pulse width modulation signals: Waveform errors between multiphase PWM signals caused by external synchronization signals is solved by providing a capture register in a master time base circuit. The capture register is triggered by the external sync signal so as to “capture” the value of the master time base counter at the occurrence of... Agent: King & Spalding LLP
20090184743 - Deskew system for eliminating skew between data signals and clock and circuits for the deskew system: A deskew system includes a first voltage control delay receiving a data signal and generating N-numbered delayed data signals obtained by delaying a phase of the data signal in units of 90/N, where N is a natural number that is not less than 1. In response to a phase control... Agent: Harness, Dickey & Pierce, P.L.C
20090184744 - Driving configuration of a switch: A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switch to supply it with a... Agent: Seed Intellectual Property Law Group PLLC
20090184745 - De-emphasis system and method for coupling digital signals through capacitively loaded lines: A system for de-emphasizing digital signals, such as address signals, boosts the level of the signals for one clock period prior to transmitting the signals through signal lines that may have a relatively large capacitance. The system may include a delay circuit that delays the digital signal for a period... Agent: Dorsey & Whitney LLP Intellectual Property Department
20090184746 - Low voltage drop unidirectional electronic valve: A low voltage drop unidirectional electronic valve constituted of: a first terminal; a second terminal; an electronically controlled switch arranged to allow the flow of current from the first terminal to the second terminal when closed, the electronically controlled switch comprising a pair of reverse serially connected field effect transistors;... Agent: Microsemi Corp - Amsg Ltd.
20090184747 - Switch circuit: There has been a problem that the distortion characteristic of a switch circuit for a high frequency is deteriorated. A switch circuit in accordance with one aspect of the present invention includes a transistor connected in series between input and output terminals, a control terminal that receives a signal to... Agent: Mcginn Intellectual Property Law Group, PLLC
20090184748 - Voltage regulator: Provided is a voltage regulator for limiting a rush current from an output stage transistor. The voltage regulator includes an output current limiting circuit having a low detection current value and an output current limiting circuit having a high detection current value, and is structured so as to enable operation... Agent: Bruce L. Adams, Esq Adams & Wilks
20090184749 - High-resolution digitally controlled tuning circuit elements: A tuning circuit element for a tuning circuit. The tuning circuit element may include sub-elements for generating circuit values depending on logical values of digital control input signals. The tuning circuit element may be implemented with varactors, current sources, and other components or circuits. The tuning circuit element may be... Agent: Okamoto & Benedicto, LLP
20090184750 - Programmable electronics: An electronic device with polarity reversal protected connections and irreversibly interruptible programming connections, wherein the interruption is performed through safety elements provided in the programming paths, behind which safety elements diodes are disposed which block towards ground in normal operation, so that an overload current can be passed through the... Agent: Head, Johnson & Kachigian
20090184752 - Bias circuit: A bias circuit includes a first and a second transistors to which a common gate voltage is supplied, a load circuit coupled to drains of the first and the second transistors, a control circuit generating a control signal based on a signal from the load circuit, a current source controlled... Agent: Arent Fox LLP
20090184751 - Boosted voltage generator for increasing boosting efficiency according to load and display apparatus including the same: A boosted voltage generator for increasing boosting efficiency according to the amount of load and display apparatus including the same are provided. The boosted voltage generator includes an input voltage generator configured to generate a first input voltage or a second input voltage based on a reference voltage, compare the... Agent: F. Chau & Associates, LLC
20090184753 - Charge pump circuit: Provided is a charge pump circuit capable of shortening a settling time. When a boosted voltage (Vout) becomes high to be equal to or larger than an overshoot voltage, a transistor (T1) is turned on and an output terminal of the charge pump circuit is discharged. Accordingly, it is easy... Agent: Brinks Hofer Gilson & Lione/seiko Instruments Inc.
20090184754 - Signal amplifier: A signal amplifier including a transformer with a primary winding and a secondary winding, an oscillator circuit driven by an input signal establishing in the primary winding an oscillating signal amplified by the secondary, and a rectifier circuit responsive to the secondary winding configured to convert the amplified oscillating signal... Agent: Kenyon & Kenyon LLP
20090184755 - Current control apparatus applied to transistor: The present invention provides a current control apparatus applied to a transistor. The transistor has a control terminal, a first terminal, and a second terminal. The current control apparatus includes a current control module, a first current mirror module, a second current mirror module, a current subtractor, and a current... Agent: North America Intellectual Property Corporation
20090184757 - Semiconductor device having input circuit minimizing influence of variations in input signals: A semiconductor device stabilizes an operation of an input buffer. A semiconductor device includes an input potential detection unit, an input buffer, and a current sink unit. The input potential detection unit outputs a detection signal in response to a level of an input signal. The input buffer buffers the... Agent: Ladas & Parry LLP
20090184756 - Semiconductor power device with bias circuit: An RF power circuit comprises a power transistor having a gate and drain, an output matching network coupled to the drain and an input matching network coupled to the gate. A closed-loop bias circuit is integrated with the power transistor on the same die and coupled to the gate for... Agent: Coats & Bennett/infineon Technologies
20090184758 - Semiconductor integrated circuit and switch arranging and wiring method apparatus: A semiconductor integrated circuit includes: a circuit block having a first power supply line to which one of a power supply voltage and a reference voltage is applied, an internal voltage line, and a circuit cell connected between the first power supply line and the internal voltage line; and a... Agent: Rader Fishman & Grauer PLLC
20090184759 - Semiconductor integrated circuit device: The present invention provides a semiconductor integrated circuit device that reduces the influence of crosstalk noise and is operable properly even when relatively long signal wirings that pass over a macrocell are formed. In the semiconductor integrated circuit according to the present invention, buffering cells formed between the macrocell and... Agent: Studebaker & Brackett PC
20090184760 - Driver ic with hv-isolation, especially hybrid electric vehicle motor drive concept: An automotive drive system for a high voltage electric motor comprises a microcontroller and ECU powered by a low voltage (12 volt) bus net which controls the drives of a high voltage inverter powered by a 100 volt or higher source, which, in turn, drives the motor. To provide good... Agent: Ostrolenk Faber Gerb & Soffen07/16/2009 > patent applications in patent subcategories. category listing
20090179670 - Performance inversion detection circuit and a design structure for the same: A circuit containing a parallel connection of a first sub-circuit and a second sub-circuit is provided. The first sub-circuit comprises a serial connection of a first field effect transistor having a first threshold voltage and a first voltage dividing device. The second sub-circuit comprises a serial connection of a second... Agent: Scully, Scott, Murphy & Presser, P.C.
20090179671 - Power inverter control device for switching point determination: Current switching point determination devices use two comparators with fixed threshold values. According to an exemplary embodiment of the present invention, a power inverter control device for switching point determination is provided which comprises a filter circuit and a subsequent single comparator. By this arrangement, the time event is independent... Agent: Philips Intellectual Property & Standards
20090179672 - Avoiding floating diffusion contamination: A technique for operating a source follower buffer circuit, such as employed in a charge domain pipeline, to eliminate floating diffusion signal charge contamination from downstream circuits. The method and apparatus places an output of the circuit in a known state immediately prior to charge transfer into a floating diffusion,... Agent: Hamilton, Brook, Smith & Reynolds, P.C.
20090179673 - Delay stabilization for skew tolerance: In an integrated circuit with at least two separate timing circuits, for example both a serializer and a deserializer, a trim value correction factor is developed and applied at the testing of the chip. The correction trim value brings the VCO frequency of the serializer into specifications, but the trim... Agent: Cesari And Mckenna, LLP
20090179674 - Phase-combining circuit and timing signal generator circuit for carrying out a high-speed signal transmission: A phase-combining circuit for combining cyclic timing waveforms that have been phase-controlled by control signals based on three or more input signals of different phases, has a weight signal generating circuit and a weighting circuit. The weight signal generating circuit generates weights according to the control signals, and the weighting... Agent: Kratz, Quintos & Hanson, LLP
20090179675 - Dll circuit and method of controlling the same: A delay locked loop (DLL) circuit includes a clock signal dividing unit that can divide a reference clock signal by a predetermined division ratio and generate a division clock signal, a feedback loop that can perform a delay locked operation on the division clock signal and generate a delay clock... Agent: Baker & Mckenzie LLP Patent Department
20090179676 - Local coarse delay units: One delay locked loop circuit embodiment includes a delay line system configured to generate a clock output signal by adding a delay line system time delay to a clock reference signal, a phase detector, a shift register, and a control unit. The delay line system includes a coarse delay line... Agent: Brooks, Cameron & Huebsch , PLLC
20090179677 - Circuit for generating overlapping signals: A circuit for generating overlapping signals from a single input signal includes a pair of complementary MOS transistors. The complementary MOS transistors have interconnected gates and are connected in series between opposite supply terminals by a chain of successive reciprocal delay stages. The input signal is applied to the interconnected... Agent: Texas Instruments Incorporated
20090179678 - Spread spectrum clock interoperability control and inspection circuit: A spread spectrum clock generator (SSCG) control and inspection circuit provides a system and method for inspecting and controlling an external SSCG, and for verifying the modulation profile waveform of an external SSCG. An electronic circuit is included that can check for the presence of an optimal SSCG modulation profile... Agent: Lexmark International, Inc. Intellectual Property Law Department
20090179679 - Slew-rate control circuitry with output buffer and feedback: The present invention proposed a slew-rate control circuitry without the use of external components such as amplifiers. Therefore slew-rate control circuitry of the present invention not only provides an IC with build-in slew-rate control, but also reduces number of transistors used externally which will increase gate-oxide reliability of the IC.... Agent: Sinorica, LLC
20090179680 - Method and apparatus for implementing balanced clock distribution networks on asics with voltage islands functioning at multiple operating points of voltage and temperature: A method and apparatus implement balanced clock distribution networks on application specific integrated circuits (ASICs) with voltage islands functioning at multiple operating points of voltage and temperature, and a design structure on which the subject circuit resides is provided. A clock source is coupled to an N-level balanced clock tree... Agent: Ibm Corporation RochesterIPLaw Dept 917
20090179681 - Semiconductor device: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20090179682 - High speed driver equalization: The present invention relates to emphasizing and de-emphasizing of an analog data signal. Using a main analog driver (14) a data signal indicative of bit values of binary data is converted into a first analog data signal. A second data signal is determined by delaying the data signal a predetermined... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090179683 - Image display system: An image display system is provided. The image display system includes a level shifter including a first voltage adjusting circuit and a second voltage adjusting circuit. The first voltage adjusting circuit adjusting the voltage of an input signal, includes a small signal input terminal receiving the input signal and a... Agent: Venable LLP
20090179684 - Voltage converter with auto-isolation function: The disclosure relates to a voltage converter, converting a first signal of a first voltage to output a second signal of a second voltage. A level shifter receives the first signal to generate the second signal. An isolation circuit is coupled to the output of the level shifter, passing the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090179685 - Power switch circuit having variable resistor coupled between input terminal and output transistor and changing its resistance based on state of output transistor: A power switch circuit includes an output transistor which is connected between a first power supply terminal and an output terminal, and drives a load, an abnormality detecting circuit which detects an abnormal state of the output transistor, a resistance element which generates a resistance component by a diffusion layer... Agent: Mcginn Intellectual Property Law Group, PLLC
20090179686 - Time-balanced multiplexer switching methods and apparatus: Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly.... Agent: Ropes & Gray LLP
20090179687 - Protected power devices: A power insulated gate field effect transistor has main cells (2) controlled by a main cell insulated gate and sense cells (4) controlled by a sense cell insulated gate. A sample and hold circuit (10, 50) is arranged to operate in a plurality of states including at least one sample... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090179688 - Semiconductor integrated circuit and power-supply control method: A semiconductor integrated circuit includes: a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears; a second voltage line; a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on the second voltage line and the... Agent: Rader Fishman & Grauer PLLC
20090179689 - Semiconductor on-chip repair scheme for negative bias temperature instability: Disclosed are embodiments of a semiconductor chip structure and a method that incorporate a localized, on-chip, repair scheme for devices that exhibit performance degradation as a result of negative bias temperature instability (NBTI). The repair scheme utilizes a heating element above each device. The heating element is configured so that... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC
20090179690 - Fuse circuit for use in a semiconductor integrated apparatus: A fuse circuit of a semiconductor integrated apparatus includes a first fuse block and a second fuse block. The first fuse block includes a first up fuse block that includes a plurality of fuses, and a first down fuse block that includes fuses less than the number of fuses of... Agent: Baker & Mckenzie LLP Patent Department
20090179691 - Voltage generator circuit: Embodiments are provided that include a circuit for generating voltage in a memory. One such circuit includes a charge pump circuit including a first transistor, a high-voltage switch circuit, and a cut-off switch circuit arranged to reduce leakage current from the charge pump circuit. The cut-off switch circuit includes a... Agent: Fletcher Yoder (micron Technology, Inc.)
20090179693 - Semiconductor device: The well voltage of a CMOS circuit having low-threshold-voltage MOSFETs is controlled when the power supply is turned on, during normal operation, and when the supply voltage is cut off. The CMOS circuit can thus operate stably with lower power consumption, because latching-up is reduced when the supply voltage is... Agent: Mattingly & Malur, P.C.
20090179692 - Semiconductor integrated circuit device operating with low power consumption: Transistors having large gate tunnel barriers are used as transistors to be on in a standby state, MIS transistors having thin gate insulating films are used as transistors to be off in the standby state, and main and sub-power supply lines and main and sub-ground lines forming a hierarchical power... Agent: Mcdermott Will & Emery LLP
20090179694 - Discharge circuit: Provided is a discharge circuit. The discharge circuit for discharging two positive and negative high voltages after an erase operation of a non-volatile memory includes: a negative high voltage side discharge unit flowing constant current from a supply voltage to a negative high voltage node of the non-volatile memory to... Agent: Volentine & Whitt PLLC
20090179695 - Apparatus and method having reduced flicker noise: Different techniques for signal processing having reduced flicker noise are described herein.... Agent: Infineon Technologies Ag Patent Department
20090179696 - Time constant automatic adjusting circuit, filter circuit system, and method of automatically adjusting time constant: A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.07/09/2009 > patent applications in patent subcategories. category listing
20090174436 - Input signal level detection apparatus and method: A method and an input signal level detection apparatus that correctly detect a level of an input signal while consuming low power apparatus including: a full-wave rectifier outputting a full-wave rectified waveform by performing a full-wave rectification on a first signal corresponding to an input signal, and on a second... Agent: Stein Mcewen, LLP
20090174437 - Semiconductor device and method for controlling thereof: A semiconductor device includes a circuit section having an output impedance which changes in accordance with a switching signal for switching between drive capabilities, and transforming an input signal into an output signal in accordance with the output impedance, a reference voltage generating section generating a reference voltage in accordance... Agent: Arent Fox LLP
20090174438 - Data trigger reset device and related method: A data trigger reset device for an electronic device is provided in order to avoid system errors due to out-of-sequence reset on electronic devices of an electronic system. The data trigger reset device includes a voltage converter and a voltage comparator. The voltage converter receives an input signal and then... Agent: North America Intellectual Property Corporation
20090174439 - Multifunctional output drivers and multifunctional transmitters using the same: A multifunctional output driver capable of transmitting signals of different interfaces in different modes is provided, in which first and second current sources are provided, and first to fourth switching devices are coupled between the first and second current sources, and the first and second current source and the first... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090174440 - Frequency-hopping pulse-width modulator for switching regulators: A frequency-hopping pulse-width modulator is disclosed, which facilitates a switching regulator to use smaller-size inductive and capacitive elements, to have an improved power efficiency at light load, as well as predictable spectrum at different load levels. The improved modulator automatically determines the switching frequency of a switching regulator according to... Agent: Leydig Voit & Mayer, Ltd
20090174441 - Peak power reduction methods in distributed charge pump systems: A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended... Agent: Ibm Corporation (jvm)
20090174442 - Ramp generator and image sensor including the same: A ramp signal generator is provided. The ramp signal generator may include a ramp signal generation unit configured to generate a ramp signal based on an externally-supplied driving voltage and a ramp signal correction unit configured to feed back and compare the ramp signal with a reference signal and correct... Agent: Harness, Dickey & Pierce, P.L.C
20090174443 - Hard reset and manual reset circuit assembly: A simple inexpensive hard reset and manual reset circuit assembly that provides a delay time during reset for enabling other matched electronic devices to have sufficient time to reach ready status. The circuit assembly includes a power source, a first resistor, a first electric control switch, which has a control... Agent: Bacon & Thomas, PLLC
20090174444 - Power-on-reset circuit having zero static power consumption: A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from... Agent: Weingarten, Schurgin, Gagnebin & Lebovici LLP
20090174445 - Semiconductor devices, methods of operating semiconductor devices, and systems having the same: A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal... Agent: Harness, Dickey & Pierce, P.L.C
20090174446 - Systems and methods for calibrating the loop bandwidth of a phase-locked loop (pll): A method for calibrating the loop bandwidth of a phase-locked loop (PLL) is described. At least one resistor in the PLL filter is tuned in accordance with the frequency of an input reference signal. One or more capacitors in the PLL filter are tuned in accordance with the frequency of... Agent: Qualcomm Incorporated
20090174447 - Semiconductor integrated circuit and method of controlling the same: A semiconductor integrated circuit is disclosed. The disclosed semiconductor integrated circuit of the present invention includes a DLL (Delay Locked Loop) controller that controls whether to activate a DLL at the entry of a power down mode, in response to a result of detecting whether a range of phase change... Agent: Baker & Mckenzie LLP Patent Department
20090174448 - Differential communication link with skew compensation circuit: A system and method is presented for reducing skew between the positive and negative components of a differential signal in a high speed communications link. The communications link includes a signal generator producing and transmitting complementary positive and negative signals over separate transmission lines and a receiver receiving the complementary... Agent: Quarles & Brady LLP
20090174449 - Driving circuit slew rate compensation method: An apparatus for compensating slew rate of a driving circuit includes: a first circuit, for receiving an edge transition from the driving circuit and generating a first pulse proportional to an actual slope of the edge transition; a second circuit, for receiving an ideal edge transition of the driving circuit... Agent: North America Intellectual Property Corporation
20090174450 - Programmable high-speed cable with boost device: An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing... Agent: Victoria Donnelly
20090174452 - Device and method for handling metastable signals: A method and device for managing metastable signals. The device includes: a first latch and a second latch, a multiple switching point circuit, connected between an output node of the first latch and an input node of the second latch, wherein the multiple switching point circuit includes at least one... Agent: Freescale Semiconductor, Inc. Law Department
20090174451 - Method of stitching scan flipflops together to form a scan chain with a reduced wire length: The scan flipflops on a semiconductor chip are stitched together to form one or more scan chains, located in one or more standard cell placement regions, after the optimal physical location of each scan flip-flop has been determined. As a result, the total length of the scan chain wires is... Agent: Law Office Of Mark C. Pickering
20090174453 - System and method of conditional control of latch circuit devices: A circuit device includes a first input to receive a reset control signal and a second input coupled to an output of a latch. The circuit device also includes a logic circuit adapted to conditionally reset the latch based on a state of the output in response to receiving the... Agent: Qualcomm Incorporated
20090174454 - Clock circuit for a microprocessor: A wireless communication device is described having a transmitter that generates electromagnetic interference when operating in a transmit mode. The wireless communication device comprises a clock circuit including a first clock element configured to generate a first clock output, and a second clock element configured to generate a second clock... Agent: Patent Group 2n Jones Day
20090174455 - Explicit skew interface for mitigating crosstalk and simultaneous switching noise: Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock... Agent: Knobbe Martens Olson & Bear LLP
20090174456 - Dc offset correcting device and dc offset correcting method: A signal generator generates a test signal including a positive signal and a negative signal which have the same amplitude. The signal generator corrects a DC level of the test signal based on a DC offset correcting signal supplied thereto, and supplies the corrected test signal to a frequency converter.... Agent: Young & Thompson
20090174457 - Implementing low power level shifter for high performance integrated circuits: A low power level shifter circuit for high performance integrated circuits includes an input inverter operating in a domain of a first voltage supply and receiving an input signal and a design structure on which the subject circuit resides is provided. An output stage operating in a domain of a... Agent: Ibm Corporation RochesterIPLaw Dept 917
20090174458 - Level shifter with embedded logic and low minimum voltage: In one embodiment, a level shifter circuit may include a shift stage that also embeds transistors that implement a logic operation on two or more inputs to the level shifter. At least one of the inputs may be sourced from circuitry that is powered by a different power supply than... Agent: Mhkkg, PC/apple, Inc.
20090174460 - Method of third-order transconductance cancellation and linear mixer thereof: A third-order transconductance (gm3) cancellation is utilized to obtain a highly linear mixer. Transistors obtain good linearity with complementary gm3 values. The transistor thus obtained can be operated in a wide bandwidth and is applicable to various frequency specifications of systems, like Bluetooth, wireless LAN, Ultra-Wide Band (UWB), etc. Then... Agent: Troxell Law Office PLLC Suite 1404
20090174459 - Quadrature radio frequency mixer with low noise and low conversion loss: In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty... Agent: Qualcomm Incorporated
20090174461 - Quick turn on apparatus and method for a nmosfet switch: A quick turn on apparatus and method for a NMOSFET switch are used to maintain the gate voltage of the NMOSFET switch non-zero but not enough to turn on the NMOSFET switch, such that the NMOSFET switch turns on more quickly when it is to be turned on. Seamless transition... Agent: Rosenberg, Klein & Lee
20090174462 - Circuit board arrangements for electronic device input components: Electronic devices may be provided with one or more input components and one or more circuit boards. An input component may include sensor circuitry supported by a first circuit board and controller circuitry supported by a second circuit board. In other embodiments, the sensor circuitry may be coupled to a... Agent: Kramer Levin Naftalis & Frankel LLP
20090174463 - Multi-system module having functional substrate: A multi-system module having a functional substrate includes a substrate comprising therein at least one control circuit units, and a plurality of main circuit units provided on one side surface of the substrate. The main circuit units are electrically connected to the control circuit unit, whereby the control circuit unit... Agent: Rosenberg, Klein & Lee
20090174464 - Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode: Use of a forward biased diode to reduce leakage current of transistors implemented on silicon on insulator (SOI) is a particular challenge due to the difficulty of achieving effective contact with the region beneath the gate of the transistor. An improved implementation in SOI gate fingers that reach under the... Agent: Glenn Patent Group
20090174465 - Semiconductor integrated circuit: A semiconductor integrated circuit includes a boost circuit configured to boost a power supply voltage so as to generate first and second voltages, the second voltage being lower than the first voltage, a load circuit supplied with the first voltage, and a capacitor. The capacitor has first and second diffusion... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20090174466 - Charge pump circuit: A charge pump circuit is provided. The charge pump circuit includes a pump unit, first through sixth switches, a fly capacitor and an output capacitor. In a first period, an input voltage and a first voltage charge at least one internal capacitor of the pump unit via a first terminal... Agent: Jianq Chyun Intellectual Property Office
20090174467 - Power supply circuit for the wall mounted electronic switch: This is a disclosure of a power supply circuit for wall-mounted electronic switches. The disclosed invention is about a power supply circuit for driving circuit inside the wall-mounted electronic switches, which can supply sufficient current demanded by these switch circuits. Recently the functions of wall-mounted electronic switches are being diversified... Agent: The Rafferty Patent Law Firm
20090174468 - Thermal sensing circuit using bandgap voltage reference generators without trimming circuitry: Methods, systems and thermal sensing apparatus are provided that use bandgap voltage reference generators that do not use trimming circuitry. Further, circuits, systems, and methods in accordance with the present invention are provided that do not use large amounts of chip real estate and do not require a separate thermal... Agent: Hogan & Hartson L.L.P.
20090174469 - Sizing and placement of charge recycling (cr) transistors in multithreshold complementary metal-oxide-semiconductor (mtcmos) circuits: In one embodiment, a circuit includes a first row of circuit blocks that are each connected to a supply directly and to ground via a first sleep transistor. A connection between the first circuit block and the first sleep transistor is a virtual ground node. The circuit includes a second... Agent: Baker Botts L.L.P.
20090174470 - Latch-up protection device: A latch-up protection device is provided. The latch-up protection device includes a first transistor, a detection module, and a processing module. The first transistor includes a first source/drain coupled to a pad, a body and a second source/drain coupled to a first voltage, and a gate. The detection module is... Agent: J C Patents, Inc.07/02/2009 > patent applications in patent subcategories. category listing
20090167360 - Apparatus, circuit and method of monitoring performance: An apparatus includes a first sequential circuit which captures an input signal according to a first clock signal, a second sequential circuit which captures the input signal according to a second clock signal and outputs the captured input signal to a logic circuit, the second clock signal being modulated so... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167361 - High-speed amplitude detector with a digital output: An amplitude detection circuit using a sinusoidal input signal inputs to produce a digital output (a one or zero) is described. The circuit uses an input field effect transistor (FET) with a gate load coupled to a gate of the input FET. A drain load may be coupled to a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090167362 - Comparator: A comparator is provided. In a first period, input terminal of the pre-amplifier is coupled to a first voltage. A first terminal of the first capacitor is coupled to the second input terminal of the pre-amplifier. A second terminal of the first capacitor is coupled to the first input voltage... Agent: Jianq Chyun Intellectual Property Office
20090167363 - Reduction of signal skew: Skew is reduced by extracting the AC component of an input signal and superimposing it on a common reference voltage to produce a resulting voltage. The resulting voltage is provided as an input to a comparator, which compares it to the reference voltage to provide a final output. Thus, all... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.
20090167364 - Current sampling method and circuit: A current sampling circuit including a current sampling transistor, a capacitor arrangement between the gate and source of the current sampling transistor and an amplifier provided in a feedback loop between the gate and source of the current sampling transistor. A switch controls the circuit to sample a gate-source voltage... Agent: Venable LLP
20090167365 - Method for regulating a voltage and circuit therefor: A regulator circuit and a method for regulating an output voltage. The regulator circuit includes an undervoltage protection stage capable of operating in a plurality of operating modes. In one mode, the undervoltage protection stage compensates for a low undervoltage appearing in the output voltage and in another mode it... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700
20090167366 - Audio clock regenerator with precise parameter transformer: It is difficult to implement a conventional phase lock loop circuit in a sink device within an HDMI system because the low frequency input causes the conventional phase lock loop circuit to absorb unnecessary noise during a long waiting period. Therefore, the present invention provides a low jitter clock regenerator... Agent: Baker & Mckenzie LLP Patent Department
20090167367 - Frequency synthesizer: As s specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of... Agent: Jordan And Hamburg LLP
20090167369 - Lvds output driver: An output driver is disclosed. The output driver has a pair of differential outputs coupled to a first supply voltage via a pair of load devices and comprises a current source, a pair of low voltage transistors, a pair of high voltage transistors, and a resistor. The current source has... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090167370 - Output buffer: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected... Agent: Trop, Pruner & Hu, P.C.
20090167368 - Pre-driver circuit having a post-boost circuit: A pre-driver is provided that includes a pre-boost circuit and a post-boost circuit. The post-boost circuit may include a pulse generator circuit to provide a feedback to be used to control an output of the pre-driver.... Agent: Ked & Associates, LLP Intel Corporation
20090167371 - Capacitive load driving circuit: It is aimed to reduce the area of an output circuit in a capacitive load driving circuit capable of high voltage output, such as a PDP scan driver for driving a plasma display panel. To achieve this, there are provided an arbitrary number of N-type MOS transistors 001, 002, .... Agent: Dickinson Wright PLLC James E. Ledbetter, Esq.
20090167372 - Automatic adjustment circuit, and filter circuit: An automatic adjustment circuit comprises a replica (1) constituted of either a circuit block of a portion of a filter body (3) or a combination of the circuit block, and fed with a reference signal (2) from the outside, for outputting signals having a phase delays of 90 degrees and... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167374 - Jitter-free divider: A system and method are provided for jitter-free fractional division. The method accepts a first plurality of first signal phases, each phase having a first frequency. To make the division jitter-free, a phase is selected subsequent to deselecting a previous phase selection. The selected phase is divided by the integer... Agent: Law Office Of Gerald Maliszewski
20090167373 - Multi-phase frequency divider: A multi-phase frequency divider comprises dynamic inverters connected in a ring and the intermediate nodes around the ring are stabilized with cross-coupled latches. Clock input pulses enable each dynamic inverter's output and will force a corresponding change-of-state in the cross-coupled latches. The multi-phase output is presented in parallel on all... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090167375 - Signal generation system: A signal generation system maintains a phase relationship between output signals of first and second signal generators even when the sampling clock frequency is changed. The signal generators are coupled via a communication means including a dedicated cable where the delay amount of the communication means is known and fixed.... Agent: William K. Bucher Tektronix, Inc.
20090167376 - System and method for pulse edge synchronization: A system and method for pulse edge synchronization, According to an embodiment, a first series of PWM signals that may drive a first device wherein each pulse in this series has a rising edge and a falling edge. The system and method further includes a second series of PWM signals... Agent: Graybeal Jackson LLP
20090167378 - Method and system for providing a power-on reset pulse: Provided are a method and system for providing a power-on reset pulse. The system includes a level detector configured to receive an input signal and produce, at least indirectly, a reset signal when the input signal reaches a predetermined level. The system also includes a counter having counting characteristics and... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20090167377 - Semiconductor storage device and resetting method for a semiconductor storage device: An exemplary aspect of an embodiment of the present invention is a semiconductor storage device including a power-on reset generator that outputs a first reset signal in accordance with a level of a power supply voltage, a command decoder that moves to a mode set state in accordance with input... Agent: Foley And Lardner LLP Suite 500
20090167379 - Method and apparatus for digital vcdl startup: Methods and apparatus are provided fox improved startup of a voltage controlled delay loop that has an injection clock and a return clock. A control signal is determined for a plurality of delay elements in a voltage controlled delay loop by obtaining a histogram count of a number of occurrences... Agent: Ryan, Mason & Lewis, LLP
20090167380 - System and method for reducing eme emissions in digital desynchronized circuits: A system includes first and second synchronous circuits and an asynchronous circuit configured to receive input from the first synchronous circuit and to send output to the second synchronous circuit. First and second variable clock generators are configured to drive the first and second synchronous circuit. A delay circuit is... Agent: Steptoe & Johnson LLP
20090167381 - Time measurement of periodic signals: A system for measuring a time between a first periodic signal and a second periodic signal. The second signal has a frequency higher than a frequency of the first signal. According to one embodiment, the system includes an electronic circuit for determining an approximation of the time based on a... Agent: Teradyne, Inc. C/o Foley & Larder, LLP
20090167384 - Dividing circuit and phase locked loop using the same: The PLL includes a selection signal generator configured to output a selection signal varying in response to a first clock signal, and a first dividing circuit configured to divide an externally input reference clock signal by a division ratio and output a first division signal. The first dividing circuit selects... Agent: Harness, Dickey & Pierce, P.L.C
20090167383 - Method for generating a clock frequency: A method and apparatus generates a clock frequency dependent on a reference clock signal and has a phase locked loop configuration. A multiplexer is connected into the transmission path of the respective incoming input signal, to which the corresponding input signal is fed directly, on the one hand, and in... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP
20090167382 - Pll apparatus: As a concrete means for solving the problem, an A/D (analog/digital) conversion unit samples a standard signal based on a 40 MHz frequency signal, which is a rectangular wave, from an oven-controlled crystal oscillator (OCXO), and an orthogonal transformation unit applies orthogonal transformation to a digital signal from the A/D... Agent: Jordan And Hamburg LLP
20090167386 - Charge pumping circuit, clock synchronization circuit having the charge pumping circuit, and method for operating the clock synchronization circuit: A charge pumping circuit includes a first charge pump configured to perform a charge pumping operation on an output terminal in response to a first pumping control signal, an auxiliary charge pumping controller configured to generate a second pumping control signal activated during a predetermined section of an activation period... Agent: Blakely Sokoloff Taylor & Zafman LLP
20090167387 - Delay-locked loop for timing control and delay method thereof: A delay-locked loop for timing control, includes a voltage-controlled delay line that delays a reference clock to generate a multi-phase clock comprising a plurality of delayed phase clocks; and an up/down controller that receives one of the delayed phase clocks as a feedback clock and generates a frequency up/down control... Agent: Workman Nydegger 1000 Eagle Gate Tower
20090167385 - Phase locked loop device and control method thereof: A phase locked loop device is provided. The phase locked loop device includes a phase/frequency detector, a charge pump, a low pass filter, a voltage-controlled oscillator, and a control unit. The phase/frequency detector generates a compared signal corresponding to a phase difference between a reference clock signal and a feedback... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090167388 - Delay locked loop circuit and control method of the same: A delay locked loop capable of preventing delay locking time from being increased, even if the operational environment fluctuates. The delay locked loop circuit includes a delay line for delaying and outputting a reference clock signal, a phase detection unit for detecting a phase difference between the reference clock signal... Agent: Baker & Mckenzie LLP Patent Department
20090167389 - Voltage-controlled oscillator: The present invention discloses a calibration circuit for a voltage-controlled oscillator (10a-10c) and also a method for calibrating the voltage-controlled oscillator. The apparatus comprises a first counter (210) for counting the number of cycles of a reference signal (Fclk) and a second counter (220) for counting the number of cycles... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20090167390 - Data transfer device and electronic camera: A data transfer device can adjust a phase of a clock signal with a simple configuration in a short period of time when transferring a digital data signal in synchronization with the clock signal. Accordingly, the data transfer device includes a data transfer line serially transferring the data signal, a... Agent: Oliff & Berridge, PLC
20090167391 - Quarter cycle delay clock generator: Embodiments relate to a quarter cycle delay clock generator. According to embodiments, a quarter cycle delay clock generator may include a reference clock generator to generate a reference clock signal, a first logic circuit to catch a first input signal input thereto at a rising edge of the reference clock... Agent: Sherr & Vaughn, PLLC
20090167392 - Narrow pulse generator: A pulse generator is provided that includes: a current source, a source follower whose output controls the gate of a FET and a differential stage whose input voltage consists of inverting square waves and its output voltage consists of extremely narrow pulses widths, for example, of 30 to 40 ps... Agent: Haynes And Boone, LLPIPSection
20090167394 - Integrated circuits having devices in adjacent standard cells coupled by the gate electrode layer: An integrated circuit (500) includes an array of standard cells including at least a first and a second standard cell (501-504). At least one device in the first standard cell is directly coupled to at least one device in the second standard cell by a gate electrode layer (515) of... Agent: Texas Instruments Incorporated
20090167395 - High performance latches: An integrated circuit includes at least one latch circuit (300). The latch circuit (300) includes a first stage comprising a latch node (311) positioned between a first pull up device (303) operable to receive a first data signal and a first pull down device (302) operative to receive second data... Agent: Texas Instruments Incorporated
20090167396 - High performance clocked latches and devices therefrom: An integrated circuit (400) includes at least one clocked latch circuit (410). The clocked latch circuit (400) includes a first stage (415) including a latch node (420) positioned between a first pull up device (416) and a first (417) and at least a second pull down device (418), wherein the... Agent: Texas Instruments Incorporated
20090167397 - Delay device for adjusting phase smia standard: A delay device for adjusting phase under a SMIA (Standard Mobile Imaging Architecture) standard is provided. More particularly, the delay device is used to adjust a phase of a clock signal, which carries data, under the SMIA standard. The delay device includes plural delay cells, which are disposed on a... Agent: Rosenberg, Klein & Lee
20090167398 - Pulse signal delay circuit and led drive circuit: A pulse signal delay circuit comprises: a first pulse edge delay circuit for generating a first delay timing signal for sequentially outputting a first edge detection delay timing gained by detecting the rising edge of an input pulse signal and delaying the detection timing by a constant delay time a... Agent: Birch Stewart Kolasch & Birch
20090167399 - Signal delay circuit: A signal delay circuit including a capacitive load element is described. The capacitive load element has a first input end, a second input end, and a third input end. The first input end receives a first signal, the second input end receives a second signal inverted to the first signal,... Agent: Workman Nydegger 1000 Eagle Gate Tower
20090167400 - Device and method for generating clock signal: In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of... Agent: Mcdermott Will & Emery LLP
20090167401 - Timing signal generator providing synchronized timing signals at non-integer clock multiples adjustable by more than one period: A system for providing a plurality of synchronous timing signals having period values that are not even multiples of the clock period including a plurality of local edge generators receiving the clock signals, each local generator including local programmable means to record an absolute time at which to generate a... Agent: Teradyne, Inc
20090167402 - Dual barrel receiver equalization architecture: Methods and apparatus relating to dual barrel receiver equalization architectures are described. In an embodiment, a receiver logic may include an amplifier and two comparators to equalize frequency components of a received signal. The receiver logic may further include offset adjustment (or cancelation) logic to generate an offset adjustment (or... Agent: Caven & Aghevli LLC C/o Cpa Global
20090167403 - Agc method using digital gain control: An attenuator system includes a first adjustable impedance component on a first current path between a input component and a output component, and a second adjustable impedance component between the first current path and ground, wherein each of the first and second adjustable impedance components include a plurality of selectable,... Agent: Fulbright & Jaworski L.l.p
20090167404 - Semiconductor device, electronic device having the same, and driving method of the same: A digital circuit which can operate normally regardless of binary potentials of an input signal is provided. A semiconductor device comprising a correcting unit and one or a plurality of circuit elements, the correcting unit including a first capacitor, a second capacitor, a first switch, and a second switch, wherein... Agent: Fish & Richardson P.C.
20090167405 - Reduced leakage voltage level shifting circuit: A level shifting circuit includes a first stage and a second stage. The first stage and second stage are operatively coupled to a first and second power supply. The first stage translates a differential input voltage into an intermediate differential voltage. The second stage translates the intermediate differential voltage into... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.C.
20090167406 - Read circuit, variable resistive element device, and imaging device: A read circuit includes: an integration circuit section configured to perform an integral operation and whose input is connected to an integration node; and a bias circuit connected between a connection node to which a variable resistive element is connected and the integration node. The bias circuit includes: an integration... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167407 - Operational amplifier and integrating circuit: An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167408 - Power switch assembly for capacitive load: A power switch assembly for a capacitive load 10 which includes a common electrode 14 and first and second discrete electrodes 16, 18, includes a node n1 coupled to a voltage source Vcc for receiving power there from, a first switching device connected between the node n1 and ground, a... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20090167409 - Level shifting switch driver on gaas phempt: A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element (12) having four semiconductor switching units (68, 70) with each adapted for receiving a gate control signal. A level shift circuit (10) generates a biasing voltage signal communicated of the switching... Agent: Marsteller & Associates, P. C.
20090167411 - Normally-off electronic switching device: A device capable of bidirectional on-off switching control of an electric circuit. Included is a normally-on HEMT connected between a pair of terminals of the device. A normally-off MOSFET of relatively low antivoltage strength is connected between the HEMT and one of the pair of terminals, and another similar MOSFET... Agent: Woodcock Washburn LLP
20090167410 - Power supply switching circuit: Provided is a power supply switching circuit capable of efficiently supplying a desired voltage among a plurality of voltages to a load. In the case of a P-type semiconductor substrate, N-type MOS transistors are provided between a load and an AC adapter and between the load and a battery, and... Agent: Brinks Hofer Gilson & Lione
20090167412 - Gate-charge retaining switch: The present invention discloses MOSFET or IGBT switch drive circuitry that uses the gate capacitance and the inherently high gate resistance of such switch devices to provide essentially bistable switching. Gate-charge is injected to enhance the switch device(s), invoking an ON state. Gate-charge is removed to deplete the switch device(s),... Agent: Rudoler & Derosa LLC Attn: Docket Clerk
20090167413 - Semiconductor device and data outputting method of the same: Semiconductor device and data outputting method of the same includes an on die thermal sensor (ODTS) configured to output temperature information by detecting an internal temperature of the semiconductor device and an output driver configured to control a slew rate depending on the temperature information and output data.... Agent: Mannava & Kang, P.C.
20090167414 - Temperature detection for a semiconductor component: Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a semiconductor component that has a gate electrode and a control terminal being connected to the gate electrode and receiving a control signal for charging and discharging the gate electrode,... Agent: Dicke, Billig & Czaja
20090167415 - Skew signal generator and semiconductor memory device: A skew signal generator is provided which comprises a fuse signal generating unit for generating a plurality of fuse signals, and an encoder for generating skew signals including skew information of a wafer by encoding the fuse signals.... Agent: Cooper & Dunham, LLP
20090167417 - Charge pumping circuit with decreased current consumption: A charge pumping circuit consumes less current by reducing the number of charge pumps operating simultaneously. The charge pumping circuit includes a voltage sensor that detects a level of a high voltage and outputs a control signal based on the detection result. An oscillator provides an oscillating clock signal in... Agent: Ladas & Parry LLP
20090167416 - Current consumption prevention apparatus of a high voltage generator: A current consumption prevention apparatus includes a first current supply unit for transferring charges from a capacitor connected to a first inverter group to a capacitor connected to a second inverter group, and a second current supply unit for transferring charges of the capacitor connected to the second inverter group... Agent: Townsend And Townsend And Crew, LLP
20090167418 - Supply regulated charge pump system: An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump... Agent: Cypress Semiconductor Corporation
20090167419 - Voltage converting circuit: Leakage current flowing into load is prevented when a charge pump circuit operation is halted. The charge pump circuit converts supply voltage, supplied to a supply-voltage input terminal, to an output signal having desired voltage value and outputs the signal to an output terminal. A first bypass circuit, connected between... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167420 - Design structure for regulating threshold voltage in transistor devices: A circuit and a design structure including the circuit embodied in a machine readable medium are disclosed. The circuit is for regulating a desired value of threshold voltage, Vt, for a given FET transistor device. The circuit is coupled to the FET for regulating the desired value of Vt, by... Agent: Scully, Scott, Murphy & Presser, P.C.
20090167421 - Step-down circuit, semiconductor device, and step-down circuit controlling method: A step-down circuit is connected between a power supply node for supplying a supply voltage and an internal power supply line for supplying a power to the object circuit and steps-down the supply voltage, and supplies the stepped-down voltage to the object circuit through the internal power supply line. The... Agent: Mcginn Intellectual Property Law Group, PLLC
20090167422 - Transistor output circuit and method: A transistor circuit is provided. The transistor circuit includes a first output transistor, a second output transistor, and a switch arrangement. The first and second output transistors are arranged for providing an output signal to a common output of the transistor circuit. The switch arrangement couples an output of the... Agent: Liu & Liu
20090167423 - Cpu core voltage supply circuit: A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output... Agent: Kirton And Mcconkie
20090167424 - Current cell circuit in digital-analog converter: Embodiments relate to a current cell circuit in a digital-analog converter. According to embodiments, a current cell circuit in a digital-analog converter may include a current source connected to a power voltage terminal to generate current having a predetermined magnitude, a first current switch transferring current provided from the current... Agent: Sherr & Vaughn, PLLC
20090167425 - Semiconductor memory device having back-bias voltage in stable range: A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal... Agent: Mannava & Kang, P.C.
20090167426 - Integrated circuit including filter circuit arrangement: An integrated circuit includes a filter circuit that has at least one active device, wherein the active device has adjustable transconductance.... Agent: Dicke, Billig & Czaja
20090167427 - Power circuit and power amplifier and base station device using the same: Disclosed are a high-efficiency power amplifier and base station device with respect to high-speed, broadband radio communication method. A broadband power supply circuit includes a linear voltage amplifier to which an input signal is applied, a resistor connected to an output side of the linear voltage amplifier, a switching regulator... Agent: Stanley P. Fisher Reed Smith LLPPrevious industry: Electronic digital logic circuitry
Next industry: Demodulators
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