Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 05/09

20090134913 - Signal comparison circuit: A signal comparison circuit is provided. The signal comparison circuit includes a first amplifier, a second amplifier, a peak detector, and a comparator. The first amplifier is a zero-peaking amplifier. The first amplifier receives and amplifies a data signal. The second amplifier receives and amplifies a reference voltage. The peak... Agent: J C Patents, Inc.

20090134914 - Low offset comparator and offset cancellation method thereof: A low offset comparator includes a preamplifier and a latch. The preamplifier includes a first output offset storage stage, a cascade of input offset storage stages and a second output offset storage stage. The first output offset storage stage receives an input voltage. The cascade of input offset storage stages... Agent: Rabin & Berdo, PC

20090134916 - Charge domain filter circuit: A charge domain filter circuit includes a first signal output portion, a second signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. The second signal output portion outputs a second signal that is sampled at... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134915 - Signal converting apparatus with a relay function wire terminal: A signal converting apparatus with a relay function connector includes a body, a signal converting unit installed in the body and having a signal connecting portion connected to an electronic device for transmitting or receiving a first signal, and at least one first signal line is extended into the body... Agent: Bacon & Thomas, PLLC

20090134917 - Voltage divider having varied output levels depending on frequency and pll including the same: A voltage divider for dividing an input voltage includes a fixed resistor, a variable resistor, an input node and an output node. The fixed resistor has a fixed resistance value independent of an operating frequency, and includes at least one resistance device. The variable resistor has a variable resistance value... Agent: Volentine & Whitt PLLC

20090134918 - Jitter generator for generating jittered clock signal: A jitter generator for generating a jittered clock signal, includes a jitter control signal generator and a jittered clock generator. The jitter control signal generator is utilized for selecting a digital control code from a plurality of candidate digital control codes at individual time points and respectively outputting a plurality... Agent: North America Intellectual Property Corporation

20090134919 - Input buffer for high-voltage signal application: An input buffer for a high-voltage signal application is provided. The input buffer uses a clamper and an inverter to clamp the output voltage in a proper range even if the input voltage is too high or too low. The proper range of the output voltage is controlled by a... Agent: Rosenberg, Klein & Lee

20090134920 - Semiconductor device: A voltage at each terminal of a transistor is adjusted by a feedback circuit using an amplifier circuit. A current Idata is input from a current source circuit to the transistor, and a gate-source voltage is set by the feedback circuit so that the transistor can flow the current Idata.... Agent: Fish & Richardson P.C.

20090134921 - Slope compensation method and circuit for a peak current control mode power converter circuit: A slope compensation method and circuit for a peak current control mode power converter circuit is provided. Since the power converter circuit has a synchronous signal of a driven signal of enabling the first primary switch and the second primary switch, a triangular wave signal is generated. The driven signals... Agent: Burr & Brown

20090134922 - Start-up circuit for bias circuit: A start-up circuit for a bias circuit is disclosed. The start-up circuit uses a switch to provide an activating signal to pull the bias circuit out of the null mode. The switch is triggered by a pulse from an external pulse supply or a combined pulse generator. After the pulse,... Agent: Rosenberg, Klein & Lee

20090134923 - Zero-delay buffer with common-mode equalizer for input and feedback differential clocks into a phase-locked loop (pll): A zero-delay clock generator has a phase-locked loop (PLL) that generates a feedback clock and receives a reference clocks. All clocks are differential and have a common-mode voltage. The common-mode voltage of an externally-generated reference clock can vary from the common-mode voltage of the internally-generated feedback clock. Differences in common-mode... Agent: Stuart T Auvinen

20090134924 - Delay locked loop circuit and semiconductor integrated circuit device: A technology capable of avoiding malfunction of a delay locked loop without generating a constant phase error in a delay locked loop circuit is provided. In a delay locked loop circuit, a control circuit is disposed in the outside of a delay locked loop, and in phase comparison of the... Agent: Miles & Stockbridge PC

20090134925 - Apparatus and method for hardening latches in soi cmos devices: A method of determining one or more transistors within a particular circuit to be respectively replaced with a hardened transistor includes: identifying, as not requiring hardening, one or more transistors; identifying, as candidates for hardening, each transistor in the circuit not previously identified as not requiring hardening; and employing the... Agent: Carey, Rodriguez, Greenberg & Paul, LLP

20090134926 - Multi-phase negative delay pulse generator: A multi-phase pulse generator provides an even number of pulse signals of same phase difference and pulse signals of higher frequency by applying a negative delay concept. The multi-phase pulse generator includes a first delay block with first unit blocks which have a first negative delay property respectively and of... Agent: Ladas & Parry LLP

20090134927 - Digital potentiometer system: A system or circuit for simulating a potentiometer, thermistor, or the like. A pulse stream, having a duty cycle which is varied as a changing pulse width or as a differing number of time slices per time period, may be input to the system. The pulse stream to a transistor... Agent: Honeywell International Inc.

20090134928 - Attenuator: In the existing technique in which the attenuation characteristic of an attenuator is adjusted by a voltage value, there are problems that a scale of a circuit of the attenuator increases because a new circuit for supplying voltage such as a step-down circuit becomes necessary, and that a thermal noise... Agent: Mcginn Intellectual Property Law Group, PLLC

20090134930 - Level shift circuit: A level shift circuit prevents a through current in an output circuit connected to a high-voltage power supply, thereby reducing power consumption and noise and enabling a high-speed operation. The level shift circuit includes first and second bias generating circuits that supply a gate bias voltage to each of a... Agent: Dickstein Shapiro LLP

20090134929 - Level shifter for high-speed and low-leakage operation: The present invention discloses a voltage level shifter capable of interfacing between two circuit systems having different operating voltage swings. The voltage level shifter comprises an input buffer having a low supply voltage for inverting an external input signal to an internal input signal, and an output buffer having a... Agent: North America Intellectual Property Corporation

20090134931 - Multiphase level shift system: Each of n level shifters (LS0 to LS7) includes an NMOS transistor (Mn1) for receiving any one of n clock signals (P0 to P7) and a PMOS transistor (Mp1) for receiving an output signal from another level shifter. An output signal given to the PMOS transistor (Mp1) included in each... Agent: Mcdermott Will & Emery LLP

20090134932 - Low flicker noise mixer and buffer: Low flicker noise mixer and buffer. This design employs some native metal oxide semiconductor field-effect transistors (MOSFETs) (e.g., having no threshold voltage) within a passive mixer whose gates are driven using clock signals. These native MOSFETs maybe biased at one half of the power supply voltage to provide a lower... Agent: Garlick Harrison & Markison

20090134933 - Output driver and method of operation thereof: The method of the present invention for switching an output driver of the type comprising an n-mos transistor and a p-mos transistor configured in a push-pull arrangement operates by directly monitoring the level of the output signal OUT. The method comprises slowly switching off the input to the initially designated... Agent: Townsend And Townsend And Crew, LLP

20090134934 - Electronic device: An electronic device includes a power interface for transmitting power, an integrated circuit capable of resetting, and a switch circuit. The switch circuit is connected to the power interface for transmitting the power to the integrated circuit after the integrated circuit is reset and stop transmitting the power to the... Agent: PCe Industry, Inc. Att. Steven Reiss

20090134935 - Anti-fuse repair control circuit for preventing stress on circuit parts: The present invention relates to an anti-fuse repair control circuit which regulates transmission of a power voltage and a back-bias voltage that are converted to repair an anti-fuse to a circuit part. As such, the present invention prevents the influence of a high power voltage or a low back-bias voltage... Agent: Ladas & Parry LLP

20090134937 - Charge pump circuit: A charge pump circuit includes initialization units, each of which initializes a boost node to an initialization voltage. Boosting units each boost the boost node to a higher voltage than the initialization voltage in response to an input voltage. First and second pump circuits each include a transfer unit for... Agent: Mills & Onello LLP

20090134936 - Charge pump circuit and cell thereof: A charge pump cell with an input and output nodes includes a first, second, and third equalization units, and a first, second, and third capacitors. The input node is coupled to the inputs of the first, second and third equalization units, and the output node is coupled to the second... Agent: Jianq Chyun Intellectual Property Office

20090134938 - Charge domain filter circuit: A charge domain filter circuit includes a first signal output portion, at least one second signal output, portion, a third signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. Each second signal, output portion outputs... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134939 - Transistor device and method: A field-effect transistor device, including: a semiconductor heterostructure comprising, in a vertically stacked configuration, a semiconductor gate layer between semiconductor source and drain layers, the layers being separated by heterosteps; the gate layer having a thickness of less than about 100 Angstroms; and source, gate, and drain electrodes respectively coupled... Agent: Martin Novack

20090128192 - Data receiver of semiconductor integrated circuit and method for controlling the same: A data receiver of a semiconductor integrated circuit includes an amplifier that outputs an amplified signal by detecting and amplifying received data using equalization function according to feedback data, a detecting unit that detects a period when data is not received in the amplifier and outputs a detecting signal, and... Agent: Baker & Mckenzie LLP Patent Department

20090128193 - Fast, low offset ground sensing comparator: A fast, accurate, low offset comparator may be configured with multiple gain stages. A low gain, low input impedance, and fully differential common-gate amplifier may be configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption. The inputs of the comparator may comprise... Agent: Huffman Law Group, P.C.

20090128195 - Integrated circuit comparator or amplifier: An integrated circuit comparator comprises a differential amplifier, a source follower circuit coupled to a gate terminal of a first transistor in the differential amplifier, and an output circuit. One or more source follower circuits may be utilized in connection with the differential amplifier, and one or more source follower... Agent: Dorsey & Whitney LLP Intellectual Property Department

20090128194 - Method and device for adjusting or setting an electronic device: Method and device for adjusting or setting an electronic device (1) exhibiting at least one input for an external input signal and at least one output signal output, the value or the state of the output signal being a function of the values or of the state of the input... Agent: Clark & Brody

20090128196 - Data holding circuit: A data holding circuit including a first input terminal through which data is inputted; at least one delay element for delaying the data inputted through the first input terminal; and a first element for holding data, wherein, when the data inputted through the first input terminal and the data delayed... Agent: Arent Fox LLP

20090128197 - Senthesizer module: To provide a synthesizer module that can be used not only in a destination area but also in the whole world and that can be readily set in output frequency. In the synthesizer module, a calculation formula table of a nonvolatile memory stores a plurality of frequency modes and the... Agent: Jacobson Holman PLLC

20090128198 - Digital frequency synthesizer: A digital frequency synthesizer receiving a first signal corresponding to a periodic sequence of first pulses at a first frequency and providing a second signal corresponding to a periodic sequence of second pulses at a second frequency. The synthesizer includes a first circuit clocked by a third signal corresponding to... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20090128199 - Biased clock generator: A method and system for generating a pair of synchronized clock signals is described. The system includes a first device connected between a first output voltage and an input reference voltage, wherein the first device generates a first output clock signal. Further, the system includes a second device connected in... Agent: Honeywell International Inc.

20090128200 - Receiver circuit of semiconductor memory apparatus: A receiver circuit capable of controlling setup/hold time includes a first phase transmission unit configured to generate a first output signal by detecting input data according to plural detection levels while being synchronized with a first clock signal, and controlling setup/hold time of the first output signal based on a... Agent: Baker & Mckenzie LLP Patent Department

20090128201 - Clock generators and clock generation methods thereof: Clock generators are provided. A phase locked loop generates an output clock, a delay line is coupled to an input of the phase locked loop, and a modulation unit integrates an input signal with a constant level to generate a modulation signal controlling the delay line, thereby modulating a phase... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090128202 - Timer unit circuit having plurality of output modes and method of using the same: First and second counter circuits output a signal based on a trigger signal and a clock signal respectively. A selection circuit selects first to fourth signals as the trigger signal, the clock signal, the trigger signal and the clock signal. In a first output mode, an output circuit outputs signals... Agent: Mcginn Intellectual Property Law Group, PLLC

20090128203 - Pll-based timing-signal generator and method of generating timing signal by same: A timing-signal generator includes a PLL circuit, one or more rising/falling edge generating unit and one or more timing-signal generating unit. In response to a reference signal with a frequency Fref, the PLL outputs M voltage controlled signals with the same frequency Fvco=N*Fref and equally distributed phase differences. The rising/falling... Agent: Wpat, PC

20090128204 - Time delay apparatus: A time delay apparatus for generating a plurality of phase shifted signals is described comprising a phase tuner generating a phase control signal and a phase interpolator receiving at least one digital signal and generating the plurality of phase shifted signals by. phase shifting the digital signal according to the... Agent: Choate, Hall & Stewart LLP

20090128205 - Electronic pulse-generating device: An electronic pulse-generating device (100) includes an input circuit (10) and an output circuit (20). The input circuit includes an input connector (11), a first resistor (R1) and a capacitor (12). The capacitor has one lead electronically connected to the input connector and another lead electronically connected to the first... Agent: PCe Industry, Inc. Att. Steven Reiss

20090128208 - Apparatus and method for detecting duty ratio of signals in semiconductor device circuit: Apparatus for detecting duty ratio of signals in semiconductor device circuit includes a circuit for detecting a duty ratio of signals in a semiconductor device includes a comparing unit which compares a duty cycle of first and second input clock signals input differentially and generates a first output signal and... Agent: Mannava & Kang, P.C.

20090128206 - Apparatus and method for obtaining desired phase locked loop duty cycle without pre-scaler: An apparatus and method for obtaining a desired phase locked loop (PLL) duty cycle without a pre-scaler are provided. The PLL circuit of the illustrative embodiments utilizes two separate loops that simultaneously operate on the VCO. One loop ensures the frequency and phase lock while the other loop ensures the... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20090128207 - Clock circuitry for generating multiple clocks with time-multiplexed duty cycle adjustment: Clocking circuitry includes a first clock generator to generate a first clock signal and having a first duty cycle correction input, and a second clock generator to generate a second clock signal and having a second duty cycle correction input. Some embodiments have more than two clock generators. A multiplexer... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20090128209 - Pulse width modulation control circuit applied to charge output capacitor: A pulse width modulation (PWM) control circuit is applied to a power converter with a charging capacitor. The PWM control circuit includes a PWM signal generator, a first comparator, and a reference voltage modulator. A PWM signal generator generates a PWM signal to control a power switch in the power... Agent: North America Intellectual Property Corporation

20090128210 - Semiconductor integrated circuit and electronic circuit: An electric circuit has a first differential circuit for transmitting input data to a first node, a second differential circuit for holding the first node data, a first clock transmission circuit for flowing a first current in accordance with a clock signal, and a first transformer circuit for transformer-coupling the... Agent: Arent Fox LLP

20090128211 - Noise filter circuit, noise filtering method, thermal head driver, thermal head, electronic instrument, and printing system: A noise filter circuit includes a latch circuit that receives an input signal. The latch circuit includes first and second logic circuits (e.g., NAND circuits). The first and second NAND circuits are configured so that the capability of a P-type transistor that receives a set signal or a reset signal... Agent: Oliff & Berridge, PLC

20090128212 - Charge pump systems with adjustable frequency control: An electronic system includes a charge pump driver for generating an output to control an electronic element. The electronic system further includes a clock generator coupled to the charge pump driver. The clock generator can generate a clock signal to control the charge pump driver and adjust a frequency of... Agent: Patent Prosecution O2mirco , Inc.

20090128213 - Integrated circuit clock structure: An integrated circuit includes first and second circuits, and a clock structure. The clock structure consists of a crystal oscillation circuit, a plurality of buffers, and a plurality of clock generating modules. An input of each of the plurality of buffers is coupled to receive a reference clock signal from... Agent: Garlick Harrison & Markison

20090128214 - Data receiver of semiconductor integrated circuit: A data receiver includes a plurality of amplifiers for receiving data in response to clock signals having a predetermined phase difference, and amplifying the received data by performing an equalization function based on feedback data, thereby outputting amplification signals, and a plurality of latches for latching output of the amplifiers,... Agent: Baker & Mckenzie LLP Patent Department

20090128215 - Level shifter, interface driving circuit and image displaying system: The present invention relates to a level shifter for receiving a control signal to produce a driving voltage, comprising: a storage capacitor, one end of the storage capacitor coupled to the control signal and a reference voltage, another end of the storage capacitor coupled to the driving voltage and a... Agent: Venable LLP

20090128216 - System and method for time-to-voltage conversion with lock-out logic: An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the... Agent: General Electric Company Global Research

20090128217 - Switching circuit: The application provides a switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the input node to the output node in response to a switching signal. A sensor is provided for sensing the voltage between the input... Agent: Wolf Greenfield & Sacks, P.C.

20090128218 - Method and apparatus for controlling device by detecting scr thereof: A method and apparatus for controlling a device by detecting a silicon controlled rectifier (SCR) thereof, as well as a method and apparatus of automatic transfer switch controller thereof are disclosed. In one embodiment, the apparatus includes an input configured to receive input power, an output configured to provide said... Agent: Knobbe Martens Olson & Bear LLP

20090128220 - Isolation circuit: An isolation circuit is provided. The isolation circuit is coupled between a master circuit and a slave circuit for isolating or conducting an inter integrated circuit (I2C) signal. While the master circuit has electricity and the slave circuit does not, the isolation circuit isolates the master circuit to prevent the... Agent: J C Patents, Inc.

20090128221 - Metal-insulator-metal (mim) switching devices: A gated nano-electro-mechanical (NEM) switch employing metal-insulator-metal (MIM) technology and related devices and methods which can facilitate implementation of low-power, radiation-hardened, high-temperature electronic devices and circuits. In one example embodiment a gate electrode is configured as a cantilever beam whose free end is coupled to a MIM stack. The stack... Agent: John P. O'banion O'banion & Ritchey LLP

20090128219 - Semiconductor device, power supply device, and information processing device: A semiconductor device (100) includes a MOS transistor (10) having a back gate region “a”, a first region “b” serving as one of a source region and a drain region, and a second region “c” serving as the other of the source region and the drain region. The semiconductor device... Agent: Fish & Richardson P.C.

20090128222 - Apparatus and method for adjusting working frequency of vrd by detecting temperature: The invention provides an apparatus for adjusting a working frequency of a VRD by detecting temperature. The apparatus includes a temperature control module, a load module and a controller. The temperature control module is used for detecting a temperature of a CPU, and judging an output load state of the... Agent: J C Patents, Inc.

20090128223 - Thermally stable semiconductor power device: A semiconductor power device includes a circuit to provide a gate signal wherein the gate signal has a negative temperature coefficient of gate driving voltage for decreasing a gate driving voltage with an increase temperature whereby the semiconductor power device has a net Ids temperature coefficient that is less than... Agent: Bo-in Lin

20090128224 - Semiconductor device: A semiconductor device includes a light-receiving element which is connected to a negative power supply and generates conductive carriers by receiving light, an amplifier transistor which is a depletion transistor and amplifies an electrical signal obtained by the conductive carriers, and a transfer gate transistor which is a depletion transistor... Agent: Amin, Turocy & Calvin, LLP

20090128226 - Fuse option circuit: A fuse option circuit including a fuse, a control switch, a latch, and a logical operational controller is provided. The latch stores a selected level. The logical operational controller outputs a selected result signal and feedbacks a control signal to the control switch. The level of the control signal determines... Agent: Attn: Jonathan O. Owens Haverstock & Owens LLP

20090128225 - Structure of an apparatus for programming an electronically programmable semiconductor fuse: A design structure for an apparatus for programming an electronically programmable semiconductor fuse. The apparatus applies a programming current to a fuse link as a series of multiple pulses. Application of the programming current as a series of multiple short pulses provides a level of programming current sufficiently high to... Agent: International Business Machines Corporation Dept. 18g

20090128227 - High voltage generating device of semiconductor device: A high voltage generator of a semiconductor device includes a first high voltage pump unit, a second high voltage pump unit, and a clock signal generating unit. The first high voltage pump unit compares a first high voltage and a first reference voltage to generate a first enable signal, and... Agent: Townsend And Townsend And Crew, LLP

20090128228 - Charge pump capable of enhancing power efficiency and output voltage: The present invention relates to a charge pump capable of enhancing power efficiency and output voltage, which comprises a pump capacitor, a switching module, a first switch, a first buffer, a first switch, and an output capacitor. The switching module is coupled to a first terminal of the pump capacitor.... Agent: Sinorica, LLC

20090128230 - Band-gap reference voltage generator for low-voltage operation and high precision: Provided is a band-gap reference voltage generator for low-voltage operation and high precision. The band-gap reference voltage generator minimizes voltage drop by connecting resistors in parallel to bipolar transistors, and cancels temperature dependence by properly adjusting a resistor of an output stage, so that it can provide a stable reference... Agent: Ampacc Law Group

20090128229 - Multi-chip package semiconductor device: An efficient logic chip operating power supply having digital circuits in a multi-chip package is provided. A multi-chip package semiconductor device fabricated in common with a driver chip having analog circuits and a logic chip having digital circuits, a logic chip power supply circuit is provided in which a driver... Agent: Cantor Colburn, LLP

20090128231 - Circuits for generating reference current and bias voltages, and bias circuit using the same: A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation... Agent: Mills & Onello LLP

20090121746 - Fractional-n frequency synthesizer: A circuit, with applications to phase-locked loops and frequency synthesis, where a divider circuit shuffles between dividing the output of a voltage-controlled oscillator by N or N+1, where N is an integer, and where a phase frequency detector provides three logic signals to a charge pump so that one of... Agent: Schwegman, Lundberg & Woessner, P.A.

20090121747 - Maintaining circuit delay characteristics during power management mode: A system and method for maintaining circuit delay characteristics during power management mode. The method for maintaining circuit delay characteristics during power management mode continually toggles the clock distribution circuits at a frequency sufficiently low that it does not significantly impact chip power dissipation. The clock frequency used to toggle... Agent: Hamilton & Terrile, LLP IBM Austin

20090121748 - Waveform generator and plasma display device using the same: A waveform generator capable of generating a square wave and a ramp wave using one switching element is provided. A waveform generator includes a first transistor having a drain electrode, a gate electrode, and a source electrode. A first resistor and a first diode are coupled at a common node... Agent: Christie, Parker & Hale, LLP

20090121749 - Generation of an analog gaussian noise signal having predetermined characteristics: The present invention relates to a method and system for providing an analog Gaussian noise signal having the predetermined probability distribution function, bandwidth and center frequency. A band-limited digital noise signal indicative of a Gaussian noise signal having a predetermined Gaussian probability distribution function is ΣΔ modulated generating a pulse-density... Agent: Freedman & Associates

20090121750 - Constant current drive device: An object of the present invention is to eliminate fluctuation in the value of the constant current I even if there is characteristic fluctuation in field effect transistors and at the same time, to improve the power consumption. There are provided with a plurality of current mirror circuits consisting of... Agent: Rader Fishman & Grauer PLLC

20090121751 - Write driver circuit: A write driver circuit comprising a first transistor comprising a first source/drain terminal coupled to a first output, a second source/drain terminal coupled with a first reference potential, and a gate terminal; a second transistor comprising a first source/drain terminal coupled to a second output, a second source/drain terminal coupled... Agent: Banner & Witcoff, Ltd. Attorneys For Client 007052

20090121752 - Source follower: A source follower includes first through third switches, first and second transistors, and a first capacitor. The first switch is used to determine whether or not to couple the source of the first transistor with an input signal. The second switch is used to determine whether or not to couple... Agent: Jianq Chyun Intellectual Property Office

20090121754 - Power-on reset circuit: An integrated circuit provides a power on reset signal with respect to a supply voltage level supplying the electronic device. The integrated circuit comprises a bias current generating stage having a first current mirror and an output stage having first, second and third series connected MOS transistors. A connection between... Agent: Texas Instruments Incorporated

20090121753 - Protective circuit for microprocessor: A protective circuit for microprocessor comprises an input terminal, a bias circuit, a reset circuit, and an output terminal, wherein the bias circuit coupled to the input terminal is configured to receive an input signal and generate a bias signal. The reset circuit coupled to the bias circuit is configured... Agent: Quintero Law Office, PC

20090121755 - Semiconductor chip and semiconductor device including the same: A semiconductor chip includes a plurality of pads; input/output circuits connected with the plurality of pads, respectively; a product data storage section configured to store a product data; and a setting section configured to set to an active state, each of the input circuits which is connected to one of... Agent: Young & Thompson

20090121756 - Pseudo-synchronous small register designs with very low power consumption and methods to implement: Methods and apparatus for implementing and operating one or more pseudo-synchronous registers with reduced power consumption, and reduced complexity for transferring data between clock domains. Various embodiments of the present invention replace conventional continuous clocking schemes with a strobe signal that is only generated when a data transfer operation with... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090121757 - Data center tracking circuit and semiconductor integrated circuit including the same: A data center tracking circuit includes a clock tree, a sensing block, and a delay compensation block. The clock tree includes a plurality of clock buffers connected in series, buffers a clock, and outputs an output signal. The sensing block senses the phase change of the output signal on the... Agent: Baker & Mckenzie LLP Patent Department

20090121758 - Chipsets and clock generation methods thereof: Chipsets capable of preventing malfunction caused by feedback clock distortion are provided, in which a phase frequency detector generates a control voltage according to a first reference clock and a first feedback clock, a voltage-controlled oscillator generates an output clock according to the control voltage, a frequency divider performs a... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090121760 - Charge pump for pll/dll: A charge pump for use in a Phase Locked Loop/Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage.... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20090121759 - Fast-switching low-noise charge pump: In one embodiment of the invention, a method for a charge pump is disclosed. The method includes biasing a plurality of transistors; switching a pair of main transistor switches to apply or remove a net charge on an output terminal though the biased transistors; and turning on auxiliary transistor switches... Agent: Qualcomm Incorporated

20090121761 - Intra-pair differential skew compensation method and apparatus for high-speed cable data transmission systems: A differential serial communication receiver circuit automatically compensates for intrapair skew between received differential signals on a serial differential communication link, with deterministic skew adjustment set during a receiver training period. Intrapair skew refers to the skew within a pair of differential signals, and is hence interchangeable with the term... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.C.

20090121762 - Timebase variation compensation in a measurement instrument: Timebase variation compensation in a measurement instrument is achieved by simultaneously acquiring both a signal under test and a reference signal. The reference signal is derived from a source that has very stable timing with respect to the timebase. Timing variations are measured from the acquired signals. Timing variations detected... Agent: Thomas F. Lenihan Tektronix, Inc.

20090121763 - Adjustable duty cycle circuit: Techniques are disclosed for adjusting and programming the duty cycle of a signal generated by a circuit. In an embodiment, parallel transistors are coupled between a NAND gate and a supply voltage. Selectively enabling the parallel transistors adjusts the switching point of the NAND gate, thereby allowing control of the... Agent: Qualcomm Incorporated

20090121764 - Semiconductor device: A semiconductor device has a first latch circuit, a second latch circuit configured to receive an output of the first latch circuit, a first switching element provided between the first latch circuit and the second latch circuit, a feedback line for feeding data held by the second latch circuit to... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090121765 - Latch circuit and flip-flop circuit: A latch circuit includes: first nodes which are three or more and to which a voltage in a first signal level is set; second nodes which are three or more and to which a voltage in a second signal level obtained by inverting the first signal level is set; and... Agent: Young & Thompson

20090121766 - Externally asynchronous internally clocked system: An Externally Asynchronous-Internally Clocked (EAIC) system that generates an internal clock signal includes a clock signal control block. The clock signal control block includes a pull-up unit that is activated in response to an input signal used to generate an internal clock signal; a pull-down unit that is activated in... Agent: Baker & Mckenzie LLP Patent Department

20090121767 - Signal processing apparatus: The real number counter subtracts the positive integer C if the count value RC is equal to or larger than 0, or adds (the positive integer B-C) and outputs a Carry if the count value RC is negative. The first integer counter for generating the first clock f1 calculates (the... Agent: Sughrue Mion, PLLC

20090121768 - Semiconductor device and operation method thereof: Semiconductor device and operation method thereof includes an aspect of the present invention, there is provided a clock generator configured to receive an external clock signal to generate a first clock signal corresponding to a rising edge of the external clock and a second clock signal corresponding to a falling... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090121769 - Offset compensation circuit and yaw rate sensor equipped therewith: An offset compensation circuit for a yaw rate sensor, having a subtracter, which is provided for subtracting a correction value from an input signal, the correction value being obtainable by dividing each of n measurements of the input signal by the constant n and subsequently integrating a number of n... Agent: Kenyon & Kenyon LLP

20090121770 - Method for clamping a semiconductor region at or near ground: A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is... Agent: Townsend And Townsend And Crew, LLP

20090121771 - Level shift circuit and method thereof: A level shift circuit comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a level shifter and an equalization unit. The first and second input terminals receive an input signal and an inverted input signal respectively. The first and second output terminals... Agent: J C Patents, Inc.

20090121772 - Multiplier circuit: Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second... Agent: Foley And Lardner LLP Suite 500

20090121773 - Sampling circuit: s

20090121774 - Monolithic integrated circuit and use of a semiconductor switch: A monolithic integrated circuit is provided that includes a semiconductor switch, a constant current source, a capacitor, and a load circuit, which has a load capacitance. An output of the semiconductor switch is connected to the load circuit to turn on and off a supply voltage of the load circuit.... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090121775 - Transistor and method for operating the same: In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact... Agent: Mcdermott Will & Emery LLP

20090121776 - Bus switch and electronic switch: A bus switch for connecting and disconnecting a bus connection provided by a pair of buses includes a first switching element and a second switching element. The first switching element is coupled between an input terminal and an output terminal of a high-potential side bus of the pair of buses.... Agent: Posz Law Group, PLC

20090121777 - Semiconductor device, semiconductor device manufacturing method, power control device, and electronic equipment and module: A semiconductor device of the invention for miniaturizing and cost reduction includes: a solid-state relay 30 having a first light emitting element 10, a light triggered element 16 for receiving light from the first light emitting element 10, and translucent resin 23 for sealing the first light emitting element 10... Agent: Birch Stewart Kolasch & Birch

20090121778 - Anti-shock methods for processing capacitive sensor signals: A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored.... Agent: Lee & Hayes, PLLC

20090121779 - Method and apparatus for controlling a circuit with a high voltage sense device: A control circuit with a high voltage sense device. In one embodiment, a circuit includes a first transistor disposed in a first substrate having first, second and third terminals. A first terminal of the first transistor is coupled to an external voltage. A voltage provided at a third terminal of... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090121781 - Control circuit and control method for charge pump circuit: A charge pump circuit includes a first switch to a fourth switch, a flying capacitor, and an output capacitor. A driver turns on the first switch and the fourth switch during a predetermined precharge period from the start of activation of the charge pump circuit to charge the output capacitor.... Agent: Cantor Colburn, LLP

20090121782 - Control circuit and control method for charge pump circuit: A pulse frequency modulator generates a pulse signal having a fixed duty ratio and a frequency which is adjusted such that a feedback voltage corresponding to the output voltage of a charge pump circuit is coincident with a predetermined first reference voltage. A driver, on receiving the pulse signal, turns... Agent: Cantor Colburn, LLP

20090121780 - Multiple-stage charge pump with charge recycle circuit: A multiple-stage charge pump circuit comprises first and second pump capacitors, first and second transfer circuits, first and second driving circuits, and a charge recycle circuit. The first pump capacitor, the first transfer circuit, and the first driving circuit form a first stage circuit and the second pump capacitor, the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090121783 - Voltage level generating device: The present invention discloses a voltage level generating device. The voltage level generating device includes: a reference voltage generating module, a first circuit module, a second circuit module, and a switch module. The voltage level generating device disclosed in the present invention only requires a buffer, a voltage regulator, and... Agent: North America Intellectual Property Corporation

20090121784 - Power-down mode control apparatus and dll circuit having the same: A power-down mode control apparatus includes an internal power-down control block configured to receive a locking completion signal and to generate an internal power-down signal, which is toggled for a predetermined time; a noise check block configured to check occurrence/non-occurrence of noise on the basis of a phase detection signal... Agent: Baker & Mckenzie LLP Patent Department

20090121785 - Device and method for reducing input noise: A device and a method for reducing input noise providing at least a microcontroller. The microcontroller comprises: at least a noise reduction device, at least an analog switch and at least a signal output unit. The noise reduction device connected to the ground or a voltage is turned on to... Agent: Wpat, PC

20090121786 - Semiconductor integrated circuit: A semiconductor integrated circuit can include a first voltage pad, a second voltage pad, and a voltage stabilizing unit that is connected between the first voltage pad and the second voltage pad. The first voltage pad can be connected to a first internal circuit, and the second voltage pad can... Agent: Baker & Mckenzie LLP Patent Department

20090115459 - Semiconductor device and operation method thereof: A semiconductor device includes a pulse signal generating unit for generating a plurality of pulse signals each of which has a different pulse width from each other, a signal multiplexing unit for outputting one of the plurality of the pulse signals as an enable signal in response to an operating... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090115460 - Voltage level clamping circuit and comparator module: A voltage level clamping circuit which can be implemented in an integrated circuit (IC) and a high-speed comparator module, wherein the IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module coupled between the first... Agent: North America Intellectual Property Corporation

20090115461 - Current converting method, transconductance amplifier and filter circuit using the same: The present invention is intended to achieve a transconductance amplifier and a voltage/current converting method which can provide a sufficient amplitude and a high degree of design freedom. The method comprises the steps of converting a first voltage signal to a first current signal; converting a second voltage signal to... Agent: Sughrue Mion, PLLC

20090115463 - Buffer circuit: A buffer circuit is provided, having an odd number of stages of inverting amplifiers, wherein the stages are capacitive coupled. A negative feedback path feeds back from an output terminal of the final stage of the inverting amplifiers to an input terminal of the initial stage. A reference current source... Agent: Liu & Liu

20090115464 - Multiple-branching configuration for output driver to achieve fast settling time: A multiple branching configuration for output driver which achieves a fast settling time is provided. The multiple branching configuration comprises breaking down a typical output buffer stage into multiple branches; and utilizing multiple unit area sized transistors connected in parallel.... Agent: Greenblum & Bernstein, P.L.C

20090115462 - Driver circuit with emi immunity: A driver circuit suitable for outputting a signal onto an output line affected by conducted EMI, has a slope control circuit and an output circuit, (op-amp, Mo, M13 to M21). It can be used for driving a LIN network. The slope control circuit outputs a slope controlled version of the... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090115465 - Low power, high slew rate ccd driver: A low power, high slew rate output driver circuit system is provided. The Circuit system comprises a cascade of two high-speed stages and a variable current biasing block. The combination of these two elements enables the realization of a high slew rate, yet low power output driver system.... Agent: Greenblum & Bernstein, P.L.C

20090115466 - Semiconductor apparatus and radio circuit apparatus using the same: A semiconductor apparatus includes a signal source 7 that outputs a signal of predetermined frequency, a frequency divider 15 that receives the output signal of the signal source and is capable of switching the output signal to two or more frequency division ratios, a delta-sigma modulator 16 that controls the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090115467 - Semiconductor device and operation method thereof: A semiconductor memory device can optimize the layout area and current consumption based on multi-phase clock signals which are generated by dividing a source clock signal using a reset signal without a delay locked loop and a phase locked loop in order to have various phase information of low frequencies... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090115468 - Integrated circuit and method for operating an integrated circuit: An integrated circuit, comprising a first data retention element configured to retain the data, the first data retention element having a first setup time, and a second data retention element configured to retain the data, the second data retention element having a second setup time, the second data retention element... Agent: Banner & Witcoff, Ltd. Attorneys For Client 007052

20090115469 - Variability-aware scheme for asynchronous circuit initialization: A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing... Agent: Stattler-suh PC

20090115470 - Memory reset apparatus: A memory reset apparatus including a first inverse circuit, a logic circuit, and a plurality of second inverse circuits is provided. The first inverse circuit receives a control signal generated by a north bridge and generates a first signal, in which the control signal controls reset of a plurality of... Agent: J C Patents, Inc.

20090115471 - Delay locked loop and operating method thereof: A delay locked loop (DLL) includes a delay-locking unit configured to generate first and second delay clocks corresponding to first and second clock edges of a reference clock for achieving a delay-locking; a phase detection unit configured to detect a phase difference between the first and second delay clocks to... Agent: Mannava & Kang, P.C.

20090115472 - Multiple reference phase locked loop: A multi reference phase locked loop (MPLL) generates a high speed clock frequency and phase locks it to a lowest common reference frequency derived from a selected one of at least two reference clocks. One of the reference clocks is a system reference clock in a FBDIMM system, another may... Agent: Victoria Donnelly

20090115473 - Loop filter, phase-locked loop, and method of operating the loop filter: A loop filter capable of controlling a charge sharing point in time, a phase locked loop, and a method of operating the loop filter are provided. The loop filter includes a duty control unit and a variable capacitor unit. The duty control unit generates a duty control clock signal of... Agent: Myers Bigel Sibley & Sajovec

20090115474 - Clock synchronization circuit and clock synchronization method: A clock synchronization circuit and a clock synchronization method which generate an internal clock synchronized to an external clock is presented. The circuit and method include a clock enable control circuit generating a clock enable control signal controlled by a power supply voltage and a power-down signal. The circuit and... Agent: Ladas & Parry LLP

20090115475 - Semiconductor device and operating method thereof: A delay locked loop (DLL) of a semiconductor device has a relatively small area and low current consumption while having a function of correcting a duty ratio. The semiconductor device includes a split unit configured to receive and split a reference clock to output a first clock corresponding to a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090115477 - Circuit device and related method for mitigating emi: In order to mitigate electromagnetic interference (EMI), the present invention provides a circuit device for an electronic device including a signal generating unit, a phase adjusting unit and an output interface. The signal generating unit generates a plurality of in-phase signals. The phase adjusting unit is coupled to the signal... Agent: North America Intellectual Property Corporation

20090115478 - Data output controller: Disclosed is a data output controller that includes an enable signal controller, which generates a control signal having a predetermined pulse width in response to a DQ off signal and a write signal and generates a clock enable signal in response to a read signal and the control signal in... Agent: Cooper & Dunham, LLP

20090115479 - Methods and apparatus for synchronizing with a clock signal: Clock synchronization and skew adjustment circuits that utilize differing unit delay elements in their delay lines in either a graduated or a stepped unit time delay arrangement are for synchronizing with a clock signal. These graduated or a stepped unit time delays allow reduction in the number of the fine... Agent: Leffert Jay & Polglaze, P.A. Attn: Andrew C. Walseth

20090115476 - Programmable high-resolution phase delay: A programmable delay lock loop system provides a delayed output signal having a programmed delay from an input signal. A phase detector provides a phase delay signal indicative of an actual phase difference between the input signal and the delayed output signal. An accumulator provides a delay command signal as... Agent: Duke W. Yee

20090115480 - Clock control circuit and data alignment circuit including the same: A clock control circuit can prevent a malfunction that occurs when a rising strobe signal and a falling strobe signal change in pulse width and thus overlap each other. The clock control circuit which includes a first clock control unit configured to receive a rising strobe signal and a falling... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090115481 - Pulse operated flip-flop circuit having test-input function and associated method: The pulse generation circuit generates a first pulse signal and a complementary second pulse signal. The first and second pulse signals are activated simultaneously in a normal mode and activated selectively in response to a test input signal in a test mode. A multiplexing input circuit selects and outputs one... Agent: F. Chau & Associates, LLC

20090115482 - Storage elements using nanotube switching elements: Data storage circuits and components of such circuits constructed using nanotube switching elements. The storage circuits may be stand-alone devices or cells incorporated into other devices or circuits. The data storage circuits include or can be used in latches, master-slave flip-flops, digital logic circuits, memory devices and other circuits. In... Agent: Wilmerhale/boston

20090115483 - Phase jump sequencer architecture: A method for controlling an output phase of a phase interpolator, by forming an M bit control word, designating N bits of the control word as a fractional number portion, designating M-N bits of the control word as a whole number portion, adjusting a phase jump of the phase interpolator... Agent: Lsi Corporation

20090115484 - Digitally controlled delay element: Techniques and corresponding circuits for achieving programmable delay with linear resolution are provided. The techniques provide for incremental delay with substantially equal increments. Linear resolution may be achieved through the use of a circuit arrangement that allows current to be controlled to linearly vary effective resistance of a delay circuit,... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090115485 - Circuit and method for recovering clock data in highly integrated semiconductor memory apparatus: Circuit and method for recovering clock data in highly integrated semiconductor memory apparatus includes a plurality of signal receiving units configured to receive signals through a plurality of input/output pads and transfer the signals according to a receiving reference clock, the signal receiving units being divided into groups, a plurality... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090115486 - Apparatus and method for generating multi-phase clocks: An apparatus for generating multi-phase clocks in accordance with the present invention includes a clock delay configured to delay a source clock by a delay time corresponding to a control signal to generate a plurality of clocks; a clock multiplexer configured to output a first clock for a first locking... Agent: Mcdermott Will & Emery LLP

20090115487 - Level converter: A level converter for providing an output signal at a circuit output based on an input signal includes an output coupling circuit formed to provide an output signal based on a first partial output signal and a second partial output signal, a driver circuit formed to provide the second partial... Agent: Slater & Matsil LLP

20090115488 - Variability-aware asynchronous scheme based on two-phase protocols using a gated latch enable scheme: A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing... Agent: Stattler-suh PC

20090115489 - Switch arrangement, integrated circuit, activation system: A switch arrangement for providing a drive signal at an output comprises a drive switch coupled to the output of the switch arrangement and a regulating element coupled in series between the drive switch and a power supply input of the switch arrangement. The drive switch is operable to provide... Agent: Freescale Semiconductor, Inc. Law Department

20090115490 - Optical semiconductor relay device: A transient voltage occurring between output terminals during ON/OFF operation is reduced. There are provided a pair of input terminals IN1 and IN2, a pair of output terminals OUT1 and OUT2, MOSFETs N1 and N2 connected between the output terminals, and a drive circuit 10 connected between the input terminals... Agent: Sughrue Mion, PLLC

20090115491 - Prediction strategy for thermal management and protection of power electronic hardware: A hybrid powertrain system includes an engine, an electric machine, a power electronics device including a plurality of electric circuit layers, and a cooling system. A method for managing thermal energy in the power electronics device includes monitoring a plurality of temperature sensors in the power electronics device, monitoring electric... Agent: Cichosz & Cichosz, PLLC

20090115493 - Electric fuse determination circuit and determination method: An electrical fuse determination circuit that can speedily and reliably incorporate an electrical fuse data and improve a reliability of electrical fuse device, includes a first electrical fuse device of which one end connects with a higher voltage, a second electrical fuse device of which one end connects with a... Agent: Mcginn Intellectual Property Law Group, PLLC

20090115492 - Fuse-fetching circuit and method for using the same: A fuse-fetching circuit comprises a plurality of fuses, a plurality of first switches and a shift register. Each of the first switches includes a first data end, a second data end and a control end. The first data end is connected to the fuse, and the control end is controlled... Agent: Connolly Bove Lodge & Hutz LLP

20090115494 - Charge pump warm-up current reduction: A charge pump circuit includes a voltage controlled oscillator. The voltage controlled oscillator operates at a lower frequency during a warm-up mode, and operates at a higher frequency during a loading mode. The lower frequency operation during the warm-up mode reduces power supply current requirements.... Agent: Lemoine Patent Services, PLLC

20090115498 - Cooperative charge pump circuit and method: A multiple polarity reversible charge pump circuit is disclosed which, in certain embodiments, may be configured to generate a positive voltage at times and may be reversed to generate a negative voltage at other times. Such a charge pump circuit is advantageous if both the positive and negative voltage are... Agent: Zagorin O'brien Graham LLP (023)

20090115495 - Drive circuit, voltage conversion device and audio system: The first control transistor is connected between a first input node for receiving a first input signal swinging between a first voltage and a second voltage and an intermediate node for outputting an output signal, and receives the second voltage at its gate. The second control transistor is connected between... Agent: Mcdermott Will & Emery LLP

20090115497 - Power source circuit: A power source circuit that outputs a designated voltage through an output terminal thereof, comprising: a step-up circuit that steps up a voltage fed from a power supply and applies the resultant voltage to the output terminal; a voltage sensing circuit that senses a voltage outputted from the step-up circuit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090115496 - Vpp voltage generator for generating stable vpp voltage: The present invention relates to a VPP voltage generator that generates a stable VPP voltage. The VPP voltage generator of the present invention generates a stable VPP voltage. Therefore, power consumption can be saved, a precharge time of word line can be prevented from increasing and a tRCD characteristic can... Agent: Lowe Hauptman Ham & Berner, LLP

20090115499 - Capacitance coupling effect compensating method and apparatus implemented with the method: An electronic apparatus implemented with capacitance coupling effect compensating capability is disclosed. The apparatus includes a first substrate, a common electrode, a second substrate, a coupling catch structure and a compensating circuit. The common electrode is disposed on the first substrate. The coupling catch structure is disposed on the second... Agent: Nixon Peabody LLP

20090115501 - Power consumption reduction of a power supply: A power supply includes a first switch to establish a first path to charge an output of the power supply by a voltage source, a second switch to establish a second path to discharge the output, and a third switch connected between the output and a capacitor. When to discharge... Agent: Rosenberg, Klein & Lee

20090115500 - Voltage generating circuit: A voltage generating circuit for outputting a voltage from an output terminal, has a first voltage dividing circuit which is connected between the output terminal and ground; a switch circuit connected between the output terminal and the first voltage dividing circuit; a first voltage detecting circuit which outputs a first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090115502 - Reference current circuit, reference voltage circuit, and startup circuit: A current mirror circuit 10 is formed to have a current ratio (a transistor size ratio) of 1:m. As well, respective pairs of nMOS transistors MN1, MN3 and nMOS transistors MN2, MN4 are formed to have a current ratio of 1:m. Two currents output from the current mirror circuit 10... Agent: Mcdermott Will & Emery LLP

20090115503 - Variability-aware scheme for high-performance asynchronous circuit voltage reglulation: A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing... Agent: Stattler-suh PC

20090115504 - Circuit design methodology to reduce leakage power: A three stage circuit according to the invention comprises a data input, a data output, a control input, two voltage supply inputs. The first stage is electrically connected to the data input and control input and is defined by a combinatorial circuitry with two outputs. The second stage is defined... Agent: International Business Machines Corporation Dept. 18g

20090115505 - Semiconductor device with controllable decoupling capacitor: Semiconductor device with a controllable decoupling capacitor includes a decoupling capacitor connected between a power voltage terminal and a ground terminal and a switching unit configured to enable/disable the decoupling capacitor in response to a control signal. According to another aspect, a semiconductor device with a controllable decoupling capacitor includes... Agent: Mannava & Kang, P.C.

20090115506 - Interface device and information processing system: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating... Agent: Mcdermott Will & Emery LLP