Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 02/09

20090051391 - Adjustable input receiver for low power high speed interface: A pseudo-differential input receiver is disclosed which is configured to support a wide-range of reference voltage Vref and a wide-range frequency interface with no parallel termination are described herein. The pseudo-differential receiver implementations described herein are very efficient in terms of area, power, and performance. A wide-frequency-range Vref-adjustable input receiver... Agent: Qualcomm Incorporated

20090051392 - Circuit device and electronic equipment provided with the same: In one embodiment, a circuit device that performs a certain processing operation with respect to an input signal by referring to a reference voltage and outputs the result is caused to have a function of switching the reference voltage, whereby a circuit device from which a stable output can be... Agent: Harness, Dickey & Pierce, P.L.C

20090051393 - Low side driver: An output driver circuit has an input, an output node, and first and second transistors coupled in series between the output node and a first source of operating potential. Parasitic diodes of the first and second transistors are anti-serially coupled. The output driver circuit has first and second control circuits... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20090051394 - Frequency multipliers using multi-phase oscillation: A method of generating an output signal from an input signal includes a step of generating a set of n signals, n being an integer greater than or equal to 3, by generating a signal for each integer i such that 0≦i≦(n−1), each signal within the set having the same... Agent: Ryan, Mason & Lewis, LLP

20090051395 - Dc/dc converter with spread spectrum switching signals: A DC/DC converter includes a converting circuit for converting a first voltage into a second voltage; a controller for generating spread spectrum switching signals; and a switch according to the spread spectrum switching signals controlling the on/off state of the switch.... Agent: North America Intellectual Property Corporation

20090051396 - Ring oscillation circuit, delay time measuring circuit, testing circuit, clock generating circuit, image sensor, pulse generating circuit, semiconductor integrated circuit, and testing method thereof: A ring oscillation circuit, which can operate the ring oscillation due to a positive feedback stably and continuously, is provided and it is applied to an accurate measurement of delay time and a measurement of timing accuracy in a jitter of a clock signal or the like with a high... Agent: Harness, Dickey & Pierce, P.L.C

20090051397 - Clock pulse generating circuit: A clock pulse generating circuit includes a pulse generator, a clock regulator, and a pre-driver. The pulse generator is configured to vary pulse widths of a rising clock signal and a falling clock signal. The clock regulator is configured to regulate output signals of the pulse generator to prevent an... Agent: Cooper & Dunham, LLP

20090051398 - Method and delay circuit with accurately controlled duty cycle: A delay locked loop includes a storage element coupled to a data bus and produces a data synchronization signal. A phase detector receives a data clock signal and the data synchronization signal and produces a delay control signal. A first delay circuit produces a signal which is delayed relative to... Agent: Texas Instruments Incorporated

20090051399 - Electronic circuit with low noise delay circuit: An electronic circuit comprises a delay circuit that with a chain of saw tooth delay stages (10a-d), coupled in a loop to form an oscillator for example. Each stage comprises an integrating circuit (104) and a current modulator (106) coupled to the integrating circuit (104). Each stage triggers a transition... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090051400 - System and method for fully digital clock divider with non-integer divisor support: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a... Agent: Mcandrews Held & Malloy, Ltd

20090051401 - Calibration circuit for an adjustable capacitance: A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps. The calibration circuit... Agent: Seed Intellectual Property Law Group PLLC

20090051402 - Multi-function circuit module having voltage level shifting function and data latching function: The present invention discloses a multi-function circuit module having voltage level shifting function and data latching function via switching a plurality of switch elements. The multi-function circuit module includes a first circuit module, a fourth switch element, and a fifth switch module, wherein the first circuit module further includes a... Agent: North America Intellectual Property Corporation

20090051403 - Signal process circuit, level-shifter, display panel driver circuit, display device, and signal processing method: In one embodiment of the present invention, a signal process circuit in accordance with the present invention includes: a first input terminal via which an input signal is supplied; a second input terminal via which a predetermined signal is supplied; a cross-coupled inverter circuit, including first and second CMOS inverter... Agent: Harness, Dickey & Pierce, P.L.C

20090051404 - Interface circuit and integrated circuit apparatus including the circuit: An interface circuit provided with a first input/output unit and a second input/output unit which respectively access external apparatuses to which electric power is supplied from power sources via different electric power supply lines includes an acquisition unit configured to acquire information whether electric power is supplied to the respective... Agent: Canon U.s.a. Inc. Intellectual Property Division

20090051405 - Adaptive capacitance for transistor: A circuit includes a transistor having a source, drain, a gate, and an electrode structure. A source terminal is coupled to the source. A drain terminal coupled to the drain. Terminals are coupled to the gate and to the electrode structure. A switch is coupled to the source, the gate... Agent: Schwegman, Lundberg & Woessner / Infineon

20090051406 - Semiconductor device: A semiconductor device whose operational state is switched between a test state and a normal operational state according to a logical value of a signal input from the outside is provided. The semiconductor device includes a first power line, a second power line, a switch that is controlled by a... Agent: Arent Fox LLP

20090051407 - Switch circuit: A switch circuit is disclosed. The switch circuit comprises: a hysteresis buffer, an electric switch, a first discharge resistor, a second discharge resistor, a capacitor, a feedback resistor, a first reciprocal switch, and a second reciprocal switch. When the second reciprocal switch is turned on, a power supply voltage charges... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090051408 - Switch for vehicles: Provided is a switch for vehicles, which includes an intermittent driving device connected to a control device which opens and closes a switching device based on the magnitude of the magnetism of a magnet mounted on an operating body. Therefore, the supply of power from a battery to a detection... Agent: Ratnerprestia

20090051409 - Switch for vehicles: Provided is a switch for vehicles, including a first switching device which performs the electrical connection/disconnection between a battery and a stop lamp and a second switching device connected to a control device which opens and closes the first switching device based on the magnitude of the magnetism of a... Agent: Ratnerprestia

20090051410 - Integrated powered device (pd) and physical layer (phy) chip: An integrated physical layer (PHY) and powered device (PD) chip for use in a Power over Ethernet (PoE) system is provided. Embodiments reduce circuit size and cost and enable improved and novel PoE applications. Embodiments include one or more of a PHY circuit, a PD controller circuit, a DC-DC converter... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090051412 - Integrated circut, and apparatus and method for production thereof: An integrated circuit includes a trimming signal creating section, disposed downstream of a trimming circuit in which a number of fuses are arranged in alignment, creating a trimming signal corresponding to the trimming value on the basis of a signal output from said trimming circuit and arranges blown object fuses... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090051411 - Trimmer circuit and method: A trimmer circuit is so configured that an electronic device will break down to produce a high current to trim a fuse. The electronic device is selectively configured to have a breakdown voltage lower than an applied voltage, for the trigger of its breakdown to be controllable. In an embodiment,... Agent: Rosenberg, Klein & Lee

20090051413 - Apparatus and method for increasing charge pump efficiency: A charge pump circuit is provided which includes at least two charge pump stages connected in series with a front charge pump stage having a first transistor for receiving an input voltage and a last charge pump stage having a second transistor for providing an output voltage. The first transistor... Agent: Haynes And Boone, LLPIPSection

20090051414 - Dual conversion rate voltage booster apparatus and method: An apparatus and method of boosting voltages. A boosting circuit includes a first and a second boosting circuit that each provide a boosted voltage in response to a set of control signals. The first and second boosting circuits receive different sets of control signals so that the boosted voltages may... Agent: Dickstein Shapiro LLP

20090051415 - Ripple current reduction circuit: A ripple current reduction circuit includes a supply node coupled to the output of a high ripple voltage source such as a charge pump. A first current mirror is referred to the supply node and mirrors a current I1 to a second node, the mirrored current (I3) including a ripple... Agent: Koppel, Patrick & Heybl

20090051416 - Apparatus, electronic component and method for generating reference voltage: An apparatus, includes a plurality of circuits each of which operates with a reference voltage, a constant current generator which generates a substantially constant current, and distributes the substantially constant current to each of the circuits, and a plurality of converters, each of the converters respectively corresponding to each of... Agent: Mcginn Intellectual Property Law Group, PLLC

20090051417 - Voltage supply insensitive bias circuits: A voltage-insensitive circuit includes a second circuit, and a biasing means for providing a constant bias current to the second circuit, the bias current being insensitive to power fluctuations of the voltage-insensitive circuit.... Agent: Kathy Manke Avago Technologies Limited

20090051418 - Distributed voltage regulator: An integrated circuit device and a method for providing distributed voltage regulation. The device includes a plurality of memory cell arrays and access circuitry dependent on one or more regulated voltages generated on the device and a plurality of pulsed digital distributed output units configured to generate the one or... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090051419 - Internal voltage compensation circuit: An internal voltage compensation circuit is provided which includes a power up signal generator configured to generate a power up signal, a select signal generator configured to compare a level of a first external voltage with a level of a second external voltage to generate first and second select signals,... Agent: Cooper & Dunham, LLP

20090051420 - Intrinsic rc power distribution for noise filtering of analog supplies: Analog supply for an analog circuit and process for supplying an analog signal to an analog circuit. The analog supply includes a noise filter having a variable resistor, and a control device coupled to adjust the variable resistor. The control device is structured and arranged to set the resistance of... Agent: Greenblum & Bernstein, P.L.C

20090051422 - Filter device: Provided is a switched capacitor type filter device having a steep characteristic with a small number of taps. The filter device includes positive polarity selecting switches (1311 to 1354), negative polarity selecting switches (1411 to 1454), positive read-out switches (1711 to 1754), negative polarity read-out switches (1811 to 1854), and... Agent: Greenblum & Bernstein, P.L.C

20090051421 - Switched capacitor integration and summing circuits: A switched capacitor circuit employs a single operational amplifier to implement both an integrator and a summer. One input signal is routed to the input of the operational amplifier through (1) one or more integration branches, and (2) one or more first summing branches. A second input signal is routed... Agent: Qualcomm Incorporated

20090045848 - Phase-frequency detector with high jitter tolerance: A phase-frequency detection system and method for enhancing performance of the frequency detector in a phase-frequency detection system. Filtering of the frequency detector inputs makes operation of the frequency detector more robust in the presence of intersymbol interference within the incoming data signal and other non-ideal characteristics such as noise... Agent: National Semiconductor Corporation C/o Vedder Price Kaufman & Kammholz

20090045849 - Data bus sense amplifier circuit: A data bus sense amplifier circuit can include a first sense amplifier block configured to provide first amplified signals by sensing inputted signals, a second sense amplifier block configured to provide second amplified signals by sensing the first amplified signals, and a sense amplifier control unit configured to provide first... Agent: Baker & Mckenzie LLP Patent Department

20090045850 - Rtwo-based down converter: A multiphase mixer using a rotary traveling wave oscillator is disclosed. In addition to the oscillator, the mixer includes first and second mixer circuits. The rotary traveling wave oscillator generates a first set of N/2 phase and a second set of N/2 phases, where each phase has a frequency that... Agent: Ipxlaw Group LLP

20090045851 - Device for driving switching elements: A device for driving switching elements is provided with a potential detector 29 which provides drive circuit 30 with signals in response to differences among potentials at junctions 17 to 20 of first and third resistors 13, 15, third resistor 15 and first control MOS-FET 8, second and fourth resistors... Agent: Bachman & Lapointe, P.C.

20090045852 - Low voltage differential signalling driver with pre-emphasis: There is provided a LVDS driver arranged to receive an input signal which switches between two voltage levels. The driver comprises a pre-emphasis block (405) for generating a pre-emphasis signal having a first voltage level for a time period T1 after each switch of the input signal, and a second... Agent: Lee & Hayes, PLLC

20090045854 - Apparatus and method for controlling a master/slave system via master device synchronization: A method of operating a master/slave system includes the step of identifying a master receive data phase value to coordinate the transfer of data from a slave device without phase alignment circuitry to a master device with a universal phase aligner. Data is transferred from the slave device to the... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20090045853 - Timing controller, display apparatus having the same and method for driving the display apparatus: A timing controller, a display apparatus having the timing controller and a method for driving the display apparatus, the timing controller includes a control part, an inner clock and a control signal. The control part detects whether an external clock signal and image data received from an external image apparatus... Agent: Cantor Colburn, LLP

20090045855 - Apparatus for interfacing and testing a phase locked loop in a field programmable gate array: An apparatus for interfacing a phase locked loop in a field programmable gate array. The apparatus comprising a phase locked loop cluster. The phase locked loop further comprising a plurality of RT modules, a plurality of RO modules, at least one TY module, a plurality of receiver modules and at... Agent: Lewis And Roca LLP

20090045856 - Clock signal synchronizing device with inherent duty-cycle correction capability: One aspect relates to a clock signal synchronizing device, in particular to a delayed locked loop (DLL) with capability to correct static duty-cycle offset and to filter clock-jitter. One aspect relates to a clock signal synchronizing method with capability to correct static duty-cycle offset and to filter clock-jitter. In accordance... Agent: Dicke, Billig & Czaja

20090045857 - Delay locked loop circuit: A delay locked loop increases an operation margin of a delay locked loop by using an output clock having more advanced phase than a DLL output clock. A clock delay compensation block receives an external clock signal to thereby generate a first multi clock and a second multi clock. A... Agent: Mcdermott Will & Emery LLP

20090045858 - Delay locked loop circuit: A delay locked loop (DLL) circuit for a synchronous dynamic random access memory (SDRAM) is provided. If a locking state is broken due to an external change such as a change of tCK or power supply voltage, indicating that a delay of a delay replication modeling unit involved in a... Agent: Mcdermott Will & Emery LLP

20090045859 - Method and system for diagnostic imaging using a digital phase locked loop: A method and apparatus are provided for minimizing output pulse jitters in a phase locked loop. The method includes pre-setting the digital phase locked loop to a desired frequency, locking the digital phase locked loop to the desired frequency to generate an output signal, and filtering the output signal of... Agent: Dean D. Small The Small Patent Law Group LLP

20090045860 - Apparatus and method for two tier output stage for switching devices: A circuit for reducing EMI is provided. The circuit includes driver circuitry that drives a power switch, such as a power MOSFET. The power switch provides an output voltage. The circuit decreases the drive strength by which the power switch is driven during each output edge (i.e. when the output... Agent: National Semiconductor Corporation C/o Darby & Darby P.C.

20090045861 - System and method for effectively implementing an iq generator: A system and method for effectively implementing an IQ generator includes a master latch that generates an I signal and a slave latch that generates a Q signal. The master latch includes a master data circuit, a master latch circuit, and a master clock circuit. The slave latch includes a... Agent: Gregory J. Koerner Redwood Patent Law

20090045862 - Clock generating circuit of semiconductor memory apparatus: A clock generating circuit of a semiconductor memory apparatus includes a phase splitter that delays a clock to generate a delayed clock and inverts the clock to generate an inverted clock, and a clock buffer that buffers the delayed clock and the inverted clock and outputs a rising clock and... Agent: Baker & Mckenzie LLP Patent Department

20090045863 - System and method for removal of frequency-dependent timing distortion: A method of preparing a signal for measurement includes receiving the signal and selecting a first edge and a second edge within the signal. The method also includes delivering the first edge to a time interval measurement system after expiration of a first delay period and delivering the second edge... Agent: Steve Mccoy

20090045864 - Variable delay circuit and delay correction method: A variable delay circuit is provided which has a plurality of delay elements. The variable delay circuit comprises a delay time correction circuit for individually correcting a delay time on each of the plurality of delay elements to compensate for the variation in transistor performance among the plurality of delay... Agent: Arent Fox LLP

20090045865 - Square-function circuit: A square-function circuit includes an input field-effect transistor (FET) having a gate that is driven by an input voltage and is configured to conduct an output current. The circuit also includes a feedback circuit coupled to a source of the input FET, the feedback circuit being configured to drive a... Agent: Texas Instruments Incorporated

20090045866 - Integrated circuit device, method of controlling operation of integrated circuit device, and method of fabricating integrated circuit device: Disclosed is an integrated circuit device comprising a startup operation circuit (101) for carrying out processing necessary for startup and a post-startup operation circuit (102) for carrying out a main operation after completion of the processing necessary for startup, wherein the post-startup operation circuit (102) has an operation guaranteed temperature... Agent: Mcdermott Will & Emery LLP

20090045867 - Fuse cell and method for programming the same: The fuse cell architecture 371 for the presently claimed invention employs a multiple fuse structure 301, 302 architecture in lieu of a single fuse structure. As such, the terminals of these fuse structures that couple to other on-chip devices are always at ground potential throughout the application of programming voltage... Agent: Pearl Cohen Zedek Latzer, LLP

20090045868 - Double stage compact charge pump circuit: A charge pump circuit comprising a plurality of charge pumps each having their outputs connected in parallel, each charge pump receiving a plurality of clock signals, a clock signal oscillator for providing the plurality of clock signals, the clock signals being out of phase, each charge pump having an output... Agent: Ostrolenk Faber Gerb & Soffen

20090045869 - Semiconductor circuit and controlling method thereof: A semiconductor circuit including a bias circuit (1) generating a signal reflecting a current driving capability of a transistor; an analog/digital converter circuit (2) converting the signal from an analog format into a digital format; and a signal processing circuit (3) partially controlled in an operating state or a non-operating... Agent: Arent Fox LLP

20090045870 - Reference voltage circuit: Provided is a reference voltage circuit whose power supply rejection ratio is large even in a case where a power supply voltage is low. Even in a case where the power supply voltage of a power supply terminal (10) becomes lower and thus an NMOS transistor (71) operates in non-saturation... Agent: Bruce L. Adams, Esq. Adams & Wilks

20090039920 - System and method for mapping system transfer functions: A method, circuit, and computer program product for receiving a first intermediate signal that is at least partially based upon a first reference signal. A second intermediate signal is received that is at least partially based upon a second reference signal. An output signal is generated that is based upon... Agent: Holland & Knight LLP

20090039921 - Voltage detecting circuit and battery device using same: A voltage detecting circuit included in a battery device includes an input voltage comparing circuit that compares a first threshold value voltage or a second threshold value voltage lower than the first threshold value voltage with an input voltage to control the opening and closing of an output switching element,... Agent: Rohm Co., Ltd. C/o Keating & Bennett, LLP

20090039922 - Multi-level comparator for fix power consumption: A multi-level comparator with fixed power consumption is disclosed. By using the switch character of differential pair and parallelizing single side of common source amplifier with multi-level input, the power of the multi-level comparator can be fixed by the current bias. This result shows that the multi-level comparator is able... Agent: Wpat, PC

20090039925 - Sample-and-hold amplification circuits: A sample-and-hold amplification circuit comprises an amplifier, a first sample-and-hold unit, and a second sample-and-hold unit. The amplifier has an input terminal and an output terminal. The first sample-and-hold unit is coupled to the input terminal and the output terminal. The second sample-and-hold unit is coupled to the input terminal... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090039924 - Systems and methods for reducing distortion in semiconductor based sampling systems: Circuits and methods that improve the performance of electronic sampling systems are provided. Parasitic capacitance associated with bootstrap circuitry is reduced, thereby decreasing signal distortion caused by capacitive loading at the input of the sampling circuit. The impedance of a sampling semiconductor switch is maintained substantially constant during sample states,... Agent: Mcdermott Will & Emery LLP

20090039923 - Track-and-hold circuit with low distortion: A track-and-hold circuit capable of tracking an analog input signal and holding a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. A first capacitor is provided, having a first terminal... Agent: Texas Instruments Incorporated

20090039926 - Apparatus for providing ac voltage: The invention is directed to an apparatus for providing an AC voltage, comprising synthesizer means for generating at least one periodic output voltage signal, each periodic output voltage signal having an output frequency, wherein the synthesizer means is supplied by an input AC voltage having an input frequency, wherein the... Agent: Ip Strategies

20090039927 - Clock mode determination in a memory system: A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from... Agent: Borden Ladner Gervais LLP Anne Kinsman

20090039928 - Low power and low timing jitter phase-lock loop and method: A phase-lock loop generates an output clock signal from an input clock signal. The output clock signal is coupled through a clock tree and is fed back to a phase detector, which compares the phase of the output clock signal to the phase of the input clock signal. The output... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20090039929 - Method to reduce static phase errors and reference spurs in charge pumps: A phase-locked-loop (PLL) circuit, that includes: a differential phase-frequency detector, a charge pump and at least one logical gate disposed therebetween for providing cancellation of pulses of a substantially equivalent value output by the detector to the charge pump; wherein the at least one logical gate receives the detector output... Agent: Cantor Colburn LLP-ibm Yorktown

20090039930 - Dll circuit, semiconductor memory device using the same, and data processing system: A DLL circuit includes a delay line (CDL) (10) that delays a clock signal at a relatively coarse adjustment pitch, a delay line (FDL) (20) that delays the clock signal at a relatively fine adjustment pitch, and phase detecting circuits and counter control circuits that control delay amounts of the... Agent: Sughrue Mion, PLLC

20090039931 - Frequency-doubling delay locked loop: A frequency multiplier circuit comprising a delay line receiving at one end thereof a reference clock for generating clock tap outputs from respective ones of a plurality of period matched delay elements; a clock combining circuit responsive to pairs of tap outputs for generating a rising and falling edge of... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20090039932 - Delay circuit of semiconductor memory apparatus: A delay circuit of a semiconductor memory apparatus can include a clock period sensing unit for generating a sensing signal in response to a clock frequency, and a selective delay unit for delaying an input signal for a delay time and then output the input signal as an output signal,... Agent: Baker & Mckenzie LLP Patent Department

20090039933 - System and method: d

20090039935 - Providing a low phase noise reference signal: A reference clock generator includes an oscillator to generate a periodic signal, a shaping circuit and a filter. The shaping circuit shapes the periodic signal to generate a clock signal. The filter is located between the oscillator and the shaping circuit.... Agent: Trop, Pruner & Hu, P.C.

20090039934 - Signal oversampling for improved s:n in reflector movement system: Eight or more transition points are generated during a given period, and are used in tracking movement of an interferometer reflector. Duty cycles of generated square waves are used to establish precise intervals between the transition points, and precise wave-phase relationships.... Agent: Proskauer Rose LLP

20090039936 - Flip-flop circuit, pipeline circuit including a flip-flop circuit, and method of operating a flip-flop circuit: Example embodiments relate to an electronic circuit, for example, a flip-flop circuit, a pipeline circuit including the flip-flop circuit and a method for operating the flip-flop circuit. A flip-flop circuit may include a precharge transistor configured to precharge an internal node to a first power supply voltage in response to... Agent: Harness, Dickey & Pierce, P.L.C

20090039937 - Semiconductor integrated circuit with a logic circuit including a data holding circuit: A semiconductor integrated circuit includes a first data holding section, a first pull-up circuit, a first pull-down circuit, a first feedback circuit, and a second feedback circuit. The first data holding section holds first output data. The first pull-up circuit takes in input data as a pull-up control signal and,... Agent: Dla Piper US LLP

20090039938 - Delaying stage selecting circuit and method thereof: A delaying stage selecting circuit for selecting a specific delaying stage from a plurality of delaying stages, where the delaying stages are for outputting delayed clock signals, includes: a first register for sampling the delayed clock signals according to a clock signal to generate sampled values; first memory units, wherein... Agent: North America Intellectual Property Corporation

20090039939 - Variable delay circuit, testing apparatus, and electronic device: Provided is a variable delay circuit outputting an output signal delayed with respect to an input signal by a designated delay time, including: a delay controller outputting a control voltage according to the delay time; a MOS transistor receiving the control voltage at a gate, and outputs a drain current... Agent: Jianq Chyun Intellectual Property Office

20090039940 - Apparatus and method for preventing generation of glitch in a clock switching circuit: An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate... Agent: Cha & Reiter, LLC

20090039941 - Method and circuit for generating memory clock signal: A memory clock signal is generated in response to a reference clock signal and a clock enable signal. The memory clock signal with a frequency identical to that of the reference clock signal is generated during the clock enable signal is in an enabled state; and the memory clock signal... Agent: Kirton And Mcconkie

20090039942 - Level shifter: A level converter comprises first and second latches, and first through fourth transistors. The first latch has first and second power supply terminals, and first and second nodes. The second latch has third and fourth power supply terminals, and third and fourth nodes. The first transistor has a first current... Agent: Freescale Semiconductor, Inc. Law Department

20090039943 - Mixer and transceiver having the mixer: Provided are a mixer and a transceiver having the mixer. The mixer includes: an local oscillation (LO) differential signal generator converting an input LO signal into a differential signal; and a mixing unit receiving the LO differential signal as a first input and a first signal having a first frequency... Agent: Rabin & Berdo, PC

20090039944 - Reference voltage generation circuit and semiconductor storage apparatus using the same: According to an aspect of the present invention, there is provided a reference voltage generation circuit including: a first circuit configured to generate a first voltage that is independent of a power supply voltage and that is dependent of a temperature; a second circuit configured to generate a second voltage... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090039945 - Bias current generator: An electronic device generates a current with a predetermined temperature coefficient. The circuit comprises a temperature coefficient (TC) component receiving a bias current, a differential amplifier providing a buffered output voltage based on the voltage across the TC component and a resistor receiving an TC current based on the differential... Agent: Texas Instruments Incorporated

20090039946 - Fuse circuit: A fuse circuit includes a first power supply line, a second power supply line, a first current source connected between the first power supply line and an output terminal, a second current source connected between the second power supply line and the output terminal, the second current source having higher... Agent: Young & Thompson

20090039948 - Charge pump circuit and charge pumping method thereof: A charge pump circuit includes first and second charge pumps and a detector. The first charge pump outputs a first charge pump signal of an intermediate voltage level by performing a charge pumping operation in response to a command signal. The detector outputs a detection signal in response to the... Agent: F. Chau & Associates, LLC

20090039947 - Time-multiplexed-capacitor dc/dc converter with multiple outputs: A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of... Agent: Advanced Analogic Technologies

20090039949 - Method and apparatus for producing a low-noise, temperature-compensated bandgap voltage reference: A bandgap voltage reference circuit is achieved that does not resort to the use of resistors or regulation loops and is thus able to achieve improved noise performance while also exhibiting absolute stability, no start-up issues, and low input-voltage operation. Subcircuits comprised of four interconnected transistors of different junction areas... Agent: O'melveny & Myers LLP Ip&t Calendar Department La-1118

20090039950 - Internal power-supply circuit: An internal power-supply circuit generates an internal voltage based on a reference voltage, and has an external-power-supply terminal to which an external power-supply voltage having a first potential is applied during a normal operation and an external power-supply voltage having a second potential that is higher than the first potential... Agent: Arent Fox LLP

20090039951 - Internal power supply circuit: A disclosed invention is an internal power supply circuit, which generates an internal power supply from a first power supply. The circuit comprises a first internal step-down power supply generation unit, which generates a first internal step-down power supply from the first power supply; a normal second internal step-down power... Agent: Arent Fox LLP

20090039952 - System and method for auto-power gating synthesis for active leakage reduction: A method includes parsing a design of the integrated circuit to define cells in automatic power gating power domains, automatically creating an automatic power gating power domain netlist from the parsed design of the integrated circuit, and placing and routing the automatic power gating power domain netlist to produce a... Agent: Texas Instruments Incorporated

20090039953 - Asynchronous absorption circuit with transfer performance optimizing function: A selector is provided so that any one of a plurality of asynchronous absorption paths can be selected when it is assumed that operating frequencies of preceding and succeeding clock domains vary depending on the application. By an operation of a selector control circuit based on, for example, information about... Agent: Mcdermott Will & Emery LLP

20090039954 - Fan system and fan with filter: A filter is electrically coupled to a fan or is built-in with a fan, the filter is also electrically coupled a first power terminal and a second power terminal. The filter includes an amplifier, a capacitor, and a divider. The amplifier includes a first terminal, a second terminal and a... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090039955 - Variable resistor, filter, variable gain amplifier and integrated circuit using the variable resistor: A variable resistor formed on a silicon substrate, and changing a resistance value between an input terminal and an output terminal, includes a plurality of first resistors each having one end connected in common to the input terminal, and each having other end, a plurality of second resistors each having... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090033371 - Amplifier circuit for double sampled architectures: A double sampled switched capacitor architecture as described herein includes an amplifier having two separate inputs corresponding to two separate amplifier sections. The amplifier uses a first differential transistor pair for the first amplifier section, a second differential transistor pair for the second amplifier section, a first tail current bias... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090033370 - Comparator with low supplies current spike and input offset cancellation: A current control circuit is coupled in parallel with the current paths of a differential comparator circuit to ensure that a substantially constant current is drawn from a current source during all operating phases of a comparator. The current control circuit is biased by a reference voltage, which is also... Agent: Bever Hoffman & Harms, LLP 2099 Gateway Place

20090033372 - Simultaneous lvds i/o signaling method and apparatus: First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to... Agent: Texas Instruments Incorporated

20090033373 - Circuit and method for trimming integrated circuits: A programmable after-package, on-chip reference voltage trim circuit for an integrated circuit having a plurality of programmable trim cells generating a programmed sequence. A converter is provided to convert the bit sequence into a trim current. The trim current is added to an initial value of a reference voltage to... Agent: O2m/gtpp

20090033374 - Clock generator: A frequency divider, comprising an input for receiving an input clock signal having a first frequency; a divider, for generating an output signal having an instantaneous frequency equal to the first frequency divided by an instantaneous division ratio; and a sequence generator, for generating a sequence of instantaneous division ratios... Agent: Dickstein Shapiro LLP

20090033375 - Method and apparatus for identifying and reducing spurious frequency components: A method for identifying and reducing spurious frequency components is provided. A method in accordance with at least one embodiment of the present disclosure may include generating a digital sinusoidal waveform at a direct digital synthesizer (DDS) and receiving the digital sinusoidal waveform at an audio digital-to-analog converter. The method... Agent: Holland & Knight LLP

20090033376 - Locked loop circuit: A circuit for receiving an input signal having a first frequency and generating an output signal having a second frequency. The circuit comprises a forward branch for receiving the input signal and generating the output signal and a return branch for generating a feedback signal from the output signal. The... Agent: Dickstein Shapiro LLP

20090033377 - Drive circuit and inverter for voltage driving type semiconductor device: A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090033378 - Programmable frequency multiplier: A programmable frequency multiplier device which includes a frequency doubler section configured to receive an input signal having a frequency f, and to output doubled signals, each of the doubled signals having a frequency 2n×f (n=0, 1, 2, . . . ); a selector section configured to select a plurality... Agent: Motorola, Inc. Law Department

20090033379 - Generation of a digital controlled precise analog sine function: This disclosure relates to semiconductor device having a trapezoid shaped resistive strip with a plurality of legs coupled along one strip edge to produce an analog sine wave.... Agent: Lee & Hayes, PLLC

20090033382 - Frequency synthesizer: A circuit for receiving an input signal and generating an output signal, the input signal having a first frequency, the output signal having a second frequency. The circuit comprises a forward branch for generating the output signal and a return branch for feeding back the output signal. The return branch... Agent: Dickstein Shapiro LLP

20090033381 - Phase locked loop, voltage controlled oscillator, and phase-frequency detector: A phase locked loop, voltage controlled oscillator, and phase-frequency detector are provided. The phase locked loop comprises a phase-frequency detector (PFD), a loop filter (LF), a voltage controlled oscillator (VCO), and a 3-stage frequency divider. The PFD receives a reference signal and a feedback signal to determine phase and frequency... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090033380 - Redundant clock switch circuit: A redundant clock switch circuit that includes two delay circuits and control logic is presented. The first delay circuit is configured to delay a first clock signal to produce a first delayed clock signal, while the second delay circuit is configured to delay a second clock signal to produce a... Agent: Hewlett Packard Company

20090033383 - High output resistance, wide swing charge pump: Disclosed are current sink and source circuits, a charge pump that incorporates them, and a phase locked loop that incorporates the charge pump. The current sink and source circuits each have a current mirror that biases a transistor connected to an output node. These circuits each further have a two-stage... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090033386 - Delay lock loop circuits including glitch reduction and methods for using such: Various systems and methods for delaying one signal in relation to another are disclosed. As one example, a delay lock loop circuit is discussed that includes at least a first delay stage and a second delay stage, each including a plurality of selectable delay elements. The delay stages are configured... Agent: Texas Instruments Incorporated

20090033385 - Glitch reduced delay lock loop circuits and methods for using such: Various embodiments of the present invention provide delay lock loop circuits. Such delay lock loop circuits include two or more delay stages that each include a plurality of selectable delay elements. A reference signal drives an input of the first delay stage, and the first delay stage provides a first... Agent: Texas Instruments Incorporated

20090033387 - Master slave delay locked loops and uses thereof: Various systems and methods for delaying a signal relative to another signal are disclosed. As one example, a delay lock loop circuit is disclosed that includes at least two delay stages. Each of the aforementioned delay stages include a plurality of selectable delay elements. Such selectable delay elements may be,... Agent: Texas Instruments Incorporated

20090033384 - Method and system for managing digital to time conversion: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first... Agent: Motorola, Inc

20090033388 - Systems and methods for reduced area delay locked loop: Various systems and methods for signal synchronization are disclosed. For example, some embodiments of the present invention provide methods for reduced area delay signal timing. Such methods include providing a delay lock loop circuit with a plurality of selectable delay elements. The methods further include operating the delay lock loop... Agent: Texas Instruments Incorporated

20090033391 - Circuits to delay a signal from a memory device: A method for delaying a control signal, includes receiving a clock signal, determining a number of delay elements required to generate a first delay equal to a target amount of the period of the clock signal, receiving a data signal having an edge generated at the same time as an... Agent: Schwegman, Lundberg & Woessner / Atmel

20090033392 - Delay locked loop with improved jitter and clock delay compenstating method thereof: A delay locked loop can remove a jitter component that inevitably occurs due to feedback latency in the conventional DLL. That is, the present invention has benefit of removing the jitter component by controlling the delay lines based on the predicted data. The delay locked loop includes a pattern detecting... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090033389 - Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures: Disclosed herein are embodiments of a programmable phase adjusting circuit, a programmable phase adjusting mixer circuit and design structures for these circuits. These circuits comprise a variable delay device connected between input and output nodes. The device includes multiple FETs with input diffusion regions that are connected to a voltage... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090033390 - Signal processing apparatus and control method thereof: A signal processing apparatus and a control method thereof are provided. The signal processing apparatus includes: a signal processor which respectively processes an input video signal and an input audio signal; a communication unit which is communicably linked with an external audio output unit that outputs the audio signal; and... Agent: Sughrue Mion, PLLC

20090033393 - Method and apparatus for regulating a diode conduction duty cycle: A power converter control method and apparatus is disclosed. A control circuit for use in a power converter according to aspects of the present invention includes a clock signal generator coupled to generate a clock signal to control switching of a power switch to be coupled to the control circuit.... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090033394 - Data retention in operational and sleep modes: A circuit is disclosed for retaining a signal value during a sleep mode while a portion of said circuit is powered down comprising: a clock signal input operable to receive a clock signal; at least one latch clocked by said clock signal; a data input, a data output and a... Agent: Nixon & Vanderhye P.C.

20090033395 - Multiple source-single drain field effect semiconductor device and circuit: Disclosed are embodiments of a variable-delay field effect transistor (FET) having multiple source regions that can be individually and selectively biased to provide an electrical connection to a single drain region. Delay is a function of which of the multiple source regions is/are selectively biased as well as a function... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090033396 - setup/hold time control circuit: A setup/hold time control circuit includes a reference signal output unit that sets any one of multiple ports as a reference port and buffers a signal input through the reference port to output as a reference signal. The setup/hold time control circuit also includes a plurality of comparative signal output... Agent: Ladas & Parry LLP

20090033397 - Delay time adjusting method of semiconductor integrated circuit: The delay time variation of transistors caused by the manufacturing variation is desired to be adjusted. A relation table storing a relation between sizes and voltage values (supply voltages and bias voltages) is provided. Macros each of which includes a transistor and a setting voltage generation circuit for applying a... Agent: Mcginn Intellectual Property Law Group, PLLC

20090033398 - Clock distribution network wiring structure: A wiring structure for clock signals has two or more parallel clock signal wires disposed in adjacent power wire bays that span the distance between the sinks to which the clock signal wires are to be coupled. The parallel clock signal wires are shorted one to another by stubs placed... Agent: International Business Machines Corporation

20090033399 - Method and device for adjusting a pulse detection threshold, and pulse detection and corresponding receiver: The invention relates to a method for adjusting a pulse detection threshold consisting in detecting a pulse when the edge of said pulse envelop crosses the threshold, in allocating (A) a staring value (TH0) to the threshold and in adjusting (B1) the threshold (TH) in such a way that the... Agent: Mckenna Long & Aldridge LLP

20090033402 - Level conversion circuit: A level conversion circuit according to the present invention comprises: a first transistor having a gate thereof grounded, for inputting the input voltage to a source thereof and outputting an output voltage from a drain thereof; a second transistor having a drain thereof to which a power supply voltage is... Agent: Mcdermott Will & Emery LLP

20090033403 - Level converting circuit: In a level shifter for converting a signal level of a first logic circuit to which a first power source is supplied into a signal level of a second logic circuit to which a second power source is supplied, the circuit includes a switching circuit between a GND power source... Agent: Sughrue Mion, PLLC

20090033401 - Level shifting circuit with symmetrical topology: A shifter circuit includes a pair of feed forward sections and a pair of feedback sections. The sections are arranged and coupled to form a balanced symmetrical topology. The feed forward sections each include inverter pairs of PMOS and NMOS devices. The feedback sections each include a pair of cross-coupled... Agent: Ibm Corporation

20090033400 - Voltage tolerant floating n-well circuit: Methods and apparatuses are presented for voltage tolerant floating N-well circuits. An apparatus for mitigating leakage currents caused by input voltages is presented which includes a first transistor having a source coupled to a positive voltage supply, and a drain coupled to a floating node. The apparatus may further include... Agent: Qualcomm Incorporated

20090033404 - Broadband cascode mixer: A mixer has a cascode configuration. With the configuration, the mixer is operated under a low voltage. And, the present invention has a good circuit gain, a good broadband operation and a low power consumption. The mixer can be realized with a CMOS transistor. Hence, the present invention is fit... Agent: Troxell Law Office PLLC Suite 1404

20090033405 - Driver circuit and semiconductor device using the same: A driver circuit of the present invention includes: a pair of switch elements (P1, N1) connected in series between a ground terminal and a stepped-up voltage VCP application terminal to which a stepped-up voltage VCP is applied; and a clamp element ZD1 connected between a node A between the pair... Agent: Fish & Richardson P.C.

20090033406 - Internal voltage generator of semiconductor integrated circuit: The internal voltage generator of a semiconductor integrated circuit includes at least one variable reference voltage generating unit that generates a base reference voltage increased or decreased according to the variation in temperature, at least one level shifting unit that transforms the base reference voltage outputted by the at least... Agent: Venable LLP

20090033407 - Structure for a high output resistance, wide swing charge pump: Disclosed are design structures for current sink and source circuits, a charge pump, and a phase locked loop. The current sink and source circuits each have a current mirror that biases a transistor connected to an output node. These circuits each further have a two-stage feedback amplifier to sense the... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090033408 - Voltage pump circuit with an oxide stress control mechanism for use in high-voltage applications in an integrated circuit: A voltage pump circuit that has an oxide stress control mechanism is disclosed. In particular, the oxide stress control mechanism of the voltage pump circuit ensures a safe transistor gate-to-source voltage in high-voltage applications in an integrated circuit. In particular, the down level of the gate voltage of the output... Agent: Downs Rachlin Martin PLLC

20090033409 - Bias correction device: A bias correction device to be used on a power supply which has a high voltage output end and a low voltage output end bridges the high voltage output end and the low voltage output end. When the output voltage at the low voltage output end is too low the... Agent: Joe Mckinney Muncy

20090033410 - Power electronics devices with integrated control circuitry: A power switch apparatus includes a substrate; a semiconductor die mounted on the substrate and including power electronics circuitry for a high power, alternating current motor application; gate drive circuitry mounted on the substrate and electrically coupled to the power electronics circuitry on the semiconductor die; and control circuitry mounted... Agent: Ingrassia Fisher & Lorenz, P.C. (gm)

20090033411 - Oscillation maintentance circuit for half duplex transponder: An oscillation maintenance circuit for a half-duplex transponder that has an LC resonant circuit, a storage capacitor and a rectifier connected to charge the storage capacitor with a rectified oscillation signal, having an end-of-burst detector providing an end-of-burst signal when the amplitude of the oscillation signal has dropped below a... Agent: Texas Instruments Incorporated