Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 12/08

20080315921 - Digital frequency detector and digital phase locked loop using the digital frequency detector: A digital frequency detector and a digital phase locked loop (PLL) are provided. The digital frequency detector includes a first conversion unit which outputs a first frequency as first frequency information of a digital type using a first ring oscillator that operates in a high-level period of the first frequency,... Agent: Sughrue Mion, PLLC

20080315922 - Compensated comparator for use in lower voltage, higher speed non-volatile memory: Briefly, in accordance with one or more embodiments, an offset compensated comparator is capable of being utilized for higher speed, lower voltage use. The comparator comprises a cross-coupled latch comprising n type devices and p type devices. The threshold mismatch between n type devices is captured on capacitors coupled to... Agent: Cool Patent, P.C. C/o Intellevate

20080315923 - Compensating a push-pull transmit driver: An interface such a PCI-E interface may comprise a transmitter and a compensation circuit. In one embodiment, the transmitter may comprise a transmit driver, which may use a push-pull configuration. The transmit driver may require stable voltages such as (Vdd/2+0.25) and (Vdd/2−0.25) Volts. The compensation circuit may comprise a voltage... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20080315924 - Comparator with low offset voltage: A differential comparator is provided. The comparator receiving two differential signals and generating a comparison result represented by an output signal on one of two output terminals respectively on two current paths. The comparator comprises two pairs of latch transistors respectively disposed on the two current paths and two pairs... Agent: Baker & Mckenzie LLP Patent Department

20080315925 - Isolator circuit including a voltage regulator: An apparatus includes a regulator circuit that generates a voltage in response to an input current being supplied to an input terminal and functional circuitry, powered by the voltage generated by the regulator circuit. The functional circuitry, e.g., an oscillator, generates a signal using the generated voltage, the signal indicative... Agent: Zagorin O'brien Graham LLP

20080315926 - Frequency synthesizer: Disclosed is a frequency synthesizer. The frequency synthesizer includes a phase frequency detector for generating an up signal and a down signal by detecting frequency and phase differences between a reference signal and a comparison signal, a charge pump for outputting a control signal according to the up signal and... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080315927 - Frequency adjusting apparatus and dll circuit including the same: A frequency adjusting apparatus includes a frequency control signal generating unit that generates a multi-bit frequency control signal, which is changed in level bit by bit, in response to a reference clock signal, and a frequency adjusting unit that adjusts the frequency of the reference clock signal in response to... Agent: Baker & Mckenzie LLP Patent Department

20080315928 - Digital phase locked loop with dithering: An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on... Agent: Texas Instruments Incorporated

20080315929 - Automatic duty cycle correction circuit with programmable duty cycle target: A duty cycle correcting circuit for an integrated circuit memory automatically corrects the duty cycle of an input clock by measuring the relative difference between the high time and low time of the input signal and using this measurement to achieve a same-frequency, duty cycle adjusted output signal. The duty... Agent: Hogan & Hartson LLP

20080315930 - Duty cycle error calculation circuit for a clock generator having a delay locked loop and duty cycle correction circuit: A system and method for generating a correction signal for correcting duty cycle error of a first clock signal relative to a second complementary clock signal. Changes to a time difference between high- and low-portions of the first clock signal are detected and the correction signal is generated in response... Agent: Kimton N. Eng, Esq. Dorsey & Whitney LLP

20080315931 - Semiconductor integrated circuit having active and sleep modes and non-retention flip-flop that is initialized when switching from sleep mode to active mode: A semiconductor integrated circuit has an active mode and a sleep mode. The semiconductor integrated circuit is constructed by alternately connecting a plurality of combinational logic circuits and a plurality of flip-flops. The flip-flops include a retention flip-flop that is supplied with electric power and retains the data in the... Agent: Oliff & Berridge, PLC

20080315932 - Pulsed state retention power gating flip-flop: A flip-flop includes a functional latch and a retention latch. The functional latch is configured to maintain a logic state of the flip-flop in a power-up mode and the retention latch is configured to maintain the logic state of the flip-flop in a power-down mode. The retention latch is selectively... Agent: Dillon & Yudell LLP

20080315933 - Pulse synthesis circuit: A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of... Agent: Mcdermott Will & Emery LLP

20080315935 - Digital acquistion device for an amplitude modulation signal: The invention relates to a digital acquisition device for an amplitude modulation signal of a carrier. The acquisition device digitally acquires a useful signal. The useful signal modulates the amplitude of a carrier HF1 which has a frequency and a phase that are known. A modulation of the amplitude of... Agent: Lowe Hauptman & Berner, LLP

20080315934 - Integrated circuit comprising a mixed signal single-wire interface and method for operating the same: The invention relates to an integrated circuit (1) which comprises a novel bidirectional mixed signal single-wire interface (6) via which the circuit receives command information from a host and transmits conditioned analog signals to the host. In order to implement the mixed signal interface, the integrated circuit is provided with... Agent: Brooks Kushman P.C.

20080315937 - Apparatus for generating internal voltage in semiconductor integrated circuit: An apparatus for generating an internal voltage in a semiconductor integrated circuit includes a first voltage generating unit configured to detect a feedback voltage level of a first internal voltage and perform a pumping operation, thereby generating a first internal voltage, and a second voltage generating unit configured to generate... Agent: Baker & Mckenzie LLP Patent Department

20080315938 - Driving circuit for switching elements: A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080315936 - Level shifting: Various aspects are described, such as a method for operating a level shifter, in which the level shifter is coupled to a first supply voltage and a second supply voltage different from the first supply voltage. The method may include detecting whether the first supply voltage is present, and decoupling... Agent: Banner & Witcoff, Ltd. Attorneys For Client 007052

20080315939 - Anti-logarithmic amplifier designs: An anti-exponential amplifier produces an output signal that is an exponential/anti-logarithmic function of an input signal. The amplifier includes three function generators and a low-pass filter. The first function generator produces a periodic exponential waveform based upon a resistor-capacitor time constant, with the magnitude of the periodic exponential waveform exponentially... Agent: Honeywell International Inc.

20080315940 - Mixing device for plural digital data having different sampling rates: A method of mixing a first digital data having a first sampling rate and a second digital data having a second sampling rate includes converting the second digital data, by using a first coefficient obtained by multiplying a sampling coefficient with a volume coefficient for the second digital data, to... Agent: Mcginn Intellectual Property Law Group, PLLC

20080315941 - Flat substrate having an electrically conductive structure: The invention is characterised in that at least one sensor is integrated inside the flat substrate or applied to a surface of the flat substrate, which generates sensor signals according to deformations occurring inside the flat substrate, at least one actuator is integrated inside the flat substrate or applied to... Agent: Buchanan, Ingersoll & Rooney PC

20080315942 - Vt stabilization of tft's in oled backplanes: In a method of reducing or undoing progressive threshold shift in a thin-film-transistor (TFT) circuit, first and second voltages applied to source and gate terminals of a first transistor cause the first transistor to conduct and apply the first voltage to the gate terminal of the second transistor. The first... Agent: The Webb Law Firm, P.C.

20080315943 - Anti-jitter circuits: An anti jitter circuit for reducing time jitter in an input pulse train comprises an integrator, a DC removal circuit and a comparator. The anti jitter circuit also has a feedback loop effective to suppress phase deviation of the output pulse train in response to jitter.... Agent: Stites & Harbison PLLC

20080309375 - High accuracy current mode duty cycle and phase placement sampling circuit: A duty cycle and phase placement sampling circuit that can be used for high accuracy sampling and correcting the duty cycle and placement of differential clock signals is provided. The duty cycle and phase placement sampling circuit includes dual differential input stages and re-timed precharge signals that allow for high... Agent: Dorsey & Whitney LLP Intellectual Property Department

20080309376 - Mains phase detection apparatus: The present invention relates to an apparatus for accurately detecting a mains phase. The apparatus is constructed with a zero-crossing detector, a digital phase detector, a digital loop filter, and a digital controlled oscillator (DCO) of a direct digital synthesized (DDS) manner. The present apparatus employs an all-digital loop architecture... Agent: Quarles & Brady LLP

20080309377 - Balanced phase detector: Methods and apparatus are disclosed, such as those involving a digital phase detector that includes a phase detection circuit configured to detect which one of two clock signals leads the other. One such phase detector includes a balancer configured to prepare the phase detection circuit for a phase detection. The... Agent: Knobbe Martens Olson & Bear LLP

20080309378 - Semiconductor device: A semiconductor device 10a includes a normal circuit 11 and a voltage fluctuation detection circuit 12a connected to a power supply 100 in common with the normal circuit 11. The voltage fluctuation detection circuit 12a includes an inverting amplifier 13a, a switching element 14, which is connected between input and... Agent: Dickinson Wright PLLC

20080309379 - Zero crossing circuit: An improved zero crossing circuit includes a signal output circuit element for registering a sharply defined signal, and in one embodiment an isolation circuit element cooperating with the signal output element, and a delay-inducing circuit element cooperating with the signal output element for applying a substantially constant time delay to... Agent: Antony C. Edwards

20080309380 - Method and apparatus for detecting switching current of magnetic device operated in continuous current mode: The present invention provides a method and apparatus for detecting a continuous current of a switching current. A current signal is produced in response to a switching current of the magnetic device. By sampling the waveform of the current signal in response to the enabling of a switching signal, a... Agent: J C Patents, Inc.

20080309381 - Device for controlling a high-voltage transistor, in particular a mos transistor of a high-voltage radio-frequency generator for the spark ignition of an internal combustion engine: A control device including: an input terminal for receiving a logic control signal; an output terminal for delivering an output control signal from the high-voltage MOS transistor; a first NMOS control transistor with low internal impedance, which is connected between ground and the output terminal and the gate of which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080309382 - Mosfet for synchronous rectification: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of... Agent: Bo-in Lin

20080309383 - Semiconductor integrated circuit: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an... Agent: Miles & Stockbridge PC

20080309384 - Initialization circuitry having fuse leakage current tolerance: A system for initializing circuitry is presented. The system employs a power-on reset circuit having a threshold voltage and a programmable switch circuit. The power-on reset circuit has a detector circuit for detecting a reference voltage, and a one-sided latch for generating an output voltage reflective of the reference voltage.... Agent: Honeywell International Inc.

20080309385 - Electronic device and method for on chip skew measurement: The invention relates to an integrated electronic device for digital signal processing, which includes a phase locked loop for generating an output clock signal based on a reference clock input signal, multiple outputs for providing multiple representatives of the output clock signal, a stage for generating a phase shifted output... Agent: Texas Instruments Incorporated

20080309386 - Bias generator providing for low power, self-biased delay element and delay line: An improved bias generator incorporates a reference voltage and/or a reference current into the generation of bias voltages. In some cases, the output of a biased delay element has a constant voltage swing. A delay line of such constant output voltage swing delay elements may be shown to provide reduced... Agent: Ridout & Maybee LLP

20080309387 - Dll circuit: A DLL circuit according to an embodiment of the present invention includes: a delay line configured to output a plurality of delayed signals of a reference signal, the delay line including, a plurality of first delay units connected in series with each other, each of the first delay units being... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080309388 - Method for adjusting phase relationship between signals in a measuring apparatus, and a measuring apparatus: A measuring apparatus having a frequency-swept heterodyne-type frequency converter equipped with a frequency-swept signal source and a multiplier includes means for detecting the timing of reference burst signals that have been subjected to frequency conversion by the frequency converter, with the frequency of the output signals of the frequency-swept signal... Agent: Agilent Technologies Inc.

20080309389 - System for preventing shopping cart push-out theft: A system and method for preventing push-out theft includes a network of electronic devices that are collectively operable in either a “safe restart” mode” or in an “operational” mode. The network is installed in a shopping area and prevents shopping cart removal from the area when in the “operational” mode.... Agent: Neil K. Nydegger Nydegger & Associates

20080309390 - Multi-mode digital-to-analog converter: Various apparatuses, methods and systems for a multi-mode DAC with selectable output range, granularity and offset and controlled slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus for supplying a reference signal, including a digital-to-analog converter, a counter and a clock. The digital-to-analog... Agent: Texas Instruments Incorporated

20080309391 - Delay circuit and related method thereof: Disclosed is a delay circuit, which comprises: a map delay module, for delaying an input data signal to generate an output data signal according to a mapped delay selection signal; and a delay mapping unit, coupled to the map delay module, for generating the mapped delay selection signal according to... Agent: North America Intellectual Property Corporation

20080309392 - Programmable digital delay: A method of delaying successive first and second input signals by first and second different selectable time periods using a programmable delay line comprising a sequence of delay elements, each introducing a delay, the method comprising the steps of: providing a control signal to each delay element, the control signal... Agent: Docket Clerk

20080309393 - Clock-generator architecture for a programmable-logic-based system on a chip: A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator... Agent: Lewis And Roca LLP

20080309394 - Guardringed scr esd protection: Methods and circuits are disclosed for protecting an electronic circuit from ESD damage using an SCR ESD cell. An SCR circuit is coupled to a terminal of an associated microelectronic circuit for which ESD protection is desired. The SCR used in the ESD cell of the invention is provided with... Agent: Texas Instruments Incorporated

20080309395 - Systems and methods for level shifting using ac coupling: Systems and methods for conveying signals between integrated circuit (IC) components in domains having different supply voltages. AC coupling is used to increase the speed at which the common mode voltage of a signal is shifted from one level to another. One embodiment comprises a method for level shifting a... Agent: Law Offices Of Mark L. Berrier

20080309396 - Hacking detector circuit for semiconductor integrated circuit and detecting method thereof: Disclosed is a semiconductor integrated circuit which includes a pre-charge capacitor connected to a check node pre-charged. A sense capacitor is configured to discharge the check node. A detector is configured to detect whether the sense capacitor is exposed, based upon a voltage of the check node after a predetermined... Agent: F. Chau & Associates, LLC

20080309397 - Semiconductor device including a bias voltage generator: A semiconductor device including a bias voltage generator formed from a junction field effect transistor (JFET). The JFET includes a control gate terminal and a first and a second source/drain terminal. The first and second source/drain terminals can form a first terminal of a p-n junction and the control gate... Agent: Darryl G. Walker

20080309398 - Multiplier circuit: A multiplier circuit includes a bias circuit which outputs a reference voltage and a bias signal, a first delay circuit which inputs a input signal and outputs a first delayed signal according to the reference voltage and the bias signal, a second delay circuit which inputs an inversed input signal... Agent: Volentine & Whitt PLLC

20080309399 - Two-phase charge pump circuit without body effect: A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is... Agent: Bacon & Thomas, PLLC

20080309400 - Switches with passive bootstrap: Switches with passive bootstrap that can achieve good sampling performance are described. In one design, a sampling circuit with passive bootstrap includes first and second filters and a switch. The first filter filters an input signal and provides a filtered input signal. The second filter filters a clock signal and... Agent: Qualcomm Incorporated

20080309401 - Random number generating circuit: Provided is a random number generating circuit having a simple circuit structure, for generating a physical random number based on a noise. The random number generating circuit includes a reference voltage section, an inverting amplifier section having a threshold voltage equal to a reference voltage level, and a semiconductor switch... Agent: Brinks Hofer Gilson & Lione

20080309402 - Extinction of plasma arcs: A circuit configuration reduces electrical energy stored in a lead inductance formed by a plurality of leads that connect a power supply unit with a load. The circuit configuration includes a switching device in operative connection with at least one of the leads for enabling or interrupting power to the... Agent: Fish & Richardson PC

20080303555 - Tone detector: A tone detector is disclosed that is realizable in digital embodiment on a single integrated circuit die and does not require external components, such as a discrete capacitor. An input connects to a comparator, which in turn connects to one or more edge detectors and a flip flop. The edge... Agent: Weide & Miller, Ltd.

20080303556 - Power supply ground crossing detection circuit: A detecting circuit for detecting an input signal crossing a ground level is disclosed. The circuit comprises two PMOS transistors and two NMOS transistors connected, respectively. The PMOS transistors have source terminals connected to a power voltage, the gate terminals connected together and the drain terminal of the second PMOS... Agent: Chih Feng Yeh

20080303557 - Circuits for forming the inputs of a latch: Circuits for forming the inputs of a latch are provided. In some embodiments, circuits for forming inputs of a latch comprise: a first transistor having a first gate terminal, a first drain terminal, a first source terminal, a first gate length, and a first common mode level at the first... Agent: Byrne Poh LLP

20080303558 - Data output driver circuit: A data output driver circuit can be configured to comprise a predriver control unit generate a plurality of pullup output load control signals and a plurality of pulldown output load control signals depending upon a sensed external voltage, and a predriver is configured to output a signal by adjusting a... Agent: Baker & Mckenzie LLP Patent Department

20080303560 - Drive circuit for voltage driven electronic element: A drive circuit for driving a voltage-driven-type element including a gate terminal, an emitter terminal and a collector terminal includes a first semiconductor switch including an output terminal disposed between a power source for the drive circuit and the gate terminal, a first resistor disposed between the output terminal and... Agent: Young & Basile, P.C.

20080303559 - Electronic device and related method for performing compensation operation on electronic element: The present invention discloses an electronic device and related method for performing a compensation operation on an electronic element, wherein the electronic device includes: a control module, for outputting a control signal according to an input signal; a driver module, coupled to the control module and the electronic element, for... Agent: North America Intellectual Property Corporation

20080303561 - Frequency divider including latch circuits: A frequency divider is disclosed herein. The frequency divider includes a first latch circuit and a second latch circuit coupled to the first latch circuit. Each of the first latch circuit and the second latch circuit includes a first level for generating a source current, a second level for receiving... Agent: Patent Prosecution O2mirco , Inc.

20080303562 - Divider: A divider is provided. The divider includes a first flip-flop, a flip-flop array, a first NOT gate, a second NOT gate, and a circuit. The first flip-flop can be triggered by a frequency signal. The first NOT gate is coupled between a positive output terminal of the last second flip-flop... Agent: Jianq Chyun Intellectual Property Office

20080303563 - Triangular wave generator: Triangular wave oscillation circuits generate A-wave and B-wave with phases opposite to each other, and are capable of independently controlling oscillation levels of the A-wave and the B-wave. A slope switching circuit including an output voltage monitoring circuit, a slope switching control circuit, and an inverter, monitors output voltages of... Agent: Mcginn Intellectual Property Law Group, PLLC

20080303564 - On chip timing adjustment in multi-channel fast data transfer: A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits.... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080303565 - Dll circuit and related method for avoiding stuck state and harmonic locking utilizing a frequency divider and an inverter: Disclosed is a DLL circuit for avoiding stuck and harmonic locking errors by utilizing a frequency divider and an inverter. This DLL circuit includes: a delay line, a control circuit, a first frequency divider, a second frequency divider and an inverter. The delay line is utilized for receiving a first... Agent: North America Intellectual Property Corporation

20080303566 - Spread spectrum clock generator with low jitter: A spread spectrum clock generator includes: a phase frequency detector, for generating a phase difference signal according to a frequency divided signal and a reference signal with a reference frequency; a charge pump, for receiving the phase difference signal and generating an output current according to the phase difference signal;... Agent: Wpat, PC

20080303568 - Clock distribution network supporting low-power mode: A clock distribution network locks a local clock signal to a reference clock signal using a first feedback loop associated with a synchronization circuit (e.g., a PLL or a DLL). The local clock signal can then be selectively distributed to a plurality of clock destination nodes via a clock network.... Agent: Silicon Edge Law Group, LLP

20080303567 - Delay locked loop circuit: A delay element generates a delayed clock signal which transitions with a delay from a rising (or falling) of a reference clock signal by a delay amount determined based on an output of a loop filter. A signal generation circuit generates two signals which complementarily change according to rising and... Agent: Mcdermott Will & Emery LLP

20080303569 - Delay locked loop circuit: The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback... Agent: Borden Ladner Gervais LLP Anne Kinsman

20080303571 - Delay circuit: A delay circuit to generate and output a delayed signal delayed from an input signal includes a reference pulse generating circuit to generate a reference pulse train in response to the input of the input signal, the reference pulse generating circuit having a feedback circuit containing a delay portion to... Agent: Foley And Lardner LLP Suite 500

20080303570 - Method and apparatus for synchronous clock distribution to a plurality of destinations: Circuits, methods and systems are disclosed providing clock synchronization circuits for synchronized clock distribution for a plurality of devices in a semiconductor device. The clock synchronization apparatus includes an independent synchronization circuit and a dependent synchronization circuit. The independent synchronization circuit may provide synchronized clock distribution for a first destination... Agent: Trask Britt, P.C./ Micron Technology

20080303572 - Spread spectrum device and related random clock generator for a switching amplifier: A random clock generator for a spread spectrum modulating device includes a random number generator for generating a plurality of random number signals according to a first square wave signal and a control signal, a reference wave generator coupled to the random number generator for generating a triangular signal and... Agent: North America Intellectual Property Corporation

20080303573 - Data-retention latch for sleep mode application: A latch includes a data input terminal for receiving a data signal; a data output terminal for outputting the data signal; a first control terminal for receiving a control signal to set or reset the data signal derived from the data output terminal; a sleep signal input terminal for receiving... Agent: Wpat, PC

20080303574 - Internal clock driver circuit: An internal clock signal driver circuit includes a delay block that delays a rising clock signal and a falling clock signal, and outputs a delayed rising clock signal and a delayed falling clock signal, a rising DLL clock signal generating block that receives and combines the rising clock signal, the... Agent: Baker & Mckenzie LLP Patent Department

20080303575 - Pulse generating circuit and uwb communication system: A pulse generating circuit includes a starting circuit which generates m (two or larger integer) starting signals at predetermined time intervals based on a generation starting signal, and m pulse wave generating sub circuits which have the same characteristics and generate pulse waves having pulse width Pw for n cycles... Agent: Harness, Dickey & Pierce, P.L.C

20080303576 - Clock distribution network architecture with resonant clock gating: Disclosed herein is a digital system that includes a distribution network to carry a reference clock, and a circuit domain coupled to the distribution network to receive the reference clock for synchronous operation in accordance with the reference clock. The circuit domain includes a clock generator driven by the reference... Agent: Lempia Braidwood LLC

20080303577 - Arrangement for canceling offset of driver amplifier circuitry: In an offset canceling arrangement, an offset of an operational amplifier may be canceled even in case capacitive or resistive element is connected outside of the operational amplifier per se, and a signal may be output even during the offset canceling operation. IC chips include respective sets of plural output... Agent: Studebaker & Brackett PC

20080303578 - Boost circuit and level shifter: A level shifter including a first boost circuit, an inverter, a second boost circuit and a level shift circuit is disclosed. The first boost circuit receives an input signal, and a first amplification factor for the input signal is determined based on a control signal. The inverter receives the input... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20080303579 - Mixer with carrier leakage calibration: A mixer circuit. The mixer circuit comprises a double-balanced mixer and a carrier-leakage calibration cell. The double-balanced mixer has first and second input pairs whereby the first input pair receives the first differential input signal. The carrier-leakage calibration cell receives the second differential input signal and a differential calibration current... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080303580 - Control circuit for a high-side semiconductor switch for switching a supply voltage: A high-side semiconductor switch control circuit for switching a positive supply voltage is provided, having a circuit to provide a drive voltage for the high-side semiconductor switch, a driver circuit for driving the high-side semiconductor switch based on the control circuit, wherein both the circuit for providing the drive voltage... Agent: Duane Morris LLP - Dc

20080303581 - Semiconductor device: A semiconductor device comprises a driver provided for a semiconductor element having a control electrode to which a drive voltage is applied, the semiconductor element being switched between the conduction state and the non-conduction state based on the drive voltage, the driver operative to apply the drive voltage to the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080303582 - Input device for portable terminal: Disclosed is an input device of a portable terminal, which includes at least one key groove at an outer peripheral surface of the portable terminal, a push detector in the key groove, and a sliding pad. The sliding pad is in the key groove and disposed on the push detector,... Agent: H.c. Park & Associates, PLC

20080303583 - Electronics module, method for the manufacture thereof and applications: This publication concerns electronics modules comprising at least one first material zone formed of first material which can be structurally transformed by means of electric interaction in order to increase its conductivity at least locally, the first material having a first transformation threshold, and at least one second material zone... Agent: Birch Stewart Kolasch & Birch

20080303584 - Charge circuit for optimizing gate voltage for improved efficiency: A charge circuit for providing a gate driver supply voltage for a gate driver of a switching power supply in accordance with an embodiment of the present application includes a first voltage source providing a first voltage and a charge pump circuit connected to the first voltage source and operable... Agent: Ostrolenk Faber Gerb & Soffen

20080303585 - Charge pump circuit and nonvolatile memory: A charge pump circuit is provided for stably obtaining a stepped-up voltage even if a temperature varies. The charge pump circuit has a structure in which a voltage corresponding to a voltage which is dropped by a charge transfer device is generated by a charge transfer device for correction, and... Agent: Bruce L. Adams, Esq Adams & Wilks

20080303586 - Negative voltage generating circuit: An exemplary negative voltage generating circuit includes a voltage input, a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a first capacitor, a second capacitor, a switch controller, and a voltage output. The voltage input is connected to ground via the first switch... Agent: Wei Te Chung Foxconn International, Inc.

20080303587 - Multi-level voltage generator: A multilevel voltage generator includes a first positive voltage generator generating a first output voltage using a first capacitor which receives a reference voltage and is charged to a voltage level corresponding to two times of the reference voltage, a second positive voltage generator generating a second output voltage and... Agent: Cantor Colburn, LLP

20080303588 - Reference voltage generating circuit and constant voltage circuit: A reference voltage generating circuit for producing a predetermined reference voltage at an output node includes a depletion-type n-channel field-effect transistor serving as a first field-effect transistor having one node thereof coupled to a power supply voltage, a second field-effect transistor having one node thereof coupled to another node of... Agent: Cooper & Dunham, LLP

20080303589 - High-order low-pass filter circuit and method: A low-pass filtering circuit and method are disclosed. The circuit includes a low-pass filter with a capacitor, and a multiplier configured to multiply the capacitance of the capacitor by feeding-back a high-frequency signal apparent in an output signal of the low-pass filter to the capacitor.... Agent: Volentine & Whitt PLLC

20080297200 - Methods for eliminating phase distortion in signals: A circuit for reducing phase distortion of a first signal and a second signal is provided, wherein the first and the second signals are complementary. The circuit includes a detecting circuit for detecting a first edge of the first signal and a second edge of the second signal, wherein the... Agent: Slater & Matsil, L.L.P.

20080297201 - Complex switch control system: A complex switch control system including many switches, a switching voltage control circuit and a comparator is provided. The switching voltage control circuit converts an operating voltage into a switching voltage according to the states of the switches. The comparator compares the switching voltage with a reference voltage and outputs... Agent: Rabin & Berdo, PC

20080297202 - Semiconductor integrated circuit and information processing system: In a semiconductor integrated circuit, a counter counts the number of high-speed clock signals that have been generated in a predetermined number of clock cycles of a low-speed clock signal. In synchronization with the low-speed clock signal, the semiconductor integrated circuit compares the counter value and a predetermined value, and... Agent: Mcdermott Will & Emery LLP

20080297203 - Current mirror circuit: A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal connected to the first potential and the one terminal of the... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20080297204 - Semiconductor integrated circuit: In a dynamic flip-flop circuit with a data selection function, for example, when data having an H value is selected using a selection signal, a first node N1 is L, a second node N2 of a second dynamic circuit is H, so that an output signal has an H level.... Agent: Mcdermott Will & Emery LLP

20080297205 - Switch de-bouncing device and method: A switch de-bouncing device includes a majority counter that counts samples generated by a sampler sampling a switch output where a counter value is incremented for each sample indicating a first switch state and decremented for each sample indicating a second switch state of the switch. A controller determines that... Agent: Kyocera Wireless Corp.

20080297206 - Dc offset estimation: A Bluetooth® enhanced data rate receiver (1) has a DC offset estimation circuit (9) comprising a detector (10) for identifying turning points in a demodulated signal and measuring the signal level at these turning points. The detector (10) discards measured levels of maxima that are not sufficiently different to a... Agent: Philips Intellectual Property & Standards

20080297207 - Double data rate transmitter and clock converter circuit thereof: A double data rate (DDR) transmitter and a clock converter circuit are provided. The clock converter circuit includes a first logic circuit and a second logic circuit. The first logic circuit receives a clock signal as a trigger signal, performs a sequential logic operation based on the clock signal, and... Agent: J C Patents, Inc.

20080297208 - Process for dithering a time to digital converter and circuits for performing said process: A process inserts a random noise in a Time to Digital Converter (TDC) designed for calculating the phase error between a first high frequency signal FDCO with respect to a second reference signal, switching at a lower frequency. The process involves: processing of the first signal FDCO by using a... Agent: Seed Intellectual Property Law Group PLLC

20080297209 - Circuits and methods for programmable integer clock division with 50% duty cycle: Circuits and methods and for dividing a frequency of an input signal by an integer divider value. The circuit generally comprises (a) a first frequency divider, including a first plurality of serially connected delay elements receiving the input signal and a first configurable feedback network, (b) a second frequency divider,... Agent: Epson Research And Development Inc Intellectual Property Dept

20080297210 - Clock multiplier and clock generator having the same: A clock multiplier includes a phase-frequency detector, a voltage-current converter, a duty ratio control circuit, a plurality of variable delay cells and an edge combiner. The phase-frequency detector generates control signals. The voltage-current converter converts the control signals to generate first and second current control voltages. The duty ratio control... Agent: F. Chau & Associates, LLC

20080297211 - Operation mode setting apparatus, semiconductor integrated circuit including the same, and method of controlling semiconductor integrated circuit: An operation mode setting apparatus includes an operation mode setting control unit that discriminates the phase of a reference clock from the phase of a feedback clock and generates a locking suspension signal, and an operation mode setting unit that generates a locking completion signal in response to a pulse... Agent: Baker & Mckenzie LLP Patent Department

20080297212 - Start-up circuity for providing a start-up voltage to an application circuit: A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit, the startup circuit comprising an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit having a low voltage terminal; a... Agent: Ostrolenk Faber Gerb & Soffen

20080297213 - Signaling with superimposed clock and data signals: A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20080297214 - Low lock time delay locked loops using time cycle suppressor: A delay locked loop (DLL) architecture includes a time cycle suppressor circuit suitable for use with synchronous integrated circuits containing a clock generator. Utilization of the improved delay locked loop architecture with a time cycle suppressor circuit disclosed herein enables reduction in the lock time of the synchronous circuit.... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080297215 - Method and apparatus for output data synchronization with system clock: A circuit, delay-locked loop, memory device, system and method of synchronizing a clock are described. A circuit generally includes a delay line configured to delay an external clock signal to produce a substantially in-phase output clock signal, a main loop configured to control delay through the delay line, and a... Agent: Trask Britt, P.C./ Micron Technology

20080297216 - Test techniques for a delay-locked loop receiver interface: An integrated circuit includes a variable delay circuit configured to generate at least one delayed clock signal based on a first clock signal and a first control signal. The integrated circuit includes a control circuit configured to generate a count value based on a second input signal and a second... Agent: Zagorin O'brien Graham LLP

20080297217 - Method and apparatus for reducing interference: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or... Agent: Johnson & Associates

20080297218 - Variable capacitance with delay lock loop: An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A tunable circuit having variable capacitance is controlled based on the... Agent: Harness, Dickey & Pierce P.L.C

20080297219 - Equal delay flip-flop based on localized feedback paths: Equal delay flip-flop systems and complementary input complementary output equal delay flip-flop circuits are disclosed. In one embodiment, an equal delay flip-flop system includes a first delay flip-flop for processing a first input, including a first tri-state input driver for driving the first input, a first master latch for sampling... Agent: Wade James Brady Iii Texas Instruments Incorporated

20080297220 - Method of forming a cmos structure having gate insulation films of different thicknesses: The semiconductor integrated circuit device employs on the same silicon substrate a plurality of kinds of MOS transistors with different magnitudes of tunnel current flowing either between the source and gate or between the drain and gate thereof. These MOS transistors include tunnel-current increased MOS transistors at least one of... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080297221 - Delay circuit and delay time adjustment method: A delay circuit includes an interface for giving a command of setting a delay time and a delay device that can be set to any desired delay time, and the delay time of the delay device is set according to a command from the interface.... Agent: Rankin, Hill & Clark LLP

20080297222 - Waveform generation apparatus, setup cycle correction method and semiconductor test apparatus: Cycle data that is set by a pattern generator 10 in a waveform generation apparatus (a semiconductor test apparatus) 1 is corrected in such a manner that spurious noise that occurs in a carrier of a high-precision variable clock is produced at a position far from the carrier. As a... Agent: Muramatsu & Associates

20080297223 - Level shift circuit with improved dv/dt sensing and noise blocking: A level shift circuit in accordance with the present application seeks to meet the need of high voltage level shift signaling with minimum delay and power dissipation by using parasitic emulation, blocking of signaling during times of common mode noise, and mismatch filtering to enhance operation robustness to circuit mismatch... Agent: Ostrolenk Faber Gerb & Soffen

20080297224 - Minimizing static current consumption while providing higher-swing output signals when components of an integrated circuit are fabricated using a lower-voltage process: An aspect of the present invention minimizes static current consumption in an output block which receives a lower strength input signal and drives a corresponding output signal with a higher strength. Such a feature may be obtained while ensuring that no closed path exists between a first and second reference... Agent: Texas Instruments Incorporated

20080297225 - Logarithmic amplifier: A logarithmic amplifier is configured to produce a logarithmic output signal that is an logarithmic function of an input signal. The amplifier comprises a reference signal, first and second function generators, and a low-pass filter. The first function generator is configured to produce a periodic exponential waveform from the reference... Agent: Honeywell International Inc.

20080297226 - Enhanced output impedance compensation: A compensation circuit for compensating an output impedance of at least a first MOS device over PVT variations to which the first MOS device may be subjected includes a first current source generating a first current having a value which is substantially constant and a second current source generating a... Agent: Ryan, Mason & Lewis, LLP

20080297227 - Integrated circuit system for analog switching: An integrated circuit system comprising: forming an analog switch including: providing a current source for driving the analog switch, coupling a first source follower to the current source for forming a first input to the analog switch, coupling a second source follower to the current source for forming a second... Agent: Law Offices Of Mikio Ishimaru

20080297228 - Temperature sensing circuit and method using dll: A temperature sensing circuit using a delay locked loop and a temperature sensing method. The temperature sensing circuit includes a locked delay unit for receiving an external clock and generating a locked delay pulse keeping a constant delay amount regardless of temperature. A variable delay unit may have a chain... Agent: Marger Johnson & Mccollom, P.C.

20080297229 - Low power cmos voltage reference circuits: A CMOS voltage reference circuit for a low voltage (1v), low power supply application is described. The circuit achieves a temperature coefficient of 31 ppm for a relatively large temperature range of −40 C to 125 C. A combination of subthreshold current characteristics and moderate inversion operation of MOSFET's are... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080297230 - Interfacing at low temperature using cmos technology: This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, but not exclusively, to the 4.2 K region. Ultra-low temperatures here refers to the sub-1 K range,... Agent: Wood, Phillips, Katz, Clark & Mortimer

20080297232 - Charge pump circuit and slice level control circuit: The invention provides a charge pump circuit which reduces rise time of an output current even when an input signal is of high frequency. PMOS1 and PMOS2 have gates connected to each other, and the gate of the PMOS1 is connected to the drain thereof. A supply potential (Vdd) is... Agent: Morrison & Foerster LLP

20080297231 - Monitoring the temperature dependence of the external capacitors of a charge pump and improved charge pumps based thereon: Apparatus (40) comprising a multistage charge pump (10) having an output (41) for connecting a load (Cout, KL). The charge pump (10) comprises m gain stages for charging and discharging m external stage capacitors (C) in order to provide an output voltage (Vout) at the output (41) that is about... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080297233 - Semiconductor integrated circuit: A semiconductor integrated circuit having an internal circuit group, which includes at least one internal circuit, includes a plurality of process monitoring circuits, each of which is disposed at a different location in the internal circuit group, each of the process monitoring circuits, which is operated in response to a... Agent: Junichi Mimura Oki America Inc.

20080297234 - Current mirror bias trimming technique: A reference current is generated by a current mirror circuit. An operational amplifier of a feedback circuit generates a control voltage for control of the feedback circuit transistor. The size of the feedback circuit transistor is trimmed, and the current through the feedback circuit transistor remains relatively constant via operation... Agent: Knobbe Martens Olson & Bear LLP

20080297235 - Method for controlling an output voltage and voltage controller: A voltage controller for controlling an output voltage to a predetermined value. The voltage controller has a first terminal configured to connect a supply voltage, a second terminal configured to output the output voltage, a control voltage generating unit configured to provide a control voltage, and a control transistor. The... Agent: Dickstein Shapiro LLP

20080297236 - Semiconductor storage device and semiconductor integrated circuit: A semiconductor storage device according to the present invention, comprising: a first semiconductor layer formed on a substrate via a buried insulation layer; an FBC (Floating Body Cell) having a channel body of floating type formed on the first semiconductor layer, a main gate which forms a channel at a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080297238 - Current source circuit: A current source circuit is provided. The circuit includes a first transistor and at least one second transistor. A first source/drain terminal of the first transistor is coupled to a bias voltage. A second source/drain terminal of the first transistor is used to receive a current signal, and the second... Agent: Jianq Chyun Intellectual Property Office

20080297237 - Method for compensation of process-induced performance variation in a mosfet integrated circuit: An automated method for compensating for process-induced variations in threshold voltage and drive current in a MOSFET integrated circuit. The method's first step is selecting a transistor for analysis from the array. The method loops among the transistors of the array as desired. Next the design of the selected transistor... Agent: Synopsys, Inc. C/o Haynes Beffel & Wolfeld LLP

20080297239 - Optimized gain filtering technique with noise shaping: A noise shaping and voltage gain filtering third order electrical circuit and method comprises at least one pair of input resistors; a Frequency Dependent Negative Resistance (FDNR) filter positioned in between the at least one pair of input resistors; a feedback resistor; and an amplifier operatively connected to the feedback... Agent: Gibb & Rahman, LLC

20080297240 - Filter circuit and semiconductor device: A filter circuit includes a low-pass filter and a calibration circuit calibrating a frequency characteristic of the low-pass filter. The calibration circuit includes a negative feedback circuit and a control circuit.... Agent: Arent Fox LLP

20080297241 - Application-specific integrated circuit with automatic time-constant matching: f

20080297242 - Integrated circuit having a multi-purpose node configured to receive a threshold voltage and to provide a fault signal: An integrated circuit includes a monitor node adapted to receive a monitored signal. The integrated circuit also includes a multi-purpose node. The integrated circuit is adapted to receive and store a threshold presented at the multi-purpose node during a first time period. The integrated circuit is also adapted to output... Agent: Daly, Crowley, Mofford & Durkee, LLP