Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 10/08

20080258776 - Analog signal transmission circuit: An analog signal transmission circuit includes a sampling switch supplied with an analog signal, a capacitor connected between an output side terminal of the sampling switch and a low-potential power supply, and a differential amplifier connected to an output side terminal of the sampling switch. The circuit samples the analog... Agent: Osha Liang L.L.P.

20080258777 - Method and apparatus for generating multiple analog signals using a single microcontroller output pin: A method and apparatus are disclosed for generating multiple separate analog signals using a single microcontroller output pin. The microcontroller generates a waveform that is used to concurrently generate multiple separate analog signals. The microcontroller outputs a waveform that includes a first signal from one of the microcontroller's output pins.... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080258778 - Current mirror circuit: m

20080258779 - Semiconductor integrated circuit: A semiconductor integrated circuit, has a current source having one end connected to a power supply and outputting a reference current; a first MOS transistor having one end connected to an other end of the current source and being diode-connected; a second MOS transistor having a gate connected to a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080258780 - Frequency divider: A frequency divider using a clock source with a plurality of phase signals of a multi-phase oscillator. In one version, the divider includes a plurality of spot-moving stages that are connected to form a ring. Spot-moving stages are stages that advance a one or a zero, while clearing the previous... Agent: Dechert LLP

20080258781 - Multi-bit programmable frequency divider: A multi-bit, programmable, modular digital frequency divider divides an input frequency by an m-bit integer divisor to produce an output frequency. The integer divisor re-initializes m-number of flip-flop stages with the divisor input at the end of every output clock. Each divisor bit is gated to a D-input through a... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080258782 - Oscillating divider topology: An oscillator includes a first circuit that asynchronously generates an oscillating signal in response to a second circuit of the oscillator acknowledging each cycle of the oscillating signal.... Agent: Trop Pruner & Hu, PC

20080258783 - Broadband low noise complex frequency multipliers: A frequency multiplier device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers,... Agent: Motorola, Inc. Law Department

20080258784 - Controller ic, dc-ac conversion apparatus, and parallel running system of dc-ac conversion apparatuses: A DC power source voltage is supplied to a center tap of a primary winding, and first and second semiconductor switches alternately turned on are disposed between each of both ends of the primary winding and a common potential point, and a current flowing through a load is fed back... Agent: Morgan Lewis & Bockius LLP

20080258785 - Periodic signal synchronization apparatus, systems, and methods: Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a phase difference between the output signal and the input signal, and to adjust a phase of the output signal based on the samples of... Agent: Schwegman, Lundberg & Woessner, P.A.

20080258786 - Clock regeneration circuit: A clock regeneration circuit includes a half-bit delay device that outputs a half-bit delayed signal B of a multi-level input signal A, a one-bit delay device that outputs a one-bit delayed signal C of the signal A, an adder, an attenuator that forms an threshold signal, an XOR circuit, and... Agent: Rabin & Berdo, PC

20080258787 - Power supply controller: A parallel circuit 27 of a frequency control circuit 11 is provided as an external circuit. Thereby, the charging time t1 depends on the characteristics of the circuit elements, which are provided in the package of a semiconductor device 70 and therefore subject to manufacturing variations of the semiconductor device... Agent: Oliff & Berridge, PLC

20080258788 - Dynamic dual output latch: A dynamic latch includes a first stage for receiving an input data value and for providing true and complement logic values representing the input data value; a second stage for receiving the true and complement logic values into first and second dynamic node, when a control signal is active; and... Agent: Brooks Kushman P.C. / Sun / Stk

20080258789 - Flip-flop and semiconductor integrated circuit: A flip-flop is disclosed which includes: a clock supply circuit configured to output or fix a clock signal alternating between two predetermined states in accordance with a sleep signal; a first holding circuit configured to fetch or hold an input signal in accordance with a state the clock signal indicates;... Agent: Rader Fishman & Grauer PLLC

20080258790 - Systems and devices for sub-threshold data capture: Various systems and methods for capturing data are disclosed. For example, some embodiments of the present invention provide differential jam latches. Such differential jam latches include a data input, a latch input, and an output. Further, such differential jam latches include a PMOS stage and an NMOS stage. The PMOS... Agent: Texas Instruments Incorporated

20080258791 - Direct digital synthesizer with variable reference for improved spurious performance: Improvement of quantization errors that arise in a delay line with finite resolution. A direct digital synthesizer (DDS), which contains a numerically controlled oscillator (NCO) and a digital-to-phase converter (DPC), is placed in the feedback loop of a phase locked loop (PLL). The DDS is used as a fractional divider... Agent: Motorola, Inc

20080258792 - Digital single event transient hardened register using adaptive hold: By adjusting a register's capturing clock edge timing so that the register captures data when the data returns to a correct state, the register may be protected against DSET upsets. If a data glitch occurs near the clock edge, the valid time at the register output is increased (CLK to... Agent: Honeywell International Inc.

20080258793 - Clock generating circuit and semiconductor device provided with clock generating circuit: An object is to provide a clock generating circuit that can suppress variation of an oscillation frequency from the clock generating circuit, which is due to a change in the output voltage according to a discharging characteristic of the battery, and effectively utilize the remaining power of the battery. A... Agent: Eric Robinson

20080258794 - Glitch-free clock switching circuit: A glitch-free clock switching circuit receives a first clock signal and a second clock signal and outputs a third clock signal corresponding to the first clock signal or a fourth clock signal corresponding to the second clock signal according to a clock switching signal. The glitch-free clock switching circuit switches... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080258795 - Low power oscillator: A CMOS low frequency oscillator circuit comprising an amplifier (10) and an interface for connecting a first and a second terminal of an external crystal oscillator (14) in a feedback path of the amplifier (10). In one aspect, the oscillator circuit further comprises a regulated current source (24) supplying a... Agent: Texas Instruments Incorporated

20080258796 - Circuit arrangement and method for limiting a signal voltage: The present invention relates to the field of signal processing. It is an object of the invention to provide a circuit arrangement (VL) and a method for limiting a signal voltage upstream of a processing stage (A) of a signal processing device, by means of which circuit arrangement and method... Agent: Pearne & Gordon LLP

20080258797 - Non-resistive load driver: Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The... Agent: Stolowitz Ford Cowger, LLP/cypress

20080258798 - Analog level shifter: An analog level shifter is provided, receiving an input voltage to generate an output voltage. In the analog level shifter, a NMOS transistor has a gate coupled to an input node where the input voltage is input. A resistance device comprises a first end coupled to source of the NMOS... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080258799 - High frequency switching circuit: A high frequency switching circuit is disclosed. The high frequency switching circuit is provided with first and second high frequency signal terminals, a control terminal, a field-effect transistor having a drain, a source and a gate. The field-effect transistor is connected between the first and the second high frequency signal... Agent: Amin, Turocy & Calvin, LLP

20080258802 - Adjustable transistor body bias circuitry: An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements... Agent: G. Victor Treyz

20080258801 - Internal voltage generator of semiconductor memory device: An internal voltage generator is capable of supplying a stable internal voltage regardless of an unstable external voltage. The internal voltage includes a first level detecting unit configured to detect a voltage level of the internal voltage and output an output power detecting signal, an oscillating unit configured to produce... Agent: Rabin & Berdo, PC

20080258800 - Voltage converter and semiconductor integrated circuit: There is a need for preventing a MOS transistor from being destroyed due to an inrush current from an input terminal when a boost operation starts from a boost disabling state. During the boost operation, a third MOS transistor (M3) turns off and a fourth MOS transistor (M4) turns on... Agent: Miles & Stockbridge PC

20080258803 - Semiconductor circuit: A pseudo differential circuit is a circuit system taking the advantages of both a CMOS circuit and a differential circuit. However, when process variability and the like are taken into account, a cross point of positive and negative outputs is not constant, thereby increasing a variation in duty of an... Agent: Mcginn Intellectual Property Law Group, PLLC

20080258804 - Numerical band gap: A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage... Agent: Stolowitz Ford Cowger, LLP/cypress

20080258805 - Semiconductor device having internal power supply voltage generation circuit: The composing circuit outputs a lower voltage out of voltages output from the constant voltage generation circuit and the dummy pump circuit as a voltage to the sensing circuit. The sensing circuit compares voltages to generate a pump activation signal for activating the pump circuit. Since when an external power... Agent: Mcdermott Will & Emery LLP

20080258806 - Phase-locked loop based controller for adjusting an adaptive continuous-time filter: A direct conversion radio-frequency (RF) receiver includes a controller and an adaptive continuous-time filter. The adaptive continuous-time filter receives a multiple-bit control signal generated by the controller to adjust a characteristic of the continuous-time filter. The controller generates the multiple-bit control signal in response to process variation in the semiconductor... Agent: Smith Frohwein Tempel Greenlee Blaha, LLC

20080258807 - Basic semiconductor electronic circuit with reduced sensitivity to process variations: A basic electronic circuit generates a magnitude. The circuit has certain structural characteristics and the magnitude undergoes variations in function of the structural characteristics of the circuit. The circuit comprises at least two circuit parts suitable for supplying respective fractions of the magnitude and the at least two circuit parts... Agent: Seed Intellectual Property Law Group PLLC

20080258808 - Circuit to optimize charging of bootstrap capacitor with bootstrap diode emulator: A circuit for optimizing charging of a bootstrap capacitor connected to a high side floating supply voltage at a first terminal and to a switched node voltage at a second terminal, the circuit for optimizing being included in a gate driver circuit having high- and low-side driver circuits for driving... Agent: Ostrolenk Faber Gerb & Soffen

20080258776 - Analog signal transmission circuit: An analog signal transmission circuit includes a sampling switch supplied with an analog signal, a capacitor connected between an output side terminal of the sampling switch and a low-potential power supply, and a differential amplifier connected to an output side terminal of the sampling switch. The circuit samples the analog... Agent: Osha Liang L.L.P.

20080258777 - Method and apparatus for generating multiple analog signals using a single microcontroller output pin: A method and apparatus are disclosed for generating multiple separate analog signals using a single microcontroller output pin. The microcontroller generates a waveform that is used to concurrently generate multiple separate analog signals. The microcontroller outputs a waveform that includes a first signal from one of the microcontroller's output pins.... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080258778 - Current mirror circuit: m

20080258779 - Semiconductor integrated circuit: A semiconductor integrated circuit, has a current source having one end connected to a power supply and outputting a reference current; a first MOS transistor having one end connected to an other end of the current source and being diode-connected; a second MOS transistor having a gate connected to a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080258780 - Frequency divider: A frequency divider using a clock source with a plurality of phase signals of a multi-phase oscillator. In one version, the divider includes a plurality of spot-moving stages that are connected to form a ring. Spot-moving stages are stages that advance a one or a zero, while clearing the previous... Agent: Dechert LLP

20080258781 - Multi-bit programmable frequency divider: A multi-bit, programmable, modular digital frequency divider divides an input frequency by an m-bit integer divisor to produce an output frequency. The integer divisor re-initializes m-number of flip-flop stages with the divisor input at the end of every output clock. Each divisor bit is gated to a D-input through a... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080258782 - Oscillating divider topology: An oscillator includes a first circuit that asynchronously generates an oscillating signal in response to a second circuit of the oscillator acknowledging each cycle of the oscillating signal.... Agent: Trop Pruner & Hu, PC

20080258783 - Broadband low noise complex frequency multipliers: A frequency multiplier device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers,... Agent: Motorola, Inc. Law Department

20080258784 - Controller ic, dc-ac conversion apparatus, and parallel running system of dc-ac conversion apparatuses: A DC power source voltage is supplied to a center tap of a primary winding, and first and second semiconductor switches alternately turned on are disposed between each of both ends of the primary winding and a common potential point, and a current flowing through a load is fed back... Agent: Morgan Lewis & Bockius LLP

20080258785 - Periodic signal synchronization apparatus, systems, and methods: Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a phase difference between the output signal and the input signal, and to adjust a phase of the output signal based on the samples of... Agent: Schwegman, Lundberg & Woessner, P.A.

20080258786 - Clock regeneration circuit: A clock regeneration circuit includes a half-bit delay device that outputs a half-bit delayed signal B of a multi-level input signal A, a one-bit delay device that outputs a one-bit delayed signal C of the signal A, an adder, an attenuator that forms an threshold signal, an XOR circuit, and... Agent: Rabin & Berdo, PC

20080258787 - Power supply controller: A parallel circuit 27 of a frequency control circuit 11 is provided as an external circuit. Thereby, the charging time t1 depends on the characteristics of the circuit elements, which are provided in the package of a semiconductor device 70 and therefore subject to manufacturing variations of the semiconductor device... Agent: Oliff & Berridge, PLC

20080258788 - Dynamic dual output latch: A dynamic latch includes a first stage for receiving an input data value and for providing true and complement logic values representing the input data value; a second stage for receiving the true and complement logic values into first and second dynamic node, when a control signal is active; and... Agent: Brooks Kushman P.C. / Sun / Stk

20080258789 - Flip-flop and semiconductor integrated circuit: A flip-flop is disclosed which includes: a clock supply circuit configured to output or fix a clock signal alternating between two predetermined states in accordance with a sleep signal; a first holding circuit configured to fetch or hold an input signal in accordance with a state the clock signal indicates;... Agent: Rader Fishman & Grauer PLLC

20080258790 - Systems and devices for sub-threshold data capture: Various systems and methods for capturing data are disclosed. For example, some embodiments of the present invention provide differential jam latches. Such differential jam latches include a data input, a latch input, and an output. Further, such differential jam latches include a PMOS stage and an NMOS stage. The PMOS... Agent: Texas Instruments Incorporated

20080258791 - Direct digital synthesizer with variable reference for improved spurious performance: Improvement of quantization errors that arise in a delay line with finite resolution. A direct digital synthesizer (DDS), which contains a numerically controlled oscillator (NCO) and a digital-to-phase converter (DPC), is placed in the feedback loop of a phase locked loop (PLL). The DDS is used as a fractional divider... Agent: Motorola, Inc

20080258792 - Digital single event transient hardened register using adaptive hold: By adjusting a register's capturing clock edge timing so that the register captures data when the data returns to a correct state, the register may be protected against DSET upsets. If a data glitch occurs near the clock edge, the valid time at the register output is increased (CLK to... Agent: Honeywell International Inc.

20080258793 - Clock generating circuit and semiconductor device provided with clock generating circuit: An object is to provide a clock generating circuit that can suppress variation of an oscillation frequency from the clock generating circuit, which is due to a change in the output voltage according to a discharging characteristic of the battery, and effectively utilize the remaining power of the battery. A... Agent: Eric Robinson

20080258794 - Glitch-free clock switching circuit: A glitch-free clock switching circuit receives a first clock signal and a second clock signal and outputs a third clock signal corresponding to the first clock signal or a fourth clock signal corresponding to the second clock signal according to a clock switching signal. The glitch-free clock switching circuit switches... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080258795 - Low power oscillator: A CMOS low frequency oscillator circuit comprising an amplifier (10) and an interface for connecting a first and a second terminal of an external crystal oscillator (14) in a feedback path of the amplifier (10). In one aspect, the oscillator circuit further comprises a regulated current source (24) supplying a... Agent: Texas Instruments Incorporated

20080258796 - Circuit arrangement and method for limiting a signal voltage: The present invention relates to the field of signal processing. It is an object of the invention to provide a circuit arrangement (VL) and a method for limiting a signal voltage upstream of a processing stage (A) of a signal processing device, by means of which circuit arrangement and method... Agent: Pearne & Gordon LLP

20080258797 - Non-resistive load driver: Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The... Agent: Stolowitz Ford Cowger, LLP/cypress

20080258798 - Analog level shifter: An analog level shifter is provided, receiving an input voltage to generate an output voltage. In the analog level shifter, a NMOS transistor has a gate coupled to an input node where the input voltage is input. A resistance device comprises a first end coupled to source of the NMOS... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080258799 - High frequency switching circuit: A high frequency switching circuit is disclosed. The high frequency switching circuit is provided with first and second high frequency signal terminals, a control terminal, a field-effect transistor having a drain, a source and a gate. The field-effect transistor is connected between the first and the second high frequency signal... Agent: Amin, Turocy & Calvin, LLP

20080258802 - Adjustable transistor body bias circuitry: An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements... Agent: G. Victor Treyz

20080258801 - Internal voltage generator of semiconductor memory device: An internal voltage generator is capable of supplying a stable internal voltage regardless of an unstable external voltage. The internal voltage includes a first level detecting unit configured to detect a voltage level of the internal voltage and output an output power detecting signal, an oscillating unit configured to produce... Agent: Rabin & Berdo, PC

20080258800 - Voltage converter and semiconductor integrated circuit: There is a need for preventing a MOS transistor from being destroyed due to an inrush current from an input terminal when a boost operation starts from a boost disabling state. During the boost operation, a third MOS transistor (M3) turns off and a fourth MOS transistor (M4) turns on... Agent: Miles & Stockbridge PC

20080258803 - Semiconductor circuit: A pseudo differential circuit is a circuit system taking the advantages of both a CMOS circuit and a differential circuit. However, when process variability and the like are taken into account, a cross point of positive and negative outputs is not constant, thereby increasing a variation in duty of an... Agent: Mcginn Intellectual Property Law Group, PLLC

20080258804 - Numerical band gap: A system includes a bandgap temperature sensor to generate multiple base-emitter voltages. The system also include a controller to detect the base-emitter voltages generated by the bandgap temperature sensor and to generate a bandgap reference voltage according to the multiple base-emitter voltage signals, the bandgap reference voltage having a voltage... Agent: Stolowitz Ford Cowger, LLP/cypress

20080258805 - Semiconductor device having internal power supply voltage generation circuit: The composing circuit outputs a lower voltage out of voltages output from the constant voltage generation circuit and the dummy pump circuit as a voltage to the sensing circuit. The sensing circuit compares voltages to generate a pump activation signal for activating the pump circuit. Since when an external power... Agent: Mcdermott Will & Emery LLP

20080258806 - Phase-locked loop based controller for adjusting an adaptive continuous-time filter: A direct conversion radio-frequency (RF) receiver includes a controller and an adaptive continuous-time filter. The adaptive continuous-time filter receives a multiple-bit control signal generated by the controller to adjust a characteristic of the continuous-time filter. The controller generates the multiple-bit control signal in response to process variation in the semiconductor... Agent: Smith Frohwein Tempel Greenlee Blaha, LLC

20080258807 - Basic semiconductor electronic circuit with reduced sensitivity to process variations: A basic electronic circuit generates a magnitude. The circuit has certain structural characteristics and the magnitude undergoes variations in function of the structural characteristics of the circuit. The circuit comprises at least two circuit parts suitable for supplying respective fractions of the magnitude and the at least two circuit parts... Agent: Seed Intellectual Property Law Group PLLC

20080258808 - Circuit to optimize charging of bootstrap capacitor with bootstrap diode emulator: A circuit for optimizing charging of a bootstrap capacitor connected to a high side floating supply voltage at a first terminal and to a switched node voltage at a second terminal, the circuit for optimizing being included in a gate driver circuit having high- and low-side driver circuits for driving... Agent: Ostrolenk Faber Gerb & Soffen

20080252336 - Non-contacting interrogation of system states: A device for non-contacting interrogation, without auxiliary power, of system states of a part that is rotatable relative to a fixed part comprises a coil on the rotatable part and a coil on the fixed part. The coils are mutually coupled, one being fed by a signal generator generating different... Agent: Daffer Mcdaniel LLP

20080252337 - Receiver signal strength indicator: A system and method are provided for measuring the amplitude of a received signal. The method receives an analog input signal, and compares a peak value of the analog input signal to a threshold level. Threshold transition data is generated, and the threshold level is adjusted in response to the... Agent: Gerald W. Maliszewski

20080252338 - Single threshold and single conductivity type amplifier/buffer: An amplifier/buffer composed from circuit elements of a single threshold and single conductivity type, comprising an input stage for receiving one or more inputs for buffering/amplification and providing an intermediate to control output of the amplifier/buffer. The intermediate signal is provided to a boosting circuit configured to boosts said signal... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080252339 - Method and apparatus for generating synchronous clock signals from a common clock signal: A method and system for generating multiple clock signals from a reference clock signal are provided. In one implementation, the system includes a reference clock to generate a reference clock signal having a first frequency, a first prescaler to receive the reference clock signal and generate a first output clock... Agent: Schwegman, Lundberg & Woessner / Atmel

20080252340 - Delay locked loop (dll) circuits having an expanded operation range and methods of operating the same: Delay locked loop (DLL) circuits have a phase detector circuit that can detect a phase difference between an input clock signal and an output clock signal over a time period of 0T-2T. The delay applied to generate the output signal is adjusted based on the detected phase difference. A middle... Agent: Myers Bigel Sibley & Sajovec

20080252342 - Charge pump for pll/dll: A charge pump for use in a Phase Locked Loop/Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage.... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20080252341 - Clock signal distribution circuit and interface apparatus using the same: A clock signal distribution circuit comprises a voltage control and distribution circuit configured to change a delay of a received clock signal in response to a control voltage and to generate a distributed clock signal, and control voltage generation circuit configured to generate the control voltage using a phase difference... Agent: Baker & Mckenzie LLP Patent Department

20080252343 - Dll circuit: A DLL circuit has an input circuit configured to generate a synchronization reference signal on the basis of an input signal, a first delay unit configured to delay the synchronization reference signal, a timing offset circuit configured to adjust a synchronization position of the synchronization reference signal delayed by the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080252344 - Timing vernier using a delay locked loop: A method for synchronizing a plurality of programmable timing verniers with a reference pulse signal, each of the verniers being programmable to one of a plurality of timing steps within a delay range determined by a control signal applied to a bias input. A first and second control vernier is... Agent: Borden Ladner Gervais LLP Anne Kinsman

20080252346 - Circuit having a clock signal synchronizing device with capability to filter clock-jitter: A circuit having a clock signal synchronizing device with capability to filter clock-jitters is disclosed. One embodiment provides a delayed locked loop with capability to filter clock-jitter. Further, the invention relates to a clock signal synchronizing method with capability to filter clock-jitter.... Agent: Dicke, Billig & Czaja

20080252347 - Device for detecting a timing of an edge: A device and method for detecting timing of an edge of a signal with respect to a timing of a predefined edge of a periodic signal is provided, wherein the edge defines a state change between a first state and a second state of the signal, and wherein the device... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20080252345 - System and method for generating a reset signal: Systems and methods are provided to generate a reset signal, such as to facilitate synchronization. In one embodiment, a system to generate a reset signal includes an offset generator that provides an offset clock signal having a frequency offset relative to a frequency of an input clock signal. A reset... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P.

20080252348 - Apparatus and method for high speed signals on a printed circuit board: In some embodiments, an apparatus includes a printed circuit board substrate, a copper signal line disposed on the printed circuit board substrate, and a nonlinear transmission structure coupled to the copper signal line, wherein the nonlinear transmission structure is configured to sharpen a wavefront of a high speed signal pulse... Agent: Intel Corporation C/o Intellevate, LLC

20080252350 - Circuit and method for correcting duty cycle: A circuit for correcting a duty cycle includes a duty ratio digital conversion block configured to output duty ratio information of an input clock signal as plural-bit digital signals, a duty ratio information analyzing block configured to analyze the duty ratio information of the input clock signal, generate edge control... Agent: Baker & Mckenzie LLP Patent Department

20080252349 - Duty cycle correcting circuit: A duty cycle correcting circuit includes a duty ratio control signal generating block that detects a duty ratio of input clock signals and generates a duty ratio control signal comprising a plurality of bits, a power supply block that supplies a voltage to output nodes, and a signal processing block... Agent: Baker & Mckenzie LLP Patent Department

20080252351 - Generating a pulse signal with a modulated duty cycle: Generating an output pulse signal (Y), which has an output signal period (Ty), which is divided by a magnitude transition into a leading part (LP) and a trailing part (TP). During each output signal period (Ty) altering means (27 to 36) determine in a coarse and fine way a duration... Agent: Philips Intellectual Property & Standards

20080252352 - System and method for using a dll for signal timing control in an edram: The present invention discloses an embedded dynamic random access memory (eDRAM) comprising a clock signal, at least one delay-locked loop (DLL) circuit coupled to the clock signal and configured to generate a plurality of control signals each having a predetermined delay from the clock signal, and at least one DRAM... Agent: K & L Gates LLP

20080252353 - Voltage measuring apparatus for semiconductor integrated circuit and voltage measuring system having the same: A voltage measuring apparatus for a semiconductor integrated circuit includes a first delay unit configured to delay a reference clock in a first region, a second delay unit configured to delay the reference clock in a second region and an analysis unit configured to analyze a difference in voltage level... Agent: Baker & Mckenzie LLP Patent Department

20080252354 - Output circuit: An output circuit includes an output block and a predrive block for driving the output block based on an input signal. The predrive block has a clamp unit connected between the gate terminal of a first output transistor and the gate terminal of a second output transistor to limit the... Agent: Mcdermott Will & Emery LLP

20080252355 - Super-symmetric multiplier: A circuit includes a multi-tanh cell having a common-emitter node to receive a bias current, and an extra transistor coupled to the common-emitter node to dynamically divert a portion of the bias current from the multi-tanh cell. The circuit may be arranged as a multiplier with an input network arranged... Agent: Marger Johnson & Mccollom, P.C.

20080252356 - Semiconductor device: A semiconductor device is provided which has a driving circuit operable to drive a circuit that has a delay, the semiconductor device including: an auxiliary driving circuit operable to accelerate drive of the driving circuit, which receives a drive signal of the driving circuit as an input signal.... Agent: David R. Metzger Sonnenschein Nath & Rosenthal LLP

20080252357 - Device select system for multi-device electronic system: A device select system according to one embodiment includes an array of first electrical contacts adapted for coupling to a cable; an array of second electrical contacts adapted for coupling to an array of transducers, there being more second electrical contacts than first electrical contacts each of the first electrical... Agent: Zilka-kotab, PC- Ibm

20080252358 - Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits: A low charge injection, low clock feed-through switch (1) has an input signal (Vin) applied both to the sources of first (S1) and second (2) switching transistors. A first clock signal (P) having pulses of a first duration ts is applied to a gate of the first switching transistor, and... Agent: Texas Instruments Incorporated

20080252359 - Switch control circuit for external hard disk: A switch control circuit includes a N-channel MOSFET, a first bleeder unit, a P-channel MOSFET and a second bleeder unit. The N-channel MOSFET has a first input terminal, a first output terminal and a first control terminal. The first output terminal is connected to ground. The first bleeder unit has... Agent: Wpat, PC Intellectual Property Attorneys

20080252360 - Temperature detector circuit and oscillation frequency compensation device using the same: A temperature detector circuit using a MOS transistor capable of reducing manufacture variation of a mobility and realizing stable output characteristics which are not affected by temperature dependency may be offered. In one example, the temperature detector circuit includes a pair of depression type transistors to output a voltage which... Agent: Dickstein Shapiro LLP

20080252361 - Electrical fuses with redundancy: The present disclosure provides an electrical fuse cell with redundancy features and the method for operating the same. The fuse cell includes a first set of electrical fuses having at least one electrical fuse contained therein, and a second set of electrical fuses having at least one electrical fuse for... Agent: Duane Morris LLPIPDepartment (tsmc)

20080252362 - Negative voltage converter: A negative voltage converter includes six transistors. A first end and a control end of a first transistor are coupled to a signal input. A first end of a second transistor is coupled to the signal input, and a control end of which is coupled to a first clock and... Agent: Madson & Austin

20080252363 - Semiconductor device and electronic appliance using the same: A semiconductor device with less power consumption and an electronic appliance using the same. The semiconductor device of the invention is supplied with a first potential from a high potential power source and a second potential from a low potential power source. Upon input of a first signal to an... Agent: Eric Robinson

20080252364 - Reference voltage generator for analog-to-digital converter circuit: To mitigate kickback noise effect, the present invention provides a reference voltage generator for an analog-to-digital converter circuit. The reference voltage generator includes a bias generator, a bias converter and an output unit. The bias generator is used for generating a first bias voltage in accordance with a reference voltage.... Agent: North America Intellectual Property Corporation

20080252365 - Apparatus and method for tuning center frequency of a filter: A method for tuning a filter is provided. The method includes: enabling a VCO circuit, wherein at least a portion of the VCO circuit is selected from the filter; generating an oscillation signal by the VCO circuit according to a driving signal; comparing the oscillation signal with a reference signal... Agent: North America Intellectual Property Corporation

20080252366 - Active lc band pass filter: An active LC band pass filter 10 includes a single LC pair and a plurality of active amplifiers providing a number of separate resonance circuits. The active amplifiers compensate ohmic losses, high frequency skin effects, and high frequency radiation. Each circuit has a resonance frequency that is adjustable by changing... Agent: Sheldon Mak Rose & Anderson PC

20080246515 - System to reduce programmable range specifications for a given target accuracy in calibrated electronic circuits: An apparatus comprising a comparator circuit, a reference circuit, a plurality of elements and a logic circuit. The comparator circuit may be configured to generate a difference signal in response to (i) a reference signal and (ii) a test signal. The reference circuit configured to generate the reference signal in... Agent: Christopher P Maiorana, PC Lsi Corporation

20080246516 - Phase frequency detectors generating minimum pulse widths: A phase frequency detector compares a reference clock signal to a feedback clock signal to generate pulses in one or more output signals. The one or more output signals have a minimum pulse width. The phase frequency detector has a temperature sensing circuit. The phase frequency detector adjusts the minimum... Agent: Steven J. Cahill/ Altera Corp.

20080246517 - Sample and hold circuits: The voltage produced by an input current (in) is sampled (S1, S2, S3) and stored on the gate (46) of a Fet (T1). The stored gate voltage allows the FET to function as the reference current source of a current mirror (T2, T3) which generates an output current (iout) proportional... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20080246518 - Method for driving a transistor half-bridge: e

20080246519 - Gate drive circuit: A gate drive circuit including dead time control circuits delaying on periods of switching elements S1, S2 based on a control signal; driving circuits; and monitor circuits. Each of the monitor circuits includes a current source and an N-type FET in which the source is connected to the gate of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080246520 - Delay-locked loop (dll) system for determining forward clock path delay: A delayed locked loop (DLL) system and method for determining a forward clock path delay are disclosed. One embodiment of the DLL system includes a delay line having a plurality of delay stages. The DLL system also includes a measure shot device configured to determine a forward clock path delay... Agent: Knobbe Martens Olson & Bear LLP

20080246521 - Multiple reference frequency fractional-n pll (phase locked loop): A system and a method for operating the same. The system includes a fractional-N phase-locked loop (PLL). The PLL includes a PLL input and a PLL output. The fractional-N PLL further includes a multiplexer. The multiplexer includes a multiplexer output electrically coupled to the PLL input. The multiplexer further includes... Agent: Schmeiser, Olsen & Watts

20080246522 - Phase locked loop and method for adjusting the frequency and phase in the phase locked loop: A phase locked loop (PLL) which includes a phase frequency detector coupled with a time to digital converter capable of comparing a reference signal with an oscillator signal and generating a digital value representing the phase difference between the reference signal and the oscillator signal. The PLL further includes a... Agent: Law Office Of Ido Tuchman (yor)

20080246524 - Duty cycle correction circuit whose operation is largely independent of operating voltage and process: A Duty Cycle Correction (DCC) circuit is provide in which pairs of field effect transistors (FETs) in known DCC circuit topologies are replaced with linear resistors coupled to switches of the DCC circuit such that when the switch is open, the input signal is routed through the linear resistors. The... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080246523 - Pulse width modulation wave output circuit: A pulse width modulation (PWM) wave output circuit that efficiently and accurately outputs dual PWM waves includes two comparators, an OR circuit, and an AND circuit. A voltage generator supplies the comparators with ramp voltages having the same wave height and shifted phases. The comparator compares the ramp voltages with... Agent: Freescale Semiconductor, Inc. Law Department

20080246525 - Level-restored for supply-regulated pll: The present disclosure provides for a processor that can include digital processing circuitry that receives a digital clock signal from a supply regulated phase locked loop. The supply regulated phase locked loop can include a voltage controlled oscillator that can output an analog signal and a level restorer that can... Agent: Oliff & Berridge, PLC

20080246526 - Programmable i/o cell capable of holding its state in power-down mode: The present invention comprises a microcontroller unit including a processor for generating a power down signal. Control logic generates a hold signal responsive to the power down signal. A voltage regulator provides a regulated voltage responsive to an input voltage and powers down responsive to the power down signal. At... Agent: Howison & Arnott, L.l.p

20080246527 - Methods and systems for converting a single-ended signal to a differential signal: Methods and systems are described for converting single-ended signals to differential signals. In one exemplary embodiment, an input single-ended signal is received and converted into a differential signal having minimized jitter without using a DC-cancellation loop.... Agent: Perkins Coie LLP

20080246528 - Level shift device: The level shift device of the present invention comprises: a level shift circuit which converts a voltage level of a single input signal; and a duty correcting circuit which offsets a difference in the duty of an output signal of the level shift circuit with respect to the duty of... Agent: Mcdermott Will & Emery LLP

20080246530 - Level shifter: The present invention provides a level shifter that prevents through currents thereat. In the level shifter, a holding circuit is provided which comprises an inverter made up of transistors connected between an internal node and a ground potential and an inverter made up of transistors connected between an internal node... Agent: Volentine & Whitt PLLC

20080246529 - Multi-channel semiconductor integrated circuit: A semiconductor integrated circuit includes a high-side transistor, a low-side transistor, a level shift circuit for driving the high-side transistor, and a pre-driver circuit for driving the low-side transistor. A connection point of the high-side transistor and the low-side transistor serves as an output terminal. The level shift circuit has... Agent: Mcdermott Will & Emery LLP

20080246531 - Semiconductor device, method of switching drive capability of the semiconductor device, and system including semiconductor devices: A semiconductor device connected to other semiconductor device, includes a control portion which controls a drive capability for the other semiconductor device based on control information for the other semiconductor device.... Agent: Mcdermott Will & Emery LLP

20080246532 - Method for control over mechanical resonant system: Systems and methods are provided for automatically driving and maintaining oscillation of an assembly system including a mass and a bias member (which may also be referred to as a spring or elastomeric member) at or near a resonant frequency of the assembly system. In one example, apparatus for maintaining... Agent: Morrison & Foerster LLP

20080246533 - Methods and circuits to reduce threshold voltage tolerance and skew in multi-threshold voltage applications: A circuit and a method for adjusting the performance of an integrated circuit, the circuit includes: first and second sets of FETs having respective first and second threshold voltages, the first threshold voltage different from the second threshold voltage; a first monitor circuit containing at least one FET of the... Agent: Schmeiser, Olsen & Watts

20080246534 - Multi-chip semiconductor device with high withstand voltage, and a fabrication method of the same: A multi-chip semiconductor device includes a substrate, a first semiconductor chip, a second semiconductor chip, and a plastic mold. The first semiconductor chip has a function for executing a predetermined electrical operation and is installed on the substrate. The second semiconductor chip is installed on the first semiconductor chip and... Agent: Cooper & Dunham, LLP

20080246535 - Semiconductor charge pump using mos (metal oxide semiconductor) transistor for current rectifier device: A semiconductor charge pump includes a plurality of P-channel MOS transistors being connected in series, a plurality of first pumping capacitors one electrode of each of which is connected to a connection point of each of the P-channel MOS transistors, a clock signal generating circuit which generates first and second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080246536 - Two-phase charge pump circuit without body effect: A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is... Agent: Bacon & Thomas, PLLC

20080246537 - Programmable discontinuity resistors for reference ladders: A reference ladder having a plurality of embedded, programmable discontinuity resistors for adjusting the output voltages at a plurality of output taps of the ladder. In an embodiment, each discontinuity resistor has a programmable resistance. The reference ladder is factory tested to determine the voltage outputs at a plurality of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080246538 - Negative gm circuit, a filter and low noise amplifier including such a filter: A circuit for synthesising a negative resistance, comprising first and second active devices, the first device having a control terminal connected to a first node, and the second device having a current flow terminal connected to the first node, and the first and second devices interacting with each other such... Agent: Fish & Richardson PC

20080246539 - Capacitor multipler circuits and the applications thereof to attenuate row-wise temporal noise in image sensors: The various embodiments disclose capacitor multiplier circuits that may be integrated into imaging devices, such as for semiconductor Complimentary Metal Oxide Semiconductor (CMOS) image sensors, to create an effective capacitance in response to a low frequency, such as row-wise temporal noise, that may be generated along a row of image... Agent: David J. Paul Micron Technology, Inc.

20080246540 - Semiconductor integrated circuit for voltage detection: A semiconductor integrated circuit includes a semiconductor substrate, one or more wells formed in the semiconductor substrate, one or more diffusion layers formed in the one or more wells, a plurality of interconnects formed in an interconnect layer, the one or more diffusion layers and the plurality of interconnects being... Agent: Arent Fox LLP

20080238487 - Duty cycle comparator: A duty cycle comparator is described for comparing the duty cycles of two digital signals. The duty cycle comparator comprises a first controllable current source, a second controllable current source and a charge accumulation device. The comparator provides an output signal that is representative of the difference between the duty... Agent: Donald J Lenkszus

20080238488 - Methods and apparatus for power monitoring with sequencing and supervision: Methods and apparatus for power monitoring with sequencing and supervision are disclosed. An example method disclosed herein comprises supervising a first power rail and a second power rail, sequencing a first enable signal associated with the first power rail and a second enable signal associated with the second power rail,... Agent: Texas Instruments Incorporated

20080238489 - Fast phase-frequency detector arrangement: The present invention relates to a detector arrangement and a charge pump circuit for a recovery circuit recovering timing information for random data. The detector arrangement comprises first latch means for sampling a quadrature component of a reference signal based on an input signal, to generate a first binary signal,... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080238490 - Semiconductor device and method for driving the same: A semiconductor device includes a control unit for outputting an oscillation enable signal in synchronization with transitions of an input clock and buffering the input clock to output a comparison clock corresponding to an activation timing of the oscillation enable signal. A reference frequency generating unit outputs a reference clock... Agent: Rabin & Berdo, PC

20080238491 - Interface circuit: An interface circuit includes a reference voltage generation circuit to generate a reference voltage, a differential voltage signal generation circuit to convert send data input in sending data into a pair of differential voltage signals and output the pair of differential voltage signals based on the reference voltage generated by... Agent: Mcginn Intellectual Property Law Group, PLLC

20080238492 - Slew-rate detection circuit using switched-capacitor comparators: In general, in one aspect, the disclosure describes an apparatus that includes a first switched capacitor comparator to be charged to a first reference voltage and to compare an input signal to the first reference voltage and to generate a first output signal when the input signal reaches the first... Agent: RyderIPLaw C/o Intellevate, LLC

20080238493 - Analog comparator with precise threshold control: In general, in one aspect, the disclosure describes an apparatus that included a reference generator to receive a differential input signal and generate reference voltages having same common mode as the differential input signal. A replica bias generator is used to generate a bias signal based on the reference voltages.... Agent: RyderIPLaw C/o Intellevate, LLC

20080238495 - Frequency synthesizer and wireless communication device utilizing the same: A frequency synthesizer includes a voltage-controlled oscillator to output an oscillation signal of a oscillating frequency in correspondence with a oscillation controlling voltage that is input to the oscillator, a first frequency-divider to subject the oscillation signal to frequency-division and output a first frequency signal, a second frequency-divider to subject... Agent: Charles N.j. Ruggiero, Esq. Ohlandt , Greeley, Ruggiero & Perle, L.L.P.

20080238494 - Method and apparatus for on-the-fly minimum power state transition: The invention includes a novel scan chain structure for LSSD or GSD IC operation. The scan chain structure includes a first flip-flop (L1) and a second flip-flop (L2) configured to operate the first flip-flop (L1) in normal mode operation, in scan mode operation, in initialization mode and in low leakage... Agent: Scully, Scott, Murphy & Presser, P.C.

20080238496 - Current mode receiver: A current mode receiver is provided. The current mode receiver includes a first current mirror duplicating an input current to output a first output current, a second current mirror duplicating the first output current to output a second output current, a third current mirror duplicating a reference current to output... Agent: Bacon & Thomas, PLLC

20080238497 - Operational amplifier having its compensator capacitance temporarily disabled: An operational amplifier includes a differential amplifier connected between an input and an output port of the operational amplifier, a phase compensator capacitance connected between the differential amplifier and the output port, a switching transistor for controlling the connection between the phase compensator capacitance and the differential amplifier, a detection... Agent: Studebaker & Brackett PC

20080238498 - Clock generator, method for generating clock signal and fractional phase lock loop thereof: A clock generator includes a delta sigma modulator, a counter and a first phase lock loop. The delta sigma modulator sequentially generates a plurality of variable parameters according to a predetermined value and a first input clock signal. The counter, which is connected to the delta sigma modulator, is used... Agent: Connolly Bove Lodge & Hutz LLP

20080238499 - Customizable power-on reset circuit based on critical circuit counterparts: A power-on-reset circuit (POR) for integrated circuits that detects the minimum power levels needed to operate the most critical circuit(s) reliably. The circuit is implemented in a customized POR built into a custom IC, and emulates the critical circuit transistors in the custom IC using mimicking counterparts which are similarly... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20080238501 - Initialization signal generating circuit: An initialization signal generating circuit includes a voltage distributor, a first initialization signal generator, a second initialization signal, and a controller. The voltage distributor outputs a voltage signal in response to an external voltage. The first initialization signal generator outputs a first initialization signal in response to the voltage signal... Agent: Cooper & Dunham, LLP

20080238500 - Power-up signal generating circuit and method for driving the same: A power-up signal generating circuit that prevents repeatedly generating a power-up signal even when there is noise on an external voltage. The power-up signal generating circuit includes a level detector, a level comparator, and a reentry protector. The level detector is configured to deactivate a first level detection signal when... Agent: Mcdermott Will & Emery LLP

20080238502 - Delay cell and phase locked loop using the same: A phase locked loop that generates an internal clock by controlling a delay time of a delay cell according to conditions of PVT, thereby improving a jitter characteristic of the internal clock. The delay cell includes a first current controller for controlling first and second currents in response to a... Agent: Mcdermott Will & Emery LLP

20080238503 - Injection locked lc vco clock deskewing: In general, in one aspect, the disclosure describes an apparatus that includes an inductive capacitive voltage controlled oscillator (LC VCO) to generate an output clock. A voltage to current converter is used to receive a forwarded clock and to inject the forwarded clock to the LC VCO. The output clock... Agent: RyderIPLaw C/o Intellevate, LLC

20080238504 - Phase locked loop: A phase locked loop includes a first clock divider configured to divide a first input clock to generate a second input clock; a clock selector configured to selectively output one of the first input clock and the second input clock in response to a test signal; a phase/frequency detector configured... Agent: Blakely Sokoloff Taylor & Zafman LLP

20080238505 - System and method for an automatic coarse tuning of a voltage controlled oscillator in a phase-locked loop (pll): Circuits and methods for an automatic coarse tuning in a phase locked loop (PLL) include observing a variation in a control voltage to disable a fine loop and to enable a coarse loop as the control voltage departs from a specified range. The circuit includes the fine loop, the coarse... Agent: Graybeal, Jackson, Haley LLP

20080238507 - Semiconductor memory device: A semiconductor memory device includes a phase comparator, a delay chain, a delay controller, a fine delay chain, a delay model, a locking state detector, and a fine delay controller. The phase comparator compares a phase of a reference clock with that of a feedback clock. The delay chain delays... Agent: Mcdermott Will & Emery LLP

20080238506 - Semiconductor memory device using modulation clock signal and method for operating the same: A semiconductor memory device is capable of performing a modulation of output clock signals in order to prevent EMI characteristics of a system having the semiconductor memory device from being degraded. The semiconductor memory device includes a modulation clock signal generator, a clock input unit, a first modulation unit, a... Agent: Rabin & Berdo, PC

20080238508 - Input clock detection circuit for powering down a pll-based system: An apparatus is provided for detecting the loss of an input clock signal for a phase-locked loop (PLL). The apparatus includes a time delay circuit, a first frequency divider and a digital logic circuit. The time delay circuit receives the input clock signal and outputs a first time-delayed clock signal.... Agent: Panitch Schwarze Belisario & Nadel LLP

20080238509 - Bounding a duty cycle using a c-element: A duty cycle bounding circuit for restoring the unbounded duty cycle of a periodic signal such as a forwarded clock signal. The duty cycle bounding circuit comprises a state holding logic element, such as a C-element, and a delay line. The delay line feeds back an inverted version of the... Agent: Sun Microsystems, Inc. C/o Dorsey & Whitney, LLP

20080238511 - Control device with terminal 15 - holding circuit: A terminal state of a terminal 15 of a vehicle is enabled to be maintained for a minimum period of time even after a drop in the voltage supply. At the same time other loads are to have no effect on the holding time. A control device for controls access... Agent: Lerner Greenberg Stemer LLP

20080238510 - Low leakage state retention circuit: In general, in one aspect, the disclosure describes an apparatus comprising a low leakage latch to store a state of a circuit during inactive periods. The state is transferred to the low leakage latch upon receipt of an inactive pulse. A buffer is used to receive the state from an... Agent: RyderIPLaw C/o Intellevate, LLC

20080238512 - Circuit and method for data alignment: A circuit for data alignment includes a first latch unit and a second latch unit. The first latch unit latches serial input data by using a plurality of first clocks with different phases and the same frequency to output latched data. The second latch unit latches the data from the... Agent: Blakely Sokoloff Taylor & Zafman LLP

20080238513 - Hysteresis circuit without static quiescent current: A hysteresis circuit including a comparator and capacitive voltage divider circuit. The capacitive voltage divider circuit includes a first capacitor coupled between an input terminal and a positive comparator input, a second capacitor coupled between ground and the positive comparator input, and a third capacitor coupled between the comparator output... Agent: Bever Hoffman & Harms, LLP 2099 Gateway Place

20080238514 - Level-converted and clock-gated latch and sequential logic circuit having the same: A level-converted and clock-gated latch includes a pulse generator, a level converting unit, and a latch circuit. The pulse generator is provided with a first power-supply voltage and generates a pulse signal having a first voltage level, in response to a clock signal. The level converting unit is provided with... Agent: F. Chau & Associates, LLC

20080238515 - Signal generation apparatus for frequency conversion in communication system: A signal generation apparatus includes a signal generation portion and a phase compensator. The phase compensator generates a phase error control signal that maintains a phase difference between the in-phase and quadrature-phase signals generated by the signal generation portion. The phase compensator includes an offset compensator and a delay compensator.... Agent: Law Office Of Monica H Choi

20080238516 - Timing interpolator with improved linearity: A programmable timing interpolator circuit includes low output impedance buffer circuitry driving a node having a capacitance that varies in response to a programmed delay to be introduced by the interpolator. The low output impedance buffer circuitry receives a subset of course delay signals and, after buffering, provides the buffered... Agent: Teradyne, Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080238517 - Oscillator circuit and semiconductor device: An oscillator circuit includes a capacitance element; an inverter outputting an inverted voltage at a first terminal of the capacitance element; a voltage source including a resistor and an NMOS transistor connected in series between a first high-potential power supply and a ground power supply and outputting a voltage from... Agent: Arent Fox LLP

20080238518 - Process, voltage, and temperature compensated clock generator: According to some embodiments, a process, voltage, and temperature compensated clock generator is disclosed. The clock generator may be a charge-charge clock generator including a first load capacitive element and a second load capacitive element. A process, voltage, and temperature compensated current source is coupled to the charge-charge clock generator,... Agent: Trop, Pruner & Hu, P.C.

20080238519 - Signaling circuit and method for integrated circuit devices and systems: Integrate circuit systems and semiconductor devices for generating, transmitting, receiving, and manipulating clock and/or data signals. A semiconductor device including a clock circuit having field effect transistors and a clock driver circuit having bipolar junction transistors is disclosed. The clock circuit may provide a first clock output having a first... Agent: Darryl G. Walker

20080238520 - Power electronic module including desaturation detection diode: A power electronic module includes: a switch module including a desaturation detection diode and a power semiconductor switch, and wherein the desaturation detection diode is coupled to a switching connection of the power semiconductor switch; and a driver module coupled to the switch module, wherein the driver module is configured... Agent: General Electric Company Global Research

20080238521 - Low differential output voltage circuit: A low differential output voltage circuit having a voltage generator and a differential output unit is provided. The voltage generator includes a first PMOS transistor, a first amplifier circuit, a unit gain stage, a first NMOS transistor, a second NMOS transistor. The differential output unit includes a first controlled current... Agent: Jianq Chyun Intellectual Property Office

20080238525 - High speed level shifter: The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and... Agent: Slater & Matsil LLP

20080238523 - Level shifter circuit incorporating transistor snap-back protection: Level shift circuits are disclosed for level shifting an input signal corresponding to a first voltage domain, to generate a pair of complementary output signals corresponding to a second, higher-voltage domain. Snap-back sensitive devices in a discharge circuit for a high voltage output node are protected, irrespective of the loading... Agent: Zagorin O'brien Graham LLP (023)

20080238524 - Level shifter concept for fast level transient design: A driving circuit is provided by the present invention. The driving circuit includes a level shifter, a buffer and a switch. The switch is coupled between the level shifter and the buffer. While the level shifter is transiting, the switch is turned off, and the switch is turned on after... Agent: J C Patents, Inc.

20080238522 - Method for incorporating transistor snap-back protection in a level shifter circuit: Level shift circuits are disclosed for level shifting an input signal corresponding to a first voltage domain, to generate a pair of complementary output signals corresponding to a second, higher-voltage domain. Snap-back sensitive devices in a discharge circuit for a high voltage output node are protected, irrespective of the loading... Agent: Zagorin O'brien Graham LLP (023)

20080238526 - Fast switching circuit with input hysteresis: The present invention relates to a switching circuit and a method of controlling a threshold voltage of a semiconductor switching element of the switching circuit, wherein a bulk voltage of the semiconductor switching element (Mi) is selected in response to a control signal derived from an output signal of the... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080238527 - Switching device for bi-directionally equalizing charge between energy accumulators and corresponding methods: A switching device for bi-directionally equalizing charge between energy accumulators, particularly between capacitive energy accumulators in a motor vehicle electric system, includes: an integrated starter generator; a first connection coupled to the integrated starter generator; a second connection coupled to an energy source; a controllable transfer gate having a first... Agent: Lerner Greenberg Stemer LLP

20080238528 - Mosfet gate interface: In some embodiments a power circuit includes a driver output, a MOSFET, and circuitry to ensure a full and fast positive drive to a gate of the MOSFET when the driver output goes to a high signal level, and to ensure a full and fast low negative drive to the... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20080238529 - Temperature detection circuit: A PWM signal generation circuit in an IPM includes an amplification circuit amplifying a voltage across terminals of a temperature sensor, a comparison circuit generating a PWM signal based on a triangular wave signal and an output signal of the amplification circuit, and a correction circuit setting an amplification ratio... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080238530 - Semiconductor device generating voltage for temperature compensation: An input transistor unit includes a first transistor having a control electrode to which a reference voltage is supplied. An output transistor unit includes a diode-connected second transistor. At least one of the input transistor unit and the output transistor unit further includes a third transistor that is diode-connected and... Agent: Mcdermott Will & Emery LLP

20080238531 - Systems, devices, and methods for controllably coupling qubits: A coupling system may include an rf-SQUID having a loop of superconducting material interrupted by a compound Josephson junction; and a first magnetic flux inductor configured to selectively provide a mutual inductance coupling the first magnetic flux inductor to the compound Josephson junction, wherein the loop of superconducting material positioned... Agent: Seed Intellectual Property Law Group PLLC

20080238532 - Semiconductor integrated circuit device: With an ultrasound pulser suitable for application to a medical ultrasound system, and so forth, a high voltage power supply of a transducer drive circuitry, on both high potential and low potential sides, is rendered variable in a range of 0 V on the order of ±200 V, thereby implementing... Agent: Miles & Stockbridge PC

20080238533 - Semiconductor device: A semiconductor device capable of stabilizing power supply by suppressing power consumption as much as possible. The semiconductor device of the invention includes a central processing unit having a plurality of units and a control circuit, and an antenna. The control circuit includes a means for outputting, based on a... Agent: Eric Robinson

20080238534 - Phase shifting in dll/pll: The disclosure relates to phase shifting in Delay Locked Loops (DLLs) and Phase-Locked Loops (PLLs). A charge pump in the DLL or PLL includes a capacitor connected in parallel to an output node. A primary current switching circuit charges the capacitor with a source current and discharges the capacitor with... Agent: Borden Ladner Gervais LLP Anne Kinsman

20080238535 - Power supply circuit and display device therewith: An unnecessary through current is suppressed and insufficiency of an output electric potential and increase in power consumption are suppressed in a power supply circuit using a charge pump method. In order to suppress a reduction in an output electric potential VPP as well as suppressing transient through currents I1... Agent: Morrison & Foerster LLP

20080238536 - Supply voltage generating circuit: A supply voltage generating circuit that enables a reduction in chip area includes: a booster for outputting a boosted voltage upon generating the boosted voltage by charge pumping of a capacitor element; a power-supply step-down unit for stepping down voltage of an external power supply to a voltage within a... Agent: Sughrue Mion, PLLC

20080238537 - Methods and systems for driver noise reduction in a mems gyro: Systems and methods for reducing driver noise in a MicroElectro-Mechanical Systems (MEMS) gyroscope system are disclosed. An example system includes motor drivers, two proof masses, two substrate electrodes, two motor drive capacitors, and two stationary capacitors. The motor drivers drive the proof masses through the motor driver capacitors. The stationary... Agent: Honeywell International Inc. Patent Services Ab-2b

20080238538 - Receiving device and related method for calibrating dc offset: A receiving device includes a mixer, an AC coupling circuit, a post-stage circuit, and a DC offset calibration circuit. The mixer is utilized for mixing an input signal with a local oscillating (LO) signal from an oscillator to generate a converted signal. The AC coupling circuit is coupled to the... Agent: North America Intellectual Property Corporation