Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 12/07

20070296466 - System and method for pre-charged linear phase-frequency detector: A method for comparing phases of two signals including placing a first output node in a floating state, detecting a first edge of a first signal on a first input node after placing the first output node in the floating state, coupling the first edge of the first signal to... Agent: Martine Penilla & Gencarella, LLP

20070296467 - Missing clock pulse detector: A method to detect a missing a clock pulse is provided. The method begins by providing a clock signal and a delayed clock signal. The delayed clock signal is then sampled to generate a sample of the delayed clock signal. A missing clock pulse may be detected if the sample... Agent: Blakely Sokoloff Taylor & Zafman

20070296468 - Electrical load drive device: A load drive device for driving an electrical load includes high-side and low-side transistors, and a switch. When the load is driven, each of the high-side and low-side transistors operates in a first mode where each of the high-side and low-side transistors is fully tuned on or in a second... Agent: Posz Law Group, PLC

20070296469 - Data receiving circuit with current mirror and data slicer: A data receiving circuit is capable of properly receiving current modulated signals having a wide range of frequencies. According to an exemplary embodiment, the data receiving circuit includes a current mirror operative to receive a current modulated signal from an external device and to convert the current modulated signal to... Agent: Thomson Licensing LLC

20070296470 - Semiconductor integrated circuit controlling output impedance and slew rate: The present invention provides a semiconductor integrated circuit that can perform impedance control and slew rate control independently of each other and simplify the structure of a control circuit. An output circuit comprising plural output MOSFETs connected in parallel is used, from among the plural output MOSFETs, the number of... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070296471 - Semiconductor integrated circuit device and method of outputting signals on semiconductor integrated circuit: A semiconductor integrated circuit device includes a semiconductor substrate having a first area. A first counter is provided in the first area, cyclically counts and outputs a first counter signal as a result of counting. A global reset circuit is provided on the semiconductor substrate and outputs a global reset... Agent: SprinkleIPLaw Group

20070296472 - Local coarse delay units: Methods, circuits, devices, and systems are provided, including embodiments with local coarse delay units. One embodiment includes generating a first delayed signal, a second delayed signal, and a third delayed signal by delaying a clock reference signal with various time delays of a coarse delay line and local coarse delay... Agent: Brooks, Cameron & Huebsch , PLLC

20070296474 - Semiconductor integrated circuit device: DLL circuit operating more stably at reset. Voltage comparator circuit 21 outputs comparison result signal to hold circuit 22 at first level when power supply voltage VAA is not higher than reference voltage REF and at second level when power supply voltage VAA exceeds reference voltage REF. Hold circuit 22... Agent: Foley And Lardner LLP Suite 500

20070296473 - Semiconductor integrated circuit including delay line of delay locked loop and method of controlling delay time using the same: A semiconductor integrated circuit includes a delay line of a delay locked loop. The delay line of the delay locked loop includes a delay variation detecting unit that outputs a detection signal according to a variation in delay time using a reference clock signal, and a plurality of delay units... Agent: Venable LLP

20070296475 - Semiconductor integrated circuit: A semiconductor integrated circuit including a first power supply region supplied with a first power supply voltage, and having a first clock distribution network, a second power supply region supplied with a second power supply voltage, and having a second clock distribution network, a first phase synchronizer which provides a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20070296476 - Synchronizing clock and aligning signals for testing electronic devices: A testing circuit includes a signal generator operative to provide a control signal in response to a reference clock signal. The control signal may include both alignment and timing information operative to synchronize the timing and output of the signal generator with a device under test. A clock recovery instrument... Agent: PeninsulaIPGroup

20070296477 - Method and delay circuit with accurately controlled duty cycle: A delay locked loop includes a storage element coupled to a data bus and produces a data synchronization signal. A phase detector receives a data clock signal and the data synchronization signal and produces a delay control signal. A first delay circuit produces a signal which is delayed relative to... Agent: Texas Instruments Incorporated

20070296478 - Integrated circuit package including programmable comparators: An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A plurality of comparators perform compare operations within the integrated circuit package. At least one control register is associated with each of the plurality of comparators. The plurality of comparators... Agent: Howison & Arnott, L.l.p

20070296479 - Delay circuit: A delay circuit includes a delay time setting circuit to set a delay time of an output signal with respect to an input signal, a first transistor connected to an input terminal of the delay time setting circuit and configured to set a first voltage to the input terminal of... Agent: Young & Thompson

20070296480 - Clock circuits and counting values in integrated circuits: A clock circuit for an integrated circuit having at least one MOS transistor. The clock circuit includes a first circuit for inducing a degradation of the transistor as a function of time and means for measuring a parameter of the transistor that reflects a lowering of the performance of the... Agent: Docket Clerk

20070296481 - Offset adjusting apparatus: An offset adjusting apparatus adjusting an offset of an output signal output from an output terminal of an operational amplifier including one input terminal to which an input signal is to be input via a first resistor and the other input terminal to which a reference voltage is to be... Agent: SocalIPLaw Group LLP

20070296482 - Level-conversion circuit: An independent control signal is transmitted to each of a driver control unit and an output transistor, so as to prevent the driver control unit and the output transistor from being made to operate at the same time and reduce through-current flows. Since the transistor ratio can be selected easily,... Agent: Young & Thompson

20070296483 - Method of forming a current sense circuit and structure therefor: In one embodiment, a current sense circuit is formed with a pair of series connected switches that are used to steer a load current and form a current sense signal.... Agent: Bradley J. Botsch Semiconductor Components Industries, LLC

20070296484 - Time-limiting protection and control circuit for protecting an element by limiting a pulse width of an input pulse: A time limiter protects a light emitting diode coupled to an output of a current driver by preventing the light emitting diode from working overtime under a high current and from being overheated and burnt down, no matter whether a pulse width of an input pulse is larger or shorter... Agent: North America Intellectual Property Corporation

20070296485 - Semiconductor device: A semiconductor device, has a main transistor that is a first-conductivity-type MOS transistor and has the drain connected to a first potential; a first switch circuit that is connected between the source of said main transistor and a second potential; a dummy transistor that is a first-conductivity-type MOS transistor whose... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20070296486 - Voltage generator circuit, method for providing an output voltage and electronic memory device: A voltage generator circuit provides an output voltage that is higher than an input voltage. The voltage generator circuit includes an input terminal receiving the input voltage, and an output terminal providing the output voltage. A pre-charge element is coupled between the input terminal and the output terminal, and a... Agent: Slater & Matsil LLP

20070296487 - Voltage generation circuit and method thereof: A voltage generation circuit may include a static current circuit and/or a current mirror. The static current circuit may include a first resistor. The current mirror may include a second resistor, a third resistor, and/or an output terminal.... Agent: Harness, Dickey & Pierce, P.L.C

20070296488 - Semiconductor integrated circuits: A semiconductor integrated circuit includes a logic circuit, a first and second switching device and an equalizer. The logic circuit includes a first circuit connected between a power supply voltage and a ground voltage supply line, and a second circuit connected between a power supply voltage supply line and a... Agent: Harness, Dickey & Pierce, P.L.C

20070290722 - Liquid crystal display backlight inverter: A liquid crystal display backlight inverter including a first error amplifying unit receiving and comparing a first detection voltage corresponding to a current flowing through a lamp with a first preset reference voltage and outputting a first error voltage corresponding to an error therebetween; a second error amplifying unit receiving... Agent: Mcdermott Will & Emery LLP

20070290724 - Comparator circuit: According to one embodiment, a comparator circuit includes: a plurality of comparator elements connected in parallel between at least one input signal line and at least one output signal line, each of the comparator elements comparing at least one input potential on the at least one input signal line and... Agent: Knobbe Martens Olson & Bear LLP

20070290725 - Glitch-free clock signal multiplexer circuit and method of operation: Techniques for the design and use of a digital signal processor, including (but not limited to) for processing transmissions in a communications (e.g., CDMA) system. Reduced glitch occurs in switching from a first clock input to a second clock input driving a clock multiplexer. The clock multiplexer receives a first... Agent: Qualcomm Incorporated

20070290721 - Method and apparatus for amplifying a regulated differential signal to a higher voltage: A sense amplifier for use in a memory device and in a memory-resident system. The sense amplifier operates on a lower voltage consistent with the voltage range of the differential input data and the sense amplifier further operates on a higher voltage to level-shift the output signal concurrently with the... Agent: Trask Britt, P.C./ Micron Technology

20070290723 - Liquid crystal display backlight inverter: A LCD backlight inverter including: a dimming control unit comparing a level of a triangle wave with a level of a dimming control signal and controlling a dimming control current to be supplied or interrupted according to a comparison result; an error amplification unit having an input end to which... Agent: Mcdermott Will & Emery LLP

20070290726 - Driving device and driving method: A waveform of the output signal having high reproducibility to an input signal is outputted from capacitive load. Even the driving device is configured as a switching amplifier and drives capacitive load. Reactive power can be reduced to perform low power consumption. Output signals V1a and V1b that an output... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070290727 - Apparatus and methods for setting wakeup times in a communication device: Apparatus and methods for setting wakeup times in a communication device are disclosed where setting the wakeup times includes estimating the lock on time of a frequency synthesizer in order to minimize the wakeup time and extend sleep times for maximal energy savings. A disclosed apparatus includes an estimator to... Agent: Qualcomm Incorporated

20070290728 - Circuit and method for slew rate control: A circuit and method for slew rate control is described. The circuit for slew rate control comprises a slew rate control circuit and an output buffer. The slew rate control circuit controls the rising slew rate and falling slew rate of an output voltage signal. The output buffer stabilizes the... Agent: North America Intellectual Property Corporation

20070290729 - Pwm circuit and pwm integrated circuit for use in pwm circuit: The present invention discloses a PWM integrated circuit which may receive a programming signal without any extra pin. The PWM integrated circuit comprises: a comparator having two outputs; two pins respectively electrically connected with the two outputs; and a programming unit electrically connected with at least one of the two... Agent: Tung & Associates

20070290730 - Duty cycle correction circuit: A duty cycle correction circuit capable of generating a clock signal having good (e.g., approximately 50%) duty cycle is described. The duty cycle correction circuit includes a clock deskew circuit and a duty cycle detection circuit. The clock deskew circuit receives an input clock signal that may have poor duty... Agent: Qualcomm Incorporated

20070290731 - Low pin count reset configuration: An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes... Agent: Dillon & Yudell LLP

20070290732 - Reset method for digital circuit and related signal generating apparatus: The present invention discloses a reset method for a digital circuit. The method includes: providing a clock signal to the digital circuit; keeping the clock signal at a logic level according to a first indicating signal; generating a reset signal for resetting the digital circuit; and recovering the clock signal... Agent: North America Intellectual Property Corporation

20070290733 - Two-latch clocked-lssd flip-flop: A clocked level-sensitive scan design may have flip-flops designed to have data, scan-in, and output ports and to utilize two clock signals. Such a clocked level-sensitive scan flip-flop may be built utilizing two latches.... Agent: Brinks Hofer Gilson & Lione/marvell

20070290734 - Semiconductor integrated circuit device: In a clear period, transistors NT38 and PT38 turn on and state retention nodes HQ and H/Q are cleared to an L level and an H level, respectively. In this clear period, a transistor NT21 is off. Consequently, a precharge node PS maintains itself at an H level. Thus, transistors... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20070290736 - Level shift circuit and method for the same: The present invention discloses a level shift circuit which comprises: level shift means for receiving an input of a first operational voltage and generating an output of a second operational voltage; and a current path connecting with a source of the second operational voltage and providing current to the output... Agent: Tung & Associates

20070290735 - Method and apparatus of a level shifter circuit having a structure to reduce fall and rise path delay: A method, apparatus and/or system of a level shifter circuit having a structure to reduce fall and rise path delay is disclosed. In one embodiment, a level shifter circuit comprise a first set of sequentially coupled pull-up and pull-down sub-circuits cross coupled to a second set of sequentially pull-up and... Agent: Texas Instruments Incorporated

20070290737 - Reconfigurable frequency filter: There are various mobile communication standards such as GSM, EDGE, and W-CDMA. For a GSM or EDGE system, a receiver must be configured to work with an IF signal with a center frequency and bandwidth of 200 KHz. For WCDMA system, the same receiver must be configured to work with... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070290738 - High side/low side driver device for switching electrical loads: An integrated circuit device for switching electrical loads that have an inductive component comprises at least one switching channel that includes a power stage with a power MOS transistor and a driver circuit for driving the gate of the power MOS transistor, the switching stage being configurable for use in... Agent: Texas Instruments Incorporated

20070290739 - Current mirror architectures: In one embodiment, the present invention includes a current mirror having an input bipolar device and an output bipolar device, a first MOSFET device to control a current in the input bipolar device, and a second MOSFET device to control a bias current to common base terminals of the input... Agent: Trop Pruner & Hu, PC

20070290740 - Current mirror arrangement: A current mirror arrangement is specified in which two current mirror transistors (2, 3) form a current mirror. Two cascode transistors (11, 12) are connected up to the two current mirror transistors (2, 3) to form a cascode stage. The cascode transistors (11, 12) in each case comprise a plurality... Agent: Fish & Richardson PC

20070285132 - Fast locking phase locked loop: A fast locking phase locked loop includes a first phase frequency detector (PFD), a second PFD, a lock detector, an up-signal output unit, a down-signal output unit, a selective charge pump, a loop filter, and a voltage-controlled oscillator (VCO). The first PFD outputs a first up-signal and a first down-signal.... Agent: Mills & Onello LLP

20070285133 - Driver circuit for providing an output signal: A driver circuit for providing an output signal for switching an electrical load on and off has a field-effect transistor having a gate terminal and an output for providing the output signal to the electrical load, a buffer circuit connected to the gate terminal of the field-effect transistor to impress... Agent: Eschweiler & Associates LLC

20070285134 - Ac-dc input buffer: An inverting input buffer that uses the best features of an AC input buffer (low delay, high speed, high input voltage swing range) and a DC input buffer (stability, reliability, ‘automatic’ high and low data setup, input VIL and VIH “Voltage Input Low” and “Voltage Input High” margins). The delay... Agent: Tucker Ellis & West LLP

20070285135 - Output drive circuit that accommodates variable supply voltages: In accordance with the invention, a driver circuit is described that permits a single thin gate oxide process to be utilized where a dual oxide process may normally be necessary. Circuits employing only thin gate oxide devices are used as the design basis for a single product with a single... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070285136 - Load control device: A load control device includes a triangular wave generation portion which generates a triangular wave signal by charging/discharging a capacitor based on a constant current supplied from a constant current source, a load control portion which controls a load based on the triangular wave signal, and a temperature compensation element... Agent: Sughrue-265550

20070285137 - System and method for power control for asic device: A system and method for power control for ASIC device is disclosed. According to an embodiment, the present invention provides a system for adjusting power consumption of an ASIC device. The system includes a first buffer. The first buffer is configured to receive and store data. The system also includes... Agent: Townsend And Townsend And Crew, LLP

20070285138 - Multi-phase delay locked loop with equally-spaced phases over a wide frequency range and method thereof: A Delay Locked Loop (DLL) and method for generating multiple equally spaced phases over a wide frequency range is disclosed. The DLL includes a delay line, and a control module. The delay line receives a reference clock signal and outputs a final delay clock signal in response to the reference... Agent: Evergreen Valley Law Group

20070285139 - Amplifier circuit and method for correcting the duty ratio of a differential clock signal: An amplifier circuit is configured to correct the duty ratio of a differential clock signal to a desired value of 50% via a differential amplifier including a MOS transistor pair. The clock signal to be corrected is applied to a respective gate terminal of the MOS transistor pair of the... Agent: Edell, Shapiro & Finnan, LLC

20070285140 - Delay ratio adjusting circuit, delayed pulse generation circuit, and pulse width modulation pulse signal generation device: Solving Means A PWM pulse signal generation device includes a first PLL control circuit 410, a ring oscillator 420 in which a plurality of basic delay elements are serially connected, and a delayed pulse generation circuit constituted by a delay ratio adjusting circuit 330 and a delay circuit 350. The... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20070285141 - Start up circuit of power converter: A start up circuit of power converters is presented. It includes a first transistor, a resistive device, a second transistor, a third transistor and a diode. The first transistor is coupled to a voltage source. The third transistor is connected in serial with the first transistor to output a supply... Agent: Rosenberg, Klein & Lee

20070285142 - Apparatus for supplying voltage free from noise and method of operation the same: A voltage supply apparatus includes a power noise sensing unit, a voltage selecting unit, a first power voltage supply unit and a second power voltage supply unit. The power noise sensing unit senses noise from first and second powers and outputs a power noise sensing signal. The voltage selecting unit... Agent: Venable LLP

20070285143 - Transition device between a waveguide and two redundant circuits coupled each to a coplanar line: A redundant transition device between a waveguide (1) and at least two redundant processing circuits (2, 3) includes two uncoupled coplanar lines (5, 6) formed one on either side of a single substrate plate (4) and extending, in part at least, into the waveguide (1). Each coplanar line (5) has... Agent: Young & Thompson

20070285144 - Delay line with delay cells having improved gain and in built duty cycle control and method thereof: A delay line including a sequence of identical delay cells with improved gain and in built duty cycle distortion control and a method thereof is disclosed. Each delay cell of the sequence includes a current source, four transistors, and a load capacitor. A gate of the current source receives a... Agent: Evergreen Valley Law Group

20070285145 - Delay line circuit: Delay circuitry is described that includes clock mixing circuitry to provide a selectable propagation time. Output signals from the mixing circuitry are selectively coupled through a variable delay line to synchronize two clock signals.... Agent: Schwegman, Lundberg & Woessner, P.A.

20070285146 - Semiconductor device with pump circuit: In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a... Agent: Mcdermott Will & Emery LLP

20070285147 - Level conversion circuit with duty correction: A level conversion circuit includes an input section configured to receive a first signal of a first signal level and a correction signal and generates a second signal of a second signal level from the first signal and the correction signal. A level converting section converts the second signal into... Agent: Mcginn Intellectual Property Law Group, PLLC

20070285148 - Switching element, reconfigurable logic integrated circuit and memory element: The switching element of the present invention is of a configuration that includes: an ion conduction layer (40) that includes an oxide, a first electrode (21) and a second electrode (31) that are provided in contact with the ion conduction layer (40) and that are connected by the precipitate of... Agent: Sughrue Mion, PLLC

20070285149 - Switch circuit device, and wireless circuit device and sampling circuit device employing the same: A switch circuit device with improved insertion loss characteristics and isolation characteristics is provided. The switch circuit of the present invention includes a plurality of n-ch MOSFETs whose gates are connected together and whose drains and sources are connected in series, a p-ch MOSFET whose gate is connected to the... Agent: Wenderoth, Lind & Ponack L.L.P.

20070285150 - Method and system for providing a charge pump very low voltage applications: A method and system for providing an output voltage greater than a voltage provided by a voltage supply in a semiconductor device are disclosed. The method and system include providing a plurality of clock signals, providing a first stage and providing a second stage. The first stage includes at least... Agent: Sawyer Law Group LLP

20070285151 - Power supply circuit: A power supply circuit includes a first power supply configured to output a first voltage; a second power supply provided separately from the first power supply to output a second voltage; and a boosting circuit configured to use the first voltage as an input voltage to boost the input voltage... Agent: Mcginn Intellectual Property Law Group, PLLC

20070285152 - Power supply voltage controlling circuit and semiconductor integrated circuit: A power supply voltage controlling circuit that controls an output voltage at an output terminal to a desired set voltage, has a voltage regulator circuit that is connected to a first power supply and a second power supply that outputs a higher voltage than said first power supply, supplies a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20070285153 - Semiconductor device with leakage current compensating circuit: A semiconductor device includes a current mirror circuit having a plurality of transistors; a current source configured to supply a constant reference current to the current mirror circuit through a node; and a compensating circuit configured to supply a compensation current to the node to compensate for at least a... Agent: Sughrue Mion, PLLC

20070285154 - Adaptive radio transceiver with filtering: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such... Agent: Mcandrews Held & Malloy, Ltd

20070285155 - Discrimination circuit, gain adjustment circuit, signal processing circuit, and electric device: A discrimination circuit of the present invention checks whether a received signal is noise or a signal that is repeated with interposed rest time periods, and is provided with a low-pass filter that has a cut-off frequency that is lower than the frequency of the noise but higher than the... Agent: Fish & Richardson P.C.

20070285156 - Expanded performance and functions for vacuum tube replacement devices: Methods are provided for solid-state implementation of a vacuum tube replacement device that supplements the functional performance of the target replacement device, i.e., a traditional glass vacuum tube. Example functions may include OEM or user adjustable parameters such as gain and/or frequency response (e.g. transfer function), current and/or voltage saturation... Agent: Merchant & Gould PC

20070279103 - Chopper type comparator: A comparator includes: a CMOS inverter constituted by a combination of a first p-channel MOS transistor and a first n-channel MOS transistor; a second p-channel MOS transistor connected in parallel to the first p-channel MOS transistor in an analog input period, and disconnected from the first p-channel MOS transistor in... Agent: Nixon Peabody, LLP

20070279101 - Signal output circuit, audio signal output apparatus using the same, and electronic device: A selection circuit switches the output between a ancillary PWM signal NSPWM and a primary PWM signal SPWM in accordance with a power supply transition period or normal period. A ancillary signal generating circuit generates a gradually rising signal which is then amplified by a second driver circuit, so that... Agent: Cantor Colburn, LLP

20070279102 - Detector device: The present invention relates to a detector device and, more particularly, to a detector device comprising a self-diagnosis means for monitoring the correct performance or otherwise of the device. During testing, the device, which normally operates using the Doppler shift principle, is arranged to influence the phase and/or amplitude of... Agent: Occhiuti Rohlicek & Tsao, LLP

20070279104 - Current drive circuit: In the current drive section, a wiring for setting a substrate potential is separately provided from a wiring of a power potential VDD so that substrate potentials of P-channel MOS transistors within respective drive cells become the same regardless of the distance from the power pad (power potential VDD) to... Agent: Nixon Peabody, LLP

20070279105 - Driver circuit and method for differential signaling with improved signal level control: A differential signal driver circuit is provided with a driver circuit and a common feedback circuit. The driver circuit is responsive to differential input signals for generating differential output signals from operation currents generated by two current sources. The common feedback circuit controls the current sources to regulate the current... Agent: Mcginn Intellectual Property Law Group, PLLC

20070279106 - Slew-rate control apparatus and methods for a power transistor to reduce voltage transients during inductive flyback: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070279107 - Bridge driver circuit with integrated charge pump: Bridge driver circuit with integrated charge pump, with a driving circuit section of a charge pump capacitor being formed with power switch components and/or diodes of a bridge circuit section.... Agent: Dicke, Billig & Czaja

20070279108 - Dynamic frequency divider: A dynamic frequency divider is proposed in which a double mixer is used for the dynamic frequency division. In one example the division is by N, where N≧2 and a positive integer. The dynamic frequency divider further includes an input stage with level shift means, a filter filtering the output... Agent: Dicke, Billig & Czaja

20070279109 - Translational phase locked loop using a quantized interpolated edge timed synthesizer: A direct digital synthesizer (DDS) such as a Quantized Interpolated Edge Timed (QuIET) synthesizer is implemented in the feedback path of a translational Phase Lock Loop (PLL). The frequency translation introduced by the synthesizer reduces the amplification of reference feedback path noise sources, thereby enabling a wider loop bandwidth and... Agent: Dillon & Yudell LLP

20070279110 - Tuning of a phase-locked loop, and an electronic device: There is provided an electronic device comprising: a control block for providing a control signal; a voltage-controlled oscillator; a divider block; a detector block for receiving a frequency-divided output signal from the divider block, for receiving a reference frequency signal and for providing a feedback control signal to the voltage-controlled... Agent: Squire, Sanders & Dempsey L.L.P.

20070279114 - Controllable current source for a phase locked loop: The invention concerns a controllable current source or “charge pump” (12) in an integrated circuit, comprising two supply terminals (K1, K2) for the application of two supply potentials (V1, V2) as well as an output terminal (Kout) for the delivery of an output current, connected via a first controllable current... Agent: Pearne & Gordon LLP

20070279111 - Dll circuit: A DLL circuit having a phase comparison circuit for comparing phases of a reference clock and a delay clock and a variable delay addition circuit for adjusting delay amount according to a signal from the phase comparison circuit comprises a means for inputting a first signal latched at a logic... Agent: Morrison & Foerster LLP

20070279113 - Dll circuit: A DLL circuit comprises a dummy delay corresponding to an internal clock delay from an external clock, a variable delay addition circuit having a coarse and fine delay circuits adjusting delay amount according to a delay amount adjustment signal, and a phase comparison circuit comparing phases of the internal clock... Agent: Morrison & Foerster LLP

20070279112 - Semiconductor memory: A semiconductor memory using a DLL circuit having a phase comparison circuit for comparing phases of an internal clock and a delay clock and a variable delay addition circuit for adjusting delay amount according to a signal from the phase comparison circuit comprises a means for inputting a first signal... Agent: Morrison & Foerster LLP

20070279115 - Pulse-generator circuit and circuit arrangement: Pulse-generator circuit for generating an input signal for a flip-flop circuit from a clock-pulse signal and a data signal. The circuit includes a control unit for controlling a clock-pulse field effect transistor, a logic field effect transistor and a feedback field effect transistor. To generate the input signal, the control... Agent: Dickstein Shapiro LLP

20070279116 - Pulse generator: A split signal pulse generator (“SSPG”) that generates a difference signal from two split signals from a splitter module, where one of the split signals may be time delayed by a delay module, where the delay module may be a transmission line having a time delay or an adjustable delay... Agent: Agilent Technologies Inc.

20070279117 - Method and system for high frequency clock signal gating: A differential clock signal gating method and system is provided, providing a clock gating signal with a timing relationship to a clock signal and a differential pair current to a buffer differential pair load element. Switching the differential pair current from the load element to a buffer differential pair responsive... Agent: Driggs, Hogg & Fry Co. L.p.a.

20070279118 - Sensor arrangement with a sensor and a signal processing means: A sensor arrangement comprises a sensor responsive to a measurement parameter as a sensor signal and a signal processing means for the sensor signal, said means having a switching stage for comparison of the sensor signal with a comparison or switching value and for producing a switching signal in a... Agent: Hoffmann & Baron, LLP

20070279119 - Gate driving device for driving insulated gate bipolar transistor and method of driving the same: A gate driving device includes an IGBT and a gate drive circuit, which includes a gate resistor and a gate drive unit. The gate of the IGBT is connected to the gate resistor, and the emitter of the IGBT is connected to a low voltage potential. The peak impurity concentration... Agent: Rossi, Kimms & Mcdowell LLP.

20070279120 - Noise-reducing transistor arrangement, integrated circuit, and method for reducing the noise of field effect transistors: Noise-reducing transistor arrangement having first and second field effect transistors (FETs) having source terminals coupled together, drain terminals coupled together, and control terminals for application of a first or second signal. A clock generator unit is configured to provide the first and second signals alternately to the FETs with an... Agent: Dickstein Shapiro LLP

20070279121 - Signal output circuit: An LVDS output circuit steadily supplying an output current of magnitude I includes a current source 101 outputting a current of 2I, current sources 102, 103, 106, 107 allowing a current of ΔI to flow therethrough, and current sources 104, 105 allowing a current of I−ΔI to flow therethrough. Switches... Agent: Mcdermott Will & Emery LLP

20070279122 - Circuit and method for supplying programming potential at voltages larger than bvdss of programming transistors: A circuit for programming an antifuse coupled between a first node and a second node includes at least one transistor for supplying a programming potential VPP to the first node. A first transistor has a source coupled to a third node switchably coupleable between a potential of VPP/2 and ground... Agent: Sierra Patent Group, Ltd.

20070279123 - Internal voltage detection circuit: An internal voltage generator for use in a semiconductor memory device includes a first voltage detection unit, a second voltage detection unit, a detection signal generation unit, and an internal voltage generation unit. The first voltage detection unit detects a voltage level of an internal voltage changing linearly depending on... Agent: Mcdermott Will & Emery LLP

20070279124 - Semiconductor integrated circuit including output circuit: An output circuit includes a differential section configured to amplify an inputted differential signal; a current source section configured to supply a current to the differential section; a load resistance section connected with the differential section; and a control unit configured to set a value of the current from the... Agent: Mcginn Intellectual Property Law Group, PLLC

20070279125 - Differential receiver circuit: A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is... Agent: Freescale Semiconductor, Inc. Law Department