Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 10/07

20070247198 - Window comparator of an a.c. voltage: A window comparator of an A.C. input voltage, including, between two terminals of application of a voltage representative of the voltage to be measured, two first transistors of a first type, each first transistor being assembled as a current mirror on the second transistor having a first conduction terminal connected... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070247200 - Frequency independent control: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070247199 - Phase-locked loop apparatus having aligning unit and method using the same: An enhanced phase-locked loop (PLL) apparatus having an aligning unit and method are described. The PLL comprises an aligning unit, a phase difference detecting unit, a charge pump, a loop filter, and a voltage-controlled oscillator. The aligning unit receives a hold signal and a reference signal for shifting an edge... Agent: Madson & Austin Gateway Tower West

20070247201 - Delay lock clock synthesizer and method thereof: A delay lock clock synthesizer comprises: an adjustable delay circuit for receiving an input clock and for generating an output clock having a phase offset controlled by a control signal; a phase detector for detecting a phase difference between the input clock and the output clock and for generating a... Agent: Rosenberg, Klein & Lee

20070247202 - Variable delay clock circuit and method thereof: An apparatus for generating an output clock is disclosed. The apparatus comprises: N variable offset clock circuits for receiving N input clocks and for generating N intermediate clocks having N phase offsets controlled by N intermediate signals, respectively, where N>1; a clock multiplexer for selecting one of the N intermediate... Agent: Rosenberg, Klein & Lee

20070247203 - Delay locked loop: The digital duty cycle correction circuit according to the present invention includes a first conversion circuit for buffering an internal clock output from a delay locked loop (DLL), converting the buffered internal clock into first and second clocks through first and second terminals, delaying the second clock according to voltage... Agent: Lowe Hauptman Ham & Berner, LLP

20070247204 - Start up circuit without standby current: A start up circuit includes: a NOT gate; a capacitor coupled to an output of the NOT gate; a first switch for determining whether or not to couple an input of the NOT gate to an operating voltage source according to the output of the NOT gate; a control circuit... Agent: North America Intellectual Property Corporation

20070247205 - Phase splitters: A phase splitter that receives an external clock signal and that generates first and second internal clock signals having a phase difference of 180° between the first and second internal clock signals, the phase splitter including: a first buffer that buffers the external clock signal and outputs a first signal;... Agent: Harness, Dickey & Pierce, P.L.C

20070247206 - Programmable trigger delays: Aspects of the disclosure embody methods and circuits for delaying a trigger signal. In one embodiment, a trigger delay circuit receives a trigger-in signal, delays some predetermined and programmable time delay and then outputs a trigger-out signal. The trigger delay circuit, in one embodiment, includes a programmable trigger circuit that... Agent: Agilent Technologies Inc.

20070247207 - Apparatus and method for generating clock signal: The invention is related to an apparatus and a method for generating an output clock. The method comprises: receiving a transmitted signal comprising at least one data signal and at least one synchronized signal; producing a reference signal according to the synchronization signal; counting the first reference signal according to... Agent: Raymond Sun Law Offices Of Raymond Sun

20070247208 - Offset correcting method, offset correcting circuit, and electronic volume: An offset correcting circuit includes: an amplifying unit including an offset adjusting unit that adjusts an offset of the amplifying unit; and an offset determining unit that that detects the offset of the amplifying unit outputs a signal for correcting the offset of the amplifying unit. The offset determining unit... Agent: Pillsbury Winthrop Shaw Pittman LLP

20070247210 - Level shift circuit: In a level shift circuit, the threshold voltage of N-type high-voltage transistors, to whose gates the voltage of a low-voltage supply VDD is applied, is set low. An input signal IN powered by the low-voltage supply VDD is input to the gate of an N-type transistor by way of an... Agent: Mcdermott Will & Emery LLP

20070247209 - Voltage level shifter apparatus: A voltage level shifter apparatus is provided. The voltage level shifter apparatus includes a first dynamic-bias generator, a second dynamic-bias generator, and a level supply circuit. The first dynamic-bias generator dynamically outputs a first bias signal, wherein the level of the first bias signal is determined in accordance with the... Agent: J.c. Patents, Inc.

20070247211 - Series/shunt switch and method of control: A switch includes at least two signal ports in series with a series FET connected therebetween, and a shunt path having an FET, whereby an input bias is applied to a gate on the series FET and to a drain on the shunt FET. In one embodiment, the switch includes... Agent: Tyco Electronics Corporation

20070247212 - Transistor cell and related circuits and methods: A transistor cell is provided that includes transistors arranged to turn on for different voltages applied to a control terminal of the transistor cell. The transistor cell can include a first transistor having a gate, a source, and a drain, and a second transistor having a gate, a source, and... Agent: Wolf Greenfield & Sacks, P.C.

20070247213 - Apparatus and method for improving drive-strength and leakage of deep submicron mos transistors: An apparatus and method for manufacturing metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, which MOS transistors are area efficient, and where the drive strength and leakage current of the MOS transistors is improved. The invention uses a dynamic threshold voltage control scheme that does not require... Agent: Glenn Patent Group

20070247214 - Methods for controlling charge pump and related working voltage generating circuits: A method for controlling a charge pump having a plurality of switches, wherein the charge pump is for supplying a working voltage to a following stage, the method includes: adjusting the timing of a clock signal to generate an adjusted clock signal synchronized with a current consumption period of the... Agent: North America Intellectual Property Corporation

20070247215 - Reference voltage source and current source circuits: The voltage source and current source circuits including an amplifier, a first current mirror circuit, a first PMOS transistor, a second current mirror circuit and a NMOS transistor are provided. The amplifier has a positive input terminal and a negative input terminal coupled to the source terminal of the NMOS... Agent: Jianq Chyun Intellectual Property Office

20070247216 - Adaptive voltage adjustment: A method, system, module, apparatus, use, and computer program product are shown for determining a supply voltage level for operating an integrated circuit. To allow exact voltage level calibration, a high load condition is provided to the integrated circuit, a first voltage level of the integrated circuit is adjusted to... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20070241793 - Current feedback amplifiers: Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of... Agent: Fliesler Meyer LLP

20070241794 - Novel comparator circuit with schmitt trigger hysteresis character: A circuit and a method are provided to produce a novel comparator with Schmitt trigger hysteresis character. The circuit includes a current source which controls the magnitude of current flow through this comparator circuit. It has a first logic device which is turned ON by a reference voltage, and a... Agent: Stephen B. Ackerman

20070241795 - Multitap fractional baud period pre-emphasis for data transmission: Pre-emphasis circuitry and methods for signal transmission provide multiple levels of output signal amplification over one or more baud periods after an input signal transition. The multiple, gradually decreasing levels of output signal amplification reduce power consumption and better approximate the desired signal response.... Agent: Fish & NeaveIPGroup Ropes & Gray LLP

20070241796 - D-type static latch for high frequency circuit: A D-type static latch circuit is provided that includes first and second circuits connected between a first reference potential and a second reference potential, with the first circuit comprising a first transistor, a second transistor and a third transistor connected in series, and the second circuit comprising a fourth transistor,... Agent: Fleit, Kain, Gibbons, Gutman, Bongini & Bianco P.l.

20070241797 - Interface circuit and a clock output method therefor: An interface circuit outputting a clock signal and data to a data register configured to serially read in the data synchronously with the clock signal, in response to a change of a control signal for outputting the clock signal and the data from one logic level to the other logic... Agent: Fish & Richardson P.C.

20070241798 - Delay locked loop having charge pump gain independent of operating frequency: A delay looked loop (DLL) having a charge pump gain independent of the operating frequency of the DLL. A charge pump is disclosed for providing a charge to a capacitive element on a voltage controlled delay line, wherein the charge is independent of a control voltage step cycle time of... Agent: Hoffman, Warnick & D'alessandro LLC

20070241799 - Duty cycle corrector: A duty cycle corrector includes a first controllable delay, a second controllable delay, a phase detector, and a compensation circuit. The first controllable delay is configured to delay a first signal to provide a second signal. The second controllable delay is configured to delay the second signal to provide a... Agent: Dicke, Billig & Czaja

20070241800 - Programmable delay circuit having reduced insertion delay: A programmable delay circuit includes a plurality of delay blocks, a plurality of corresponding tri-state drivers and at least one decoder. The delay blocks are connected together so as to form a series chain. Each of the tri-state drivers includes an input connected to an output of a corresponding one... Agent: Ryan, Mason & Lewis, LLP

20070241801 - Internal clock generator and method of generating internal clock: An internal clock generator according to the present invention includes a detector, an internal signal generator and a clock output unit. The detector detects a transition point of an external clock signal and outputting a detection signal. The internal signal generator generates an internal signal in response to the detection... Agent: Lowe Hauptman Ham & Berner, LLP

20070241802 - Digitally controlled threshold adjustment circuit: Embodiments of threshold adjustment circuits are disclosed. An example circuit includes a first differential pair of first and second thin oxide transistors. The first and second thin oxide transistors decrease a DC voltage component of a first or second component of an input signal of the circuit. The example circuit... Agent: Brake Hughes Bellermann LLP

20070241803 - Io clamping circuit method utilizing output driver transistors: Systems and methods are disclosed for a clamping circuit for protecting against voltage overstresses. One embodiment of the system comprises a first voltage comparator adapted to detect when a selected voltage exceeds a first predetermined voltage and a second voltage comparator adapted to detect when the selected voltage falls below... Agent: Mcandrews Held & Malloy, Ltd

20070241804 - Level shifter for semiconductor memory device implemented with low-voltage transistors: A level shifter is proposed. The level shifter includes a stage having a first branch and a second branch, each branch including: a selection terminal for receiving a selection signal, the selection signal received by the first branch and the second branch being alternatively at a first voltage and at... Agent: Graybeal Jackson Haley LLP

20070241805 - Linearisation apparatus: A method of linearising a non-linear opto-electronic apparatus that includes an opto-electronic Mach-Zehnder modulator that receives an incoming electrical signal for modulating a light signal passing through the modulator, where the transfer characteristic of the modulator is sinusoidal, and including means for detecting the modulating light signal and for digitising... Agent: Crowell & Moring LLP Intellectual Property Group

20070241806 - Fast filtering means and filtering and decimation methos: The invention relates to a hardware implemented filtering method including establishing a representation DIS of the derivative of at least a part of a time-quantized input signal IS, and establishing at least one sample of a time- and amplitude-quantized output signal OS by performing filtering on the basis of at... Agent: Cantor Colburn, LLP

20070241807 - Input stage for multiplexing: Input stages for use in multiplexing, and methods for using the same, are provided herein. An input stage includes an input terminal and an output terminal. A voltage input signal is accepted at the input terminal of the input stage. When the input stage is selected, a substantially unmodified version... Agent: Fliesler Meyer LLP

20070241808 - High voltage pumping device: A high voltage pumping device is provided which includes a first high voltage detector for detecting a level of a high voltage, and generating a first pumping enable signal which is enabled when the high voltage is lower than a predetermined reference voltage, a pumping control signal generator for generating... Agent: Cooper & Dunham, LLP

20070241809 - Low power voltage reference circuit: An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do... Agent: Wagner, Murabito & Hao LLP

20070241810 - Semiconductor device: A semiconductor device of the invention comprises a logic circuit to which a power supply voltage, a sub-power supply voltage lower than the power supply voltage, a ground voltage and a sub-ground voltage higher than the ground voltage are supplied; a main power supply line supplying the power supply voltage;... Agent: Sughrue Mion, PLLC

20070241811 - Methods and systems for reducing leakage current in semiconductor circuits: Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input... Agent: Orrick, Herrington & Sutcliffe, LLPIPProsecution Department

20070236260 - Supply voltage sensing circuit: A supply voltage sensing circuit comprises an internal power supply circuit, which provides a constant output voltage regardless of the supply voltage. A delay circuit generates a delayed signal by delaying a variation in the output voltage. A divider circuit generates a divided voltage by dividing the supply voltage at... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070236256 - Circuit technique to reduce leakage during reduced power mode: Provided herein are schemes for reducing leakage in dynamic circuits during sleep modes.... Agent: Intel Corporation C/o Intellevate, LLC

20070236257 - Debounce circuit and method: A circuit for debouncing a signal from a switch or other input. The invention provides an arrangement which receives an input signal and which monitors the input to provide an output which switches after a predetermined time from the input signal changing from one state to another. However, the output... Agent: Dickstein Shapiro LLP

20070236258 - Current-balanced logic circuit: In accordance with some embodiments, a current-balanced logic circuit includes a first sense amplifier, a second sense amplifier, and a current-source transistor which provides bias current to the first and second sense amplifiers. The first and second sense amplifiers are alternately activated by first and second differential clock signals, and... Agent: Fleshner-kim, LLP Intel Corporation

20070236259 - Method and circuits for sensing on-chip voltage in powerup mode: A method for sensing voltage on an internal node in an integrated circuit includes applying a voltage larger than a threshold value to a first pad, generating from the activation voltage a potential for a sensing circuit and coupled to the internal node, and coupling an output of the sensing... Agent: Sierra Patent Group, Ltd.

20070236261 - Circuit arrangement comprising a sample-and-hold device and method for signal processing in a sample-and-hold device: In a circuit arrangement including a sample-and-hold device, the sample-and-hold device includes a first, a second, a third and a fourth charge store, and also a first and a second input terminal for feeding in a differential input signal comprising a first and a second component. A differential output signal... Agent: Eschweiler & Associates, LLC National City Bank Building

20070236262 - Low voltage output circuit: An output driver for an integrated circuit that asserts at very low power supply voltages includes a first input voltage node, a first power supply voltage node, an output voltage node, a first internal circuit node, a first resistive element coupled between the first power supply voltage node and the... Agent: Stmicroelectronics, Inc.

20070236263 - Contention-free keeper circuit and a method for contention elimination: A contention-free keeper circuit including a keeper circuit having a first node and a second node, is provided. The contention-free keeper circuit may further include a delay element for providing time delay. The contention-free keeper circuit may further include a high-to-low contention element coupled between the first node and a... Agent: Freescale Semiconductor, Inc. Law Department

20070236264 - Frequency dividing phase shift circuit: A frequency dividing phase shift circuit includes a first frequency divider and a second frequency divider. The first frequency divider is configured to perform 1/(2n+1) (n is a natural number) frequency division on an input signal having a frequency of (freq*2(2n+1)) (“freq” indicates a frequency) to generate a first signal... Agent: Young & Thompson

20070236265 - Power-on reset circuit using flip-flop and semiconductor device having such power-on reset circuit: A power-on reset circuit has a dummy flip-flop in addition to a setting flip-flop. Even if resetting is not performed by a power-on reset signal at power-on, output from the dummy flip-flop is used to perform resetting and initialization.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070236266 - Apparatus and method for extracting a maximum pulse width of a pulse width limiter: An apparatus and method for extracting a maximum pulse width of a pulse width limiter are provided. The apparatus and method of the illustrative embodiments performs such extraction using a circuit that is configured to eliminate the majority of the delay cells utilized in the circuit arrangement described in commonly... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070236267 - High-speed latching technique and application to frequency dividers: The inventive technique can dynamically adjust the current being applied within the components of a prescaler or divider. This dynamic scaling of the current can improve the speed of the divider by a factor of two or reduce the average current in half when compared to the conventional prescaler. Inverters... Agent: Thaddeus Gabara

20070236268 - Threshold personalization testmode: A threshold personalization circuit for a reset or supervisor chip includes personalization fuses, which shift a resistor divider to provide a variety of selectable voltage thresholds. The personalization fuses may provide hundreds of millivolts of adjustment. The threshold personalization circuit further includes trim fuses to fine tune the threshold to... Agent: Stmicroelectronics, Inc.

20070236269 - Non-linear current mode digital to analog converter for controlling a current starved delay stage: In a method and system for providing a digitally programmable delay, a variable gain circuit is operable to receive an input. The input is multiplied by a selectable gain to provide an output. A controller is coupled to receive an input vector. The controller selects the selectable gain in response... Agent: Texas Instruments Incorporated

20070236270 - Clock-pulse generator and shift register using the same: An exemplary clock-pulse generator (60) includes an input port (63), an output port (64), a logic gate (601) having two inputs (602 and 603) and an output (604), an odd number of inverters (606) connected in series between the input port and one of the inputs of the logic gate,... Agent: Wei Te Chung Foxconn International, Inc.

20070236271 - Current controlled level shifter with signal feedback: The invention relates to a current controlled level shifter which has an input stage having an input for supplying an input signal and having first and second outputs for providing a first and a second control current. A first shifter stage is connected to the outputs of the input stage... Agent: Maginot, Moore & Beck Chase Tower

20070236272 - Level shifter with low leakage current: A voltage level shift circuit includes a first stage which receives an input signal having voltage levels Vcc and Vss, where Vcc>Vss, and which outputs complementary first and second intermediate signals, wherein the complementary first and second intermediate signals have voltage levels VIhigh and VIlow, where VIhigh>VIlow; and a second... Agent: Volentine & Whitt PLLC

20070236273 - Setting a reference voltage for a bus agent: Setting a reference voltage for a bus agent including identifying a present configuration of a bus, the bus including conductive pathways connected to bus agents, the bus agents including computer hardware devices that use the bus for data communications among bus agents, the present configuration of the bus including the... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20070236274 - Switch circuit to control on/off of a high voltage source: A switch circuit to control a high voltage source is presented. It includes a JFET transistor, a resistive device, a first transistor and a second transistor. The JFET transistor is coupled to the high voltage source. The first transistor is connected in serial with the JFET transistor to output a... Agent: Rosenberg, Klein & Lee

20070236275 - Global reference voltage distribution system with local reference voltages referred to ground and supply: A system and method for distributing a reference voltage in a system such as an integrated circuit wherein a master reference voltage is distributed via a differential pair of conductors Local reference voltage generators produce local reference voltages proportional to the master reference voltage, but referred to local ground and/or... Agent: Dr. Mark M. Friedman C/o Bill Polkinghorn - Discovery Dispatch

20070236276 - Semiconductor integrated circuit and source voltage/substrate bias control circuit: This disclosure concerns a semiconductor integrated circuit that includes a semiconductor substrate, a plurality of well regions formed on one surface of the semiconductor substrate and electrically isolated from each other, a plurality of MOS transistors formed in the well regions and a substrate bias generator that applies substrate biases... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070236277 - Semiconductor integrated circuit device and substrate bias controlling method: A semiconductor integrated circuit device includes: a first bias generating circuit, a second bias generating circuit and a control circuit. The first bias generating circuit generates a first substrate bias voltage of a P-channel transistor. The second bias generating circuit generates a second substrate bias voltage of N-channel transistor. The... Agent: Foley And Lardner LLP Suite 500

20070236278 - Internal voltage generator for semiconductor integrated circuit capable of compensating for change in voltage level: The internal voltage generator includes a level detector for comparing an internal voltage with a reference voltage to output a level detecting signal; a pump controller for outputting a pump enable signal in response to a mode signal and the level detecting signal; and a voltage pump for generating the... Agent: Venable LLP

20070236279 - Method and apparatus for providing a regulated voltage at a voltage output: An apparatus for supplying a glitch-free, regulated voltage at a voltage output includes a main transistor, which is connected between an intermediate potential and the voltage output, a bypass transistor, which is connected between a supply potential and the voltage output, the intermediate potential being lower than the supply potential... Agent: Baker Botts L.L.P. Patent Department

20070236280 - Active bandpass filter: An active bandpass filter is disclosed herein. The active bandpass filter has N transmission lines, N negative resistant circuits, a DC circuit, and at least (N−1) coupling circuit. Each transmission line has a first end and a second end. Each negative resistant circuit has a third end and a fourth... Agent: Wpat, PC

20070236281 - Method and apparatus for tuning resistors and capacitors: A two-step tuning process for resistors and capacitors in an integrated circuit is described. In the first step of the tuning process, an on-chip adjustable resistor is tuned based on an external resistor to obtain a tuned resistor. The value of the tuned resistor is accurate to within a target... Agent: Qualcomm Incorporated

20070236282 - System and method for dynamic power-optimization of analog active filters: A circuit including two operational amplifiers connected in parallel. For the purpose of this explanation, assume that an equivalent input noise of a circuit with one operational amplifier is too high. Where two operational amplifiers, are connected in parallel, the signals from the operational amplifiers add as currents at the... Agent: Baker Botts L.L.P.

20070236283 - Circuit to optimize charging of bootstrap capacitor with bootstrap diode emulator: A circuit for optimizing charging of a bootstrap capacitor connected to a high side floating supply voltage at a first terminal and to a switched node voltage at a second terminal, the circuit for optimizing being included in a gate driver circuit having a high- and a low-side driver circuits... Agent: Ostrolenk Faber Gerb & Soffen

20070229118 - Phase comparator: A phase comparator includes: first and second detecting units for detecting an amplitude value of a clock signal at falling timing or rising timing of a data signal; an edge comparing unit for identifying as to whether the first detecting unit detects an amplitude value under a rising state or... Agent: Birch Stewart Kolasch & Birch

20070229119 - Comparator circuit: It is intended to provide a comparator circuit which uses a switched capacitor and has a small circuit size. An input INA is supplied to positive input terminals of comparators Com1 and Com2 through a capacitor Ca by means of a switch SW1. An input INB is supplied to a... Agent: Osha Liang L.L.P.

20070229117 - Phase and amplitude modulator: The invention relates to an apparatus for precise modulation of signal phase and signal delay, respectively, and signal amplitude, comprising a first fixed-delay device having its input coupled to an input signal, a first variable delay device having its input coupled to said input signal and having a control input... Agent: Rankin, Hill, Porter & Clark LLP

20070229121 - Programmable crossbar signal processor with input/output tip interconnection: A device including a nanowire crossbar array including a programmable material layer, at least one of input or output circuitry, and at least one array of input or output tips to provide an electrical connection between the nanowire crossbar array and the input or output circuitry.... Agent: Blaise Mouttet

20070229120 - Temperature characteristic correction method and sensor amplification circuit: A temperature characteristic correction method enabling easy setting of correction points, while reducing deviations of an output signal from a target value and preventing power supply noise and power consumption from increasing. The method includes storing correction patterns, each of which includes correction points set at a temperature interval that... Agent: Arent Fox PLLC

20070229122 - Integrated circuit and signal processing apparatus using the same: An integrated circuit that operates with application of an external power source supplying a first source voltage, the circuit comprising: a source voltage monitoring unit that monitors the level of the first source voltage supplied from the external power source, and that determines whether the first source voltage is supplied... Agent: SocalIPLaw Group LLP

20070229123 - Semiconductor device for microphone applications: A semiconductor device for microphone applications includes an integrated circuit chip that includes a field-effect transistor, a resistor, a diode, and a capacitor. The field-effect transistor has a source terminal, a drain terminal, and a gate terminal. The resistor has first and second resistor terminals coupled respectively to the source... Agent: Ladas & Parry LLP

20070229124 - Driving circuit: In addition to two-stage CMOS inverters for inverting and amplifying the input signal IN, a rising edge detector 3 for detecting the rising edge of the input signal IN, and outputting a rising edge detection signal S3 having a pulse width corresponding to the ambient temperature, and a PMOS 5... Agent: Volentine & Whitt PLLC

20070229125 - Chopper circuit that chops edge of control signal: A chopper circuit has a delay circuit that delays a received control signal and a difference detection circuit that detects a difference between a control signal delayed by the delay circuit and the received control signal. A first threshold based on which the delay circuit checks a change in the... Agent: Arent Fox PLLC

20070229126 - Offset adjustment methods of signal converting circuits: An image sensor includes a photosensitive element that generates an electrical signal corresponding to light incident thereon and a ramp signal generator that generates a ramp signal. Generation of the ramp signal is initiated in response to activation of a ramp enable signal. An offset adjusting circuit generates a counter... Agent: Myers Bigel Sibley & Sajovec

20070229128 - Clock supply device: Each clock supply unit comprises an inter-unit synchronization portion which operates when the clock supply unit is acting as a standby unit, using a clock signal from a DPLL of a unit which is active as reference, to apply a predetermined phase difference to the output clock signal of the... Agent: Staas & Halsey LLP

20070229129 - Pll circuit: A PLL (Phase Locked Loop) circuit having a main circuit and a dummy circuit is provided which is capable of reducing a phase offset between a reference clock and a feedback clock. In the PLL circuit, a phase of each of the reference clock and feedback clock each received through... Agent: Sughrue Mion, PLLC

20070229127 - Fast lock scheme for phase locked loops and delay locked loops: A fast lock scheme for phase locked loops and delay locked loops, where an embodiment comprises a startup circuit that is enabled at the beginning of a startup mode and is disabled upon a phase transition detection in the reference and feedback signals to the phase locked loop or delay... Agent: Sridhar R. Tirumalai

20070229130 - Charge pump circuit and method thereof: A charge pump circuit capable of canceling current mismatch and suppressing clock feedthrough. The charge pump circuit comprises a current source enabled by a first logical signal, a current sink enabled by a second logical signal, an integrating capacitor coupled to both the current source and the current sink, and... Agent: North America Intellectual Property Corporation

20070229131 - Cml circuit and clock distribution circuit: A clock distribution circuit according to an exemplary aspect of the present invention comprises a drive power boost signal generator which generates and outputs a drive power boost signal, and a CML circuit which outputs a first signal combined by a second signal when the drive power boost signal indicates... Agent: Mcginn Intellectual Property Law Group, PLLC

20070229133 - D flip-flop: A D flip-flop with a reduced power product or reduced clock line capacitance is disclosed. The flip-flop includes a half-static slave stage or a master stage with clock gating by the input and output. The half-static slave stage an output inverter and a feedback element consisting of a single switching... Agent: Merchant & Gould PC

20070229132 - Scannable domino latch redundancy for soft error rate protection with collision avoidance: A latch is described that provides soft error rate protection with integrated scan capability and collision avoidance. The latch has a latch output node and a first, second, and third sublatches. Each sublatch has a respective input circuitry, output node, and feedback circuitry coupled to the output node for reinforcing... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070229135 - Apparatus and method for generating pulses: An apparatus for generating pulses includes: (a) A delay unit having an input delay locus for receiving a delay unit input signal and an output delay locus for presenting an output delay signal. The delay unit output signal is delayed by a delay interval with respect to the input delay... Agent: Texas Instruments Incorporated

20070229134 - Multimode, uniform-latency clock generation circuit: A multimode, uniform-latency clock generation circuit (CGC) is described herein. In one example, the multimode, uniform-latency CGC generates a pulse clock signal via a clock generation path responsive to a clock chopping signal being active and generates a phase clock signal via the same clock generation path responsive to the... Agent: Qualcomm Incorporated

20070229136 - Reference voltage driving circuit with a compensating circuit: A compensating circuit for calibrating reference voltage, which is coupled to an operation amplifier having an input end and an output end within a reference voltage driving circuit, is provided in the present invention. The compensating circuit comprises a first capacitor, a second capacitor, and a first switch. The first... Agent: Bruce H. Troxell

20070229138 - Apparatus for improved delay voltage level shifting for large voltage differentials: A voltage level shifting device for translating a lower operating voltage to a higher operating voltage includes a first input node coupled to a first pull down device and a second input node coupled to a second pull down device. The second node receives a complementary logic signal with respect... Agent: Cantor Colburn LLP - IBM Rochester Division

20070229137 - Level shift circuit capable of preventing occurrence of malfunction when low power supply fluctuates, and semiconductor integrated circuit including the circuit: A level shift circuit includes two high-voltage PMOS, two high-voltage NMOS, and two low-voltage NMOS transistors. The first high-voltage PMOS is connected between a high voltage and a second output terminal, having a gate connected to a first output terminal. The second high-voltage PMOS is connected between the high voltage... Agent: Cooper & Dunham, LLP

20070229139 - Level shifter circuit with a wide operating voltage range: A level shifter circuit with a wide operating voltage range includes an inverter, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor, wherein electrical characteristics of the third transistor and the sixth transistor are opposite to those of the first... Agent: Jianq Chyun Intellectual Property Office

20070229140 - Mixer: A mixer includes first to fourth NMOS transistors, first and second switches, first to fourth current sources, a first impedance and a second impedance. The first NMOS transistor has a drain coupled to the first impedance and a drain of the third NMOS transistor, and a gate for receiving a... Agent: Birch Stewart Kolasch & Birch

20070229141 - Electronic fuse for overcurrent protection: Current is provided from a first node coupled to an output of a power supply to a second node coupled to a voltage supply input of an electronic device under test via a transistor having a first current-carrying electrode coupled to the first node and a second current-carrying electrode coupled... Agent: Larson Newman Abel Polansky & White, LLP

20070229142 - Gate driver output stage with bias circuit for high and wide operating voltage range: A simple, low cost, gate driver and bias circuit provides for a wider operating voltage range exceeding the normal component breakdown voltage of components such as NMOS and PMOS transistors. A CMOS process with an epitaxial layer as bulk and p-type substrate is used to implement the circuit in this... Agent: Ostrolenk Faber Gerb & Soffen

20070229143 - Power module: The invention relates to a power module comprising a substrate (2), whose surfaces are provided with at least one electrically conductive layer (4, 6), at least one active semiconductor chip (8), which is electrically connected to an electrically conductive layer (6), a film (12) consisting of an electrically conductive material,... Agent: Henry M Feiereisen, LLC

20070229144 - Circuit characteristics controller: A circuit characteristics controller (10) changes the supply voltage to circuit (12) on the basis of the characteristics of at least one transistor in circuit (12) so as to control the characteristics of circuit (12). The power source for compensation includes a threshold sensor that detects the threshold of the... Agent: Texas Instruments Incorporated

20070229145 - Method and apparatus for dynamic threshold voltage control of mos transistors in dynamic logic circuits: Metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, that are area efficient, and that exhibit improved drive strength and leakage current that are disclosed. A dynamic threshold voltage control scheme is used that does not require a change to existing MOS technology processes. Threshold voltage of the... Agent: Glenn Patent Group

20070229146 - Semiconductor device: This disclosure concerns a semiconductor device that includes a booster portion including first switches and first capacitors; and a voltage converter comprising boosting stages each of which includes a second capacitor whose one end is connected to a first voltage source via a second switch and whose other end is... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070229148 - Reference supply voltage circuit using more than two reference supply voltages: A reference supply voltage circuit includes a detecting device for detecting a first reference voltage, a comparator, and a preventing circuit for preventing any false operation during pre-operation indefinite time interval. The comparator outputs a signal which controls an operation circuit whose supply voltage is a second reference voltage equal... Agent: Wenderoth, Lind & Ponack L.L.P.

20070229147 - Circuit supply voltage control using an error sensor: For one disclosed embodiment, a supply voltage regulator is to control voltage at a first supply node for a circuit. The supply voltage regulator includes one or more first devices to couple the first supply node to a second supply node when the circuit is in a predetermined operational state... Agent: Intel Corporation C/o Intellevate, LLC

20070229150 - Low-voltage regulated current source: A low voltage regulated current source includes a feedback amplifier that forces a node voltage in both branches of the current mirror to equal to each other, by adjusting voltages in two branches of the current mirror to be equal to each other. The low voltage current mirror also has... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070229151 - Simple vds matching circuit: The voltage matching circuit includes: a first branch including a first transistor; a second branch including a second transistor; and a cascaded level shifter coupled between the first and second branches to match a voltage on the first transistor with a voltage on the second transistor.... Agent: Texas Instruments Incorporated

20070229149 - Voltage regulator having high voltage protection: A high voltage device is connected in a voltage divider and couples a regulated voltage to a comparator for voltage regulation. The high voltage device is biased to conduct a current during regulator operation. When regulator operation is terminated, a switch in the voltage divider is opened to terminate current... Agent: Beyer Weaver LLP