Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 09/07

20070222483 - Offset cancellation for sampled-data circuits: A comparator based circuit with effective offset cancellation includes first and second amplifiers and an offset capacitor operatively connected to the first and second amplifiers. An offset voltage source generates an offset voltage. A first switch connects the offset voltage source to ground during a first time period. The first... Agent: Gauthier & Connors, LLP

20070222481 - Drive circuit for electo-optical apparatus, method of driving electro-optical apparatus, electro-optical apparatus, and electronic system: At least one of a scanning-line drive part and a data-line drive part includes: a shift register for outputting transfer signals in sequence; a first enable supply line for supplying a plurality of series of first enable signals having a first pulse width smaller than that of the transfer signals;... Agent: Oliff & Berridge, PLC

20070222482 - Methods for adaptive trip point detection: Methods are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip... Agent: Law Office Of James Trosino

20070222485 - Circuit for driving a semiconductor element: A drive circuit is provided for driving a voltage-driven semiconductor element by producing a drive signal depending upon an input signal. The drive circuit comprises an output stage and a current-suppressing circuit. The output stage includes two semiconductor elements connected in series. The voltage-driven semiconductor element is connected to a... Agent: Posz Law Group, PLC

20070222484 - Input buffer: In one embodiment, the present invention includes an input buffer with a common gate amplifier having input terminals coupled to receive an incoming common mode voltage. The common gate amplifier may be configured to receive the incoming common mode voltage over a wide range of levels extending from a low... Agent: Trop Pruner & Hu, PC

20070222486 - Driver circuit connected to pulse shaping circuitry: In one embodiment a circuit, comprises a first terminal coupled to a voltage source switchable between a first voltage level and a second voltage level, a driver comprising a first inverter, a second inverter, an output stage comprising a PFET and an NFET having source drain paths connected in series... Agent: Hewlett-packard Company Intellectual Property Administration

20070222487 - Circuit for generating initialization signal: An initialization signal generation circuit is provided which includes a voltage divider for dividing an external voltage, generating an enable signal, and outputting the enable signal to a first node, a controller including at least one fuse, and adjusting a voltage level of the enable signal according to a cutting... Agent: Cooper & Dunham, LLP

20070222488 - Adjustable phase controlled clock and data recovery circuit: A clock and data recovery circuit including: means for generating a first and a second clock signal; means for receiving the first clock signal and for generating a third clock signal from the first clock signal and means for receiving the second clock signal and for generating a fourth clock... Agent: Schmeiser, Olsen & Watts

20070222489 - Voltage-controlled oscillator and adjustment circuit for voltage-con trolled oscillator: A voltage-controlled oscillator, has a tank circuit that has a first inductor having one end connected to a power supply potential, a second inductor having one end connected to said power supply potential, and a first variable capacitor connected between the other end of said first inductor and the other... Agent: Amin, Turocy & Calvin, LLP

20070222490 - Low power and low timing jitter phase-lock loop and method: A phase-lock loop generates an output clock signal from an input clock signal. The output clock signal is coupled through a clock tree and is fed back to a phase detector, which compares the phase of the output clock signal to the phase of the input clock signal. The output... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070222491 - Method and circuit for reducing or preventing disturbance signals when switching off a voltage supply, in particular in a household appliance: The object is to prevent, or at least to reduce, disturbance signals at the output of the voltage supply circuit, appearing when switching off a voltage supply circuit, in particular a data signal device appertaining to a household device, which can be connected to additional data signal devices by way... Agent: Lerner Greenberg Stemer LLP

20070222492 - Direct digital synthesizer with variable reference for improved spurious performance: Improvement of quantization errors that arise in a delay line with finite resolution. A direct digital synthesizer (DDS), which contains a numerically controlled oscillator (NCO) and a digital-to-phase converter (DPC), is placed in the feedback loop of a phase locked loop (PLL). The DDS is used as a fractional divider... Agent: Motorola, Inc Intellectual Property Section

20070222494 - Delay control circuit: A first variable delay circuit delays an input signal, introduces a first delay into a first edge of the input signal, and generates a first delay signal. A second variable delay circuit delays the input signal, introduces a second delay into a second edge, and generates a second delay signal.... Agent: Arent Fox PLLC

20070222493 - Digital-to-time converter: A digital-to-time converter (DTC) is provided, made from a plurality of series-connected cells. Each cell has an input interface to accept a signal, a control interface to accept a digital command, a delayed signal path, a minimum delay signal path, and an output interface. The signal path is selected in... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20070222495 - Method and device for clock synchronisation with a vestigial-sideband-modulated transmitted signal: A method for clock synchronisation between an amplitude-modulated or phase-modulated received signal (r(t)) and a transmitted signal (s(t)) estimates the timing offset (ε) between the received signal (r(t)) and the transmitted signal (s(t)) by means of a maximum-likelihood method. The maximum-likelihood method in this context is realised by an estimation... Agent: Ditthavong & Carlson, P.C.

20070222496 - Sensor circuit for measuring a measuring quantity: A sensor circuit has a first input terminal, a second input terminal and an output terminal, a capacitive sensor connected between the first input terminal and the output terminal, a field-effect transistor coupled to the output terminal at one of a source and a drain terminal and coupled to the... Agent: Maginot, Moore & Beck Chase Tower

20070222497 - Method of improving fuse state detection and yield in semiconductor applications: Disclosed are embodiments of an apparatus incorporating a detection circuit adapted for determining the state of selected fuses and a programming circuit for blowing selected fuses on demand. Also, disclosed are embodiments of an associated method. The detection circuit comprises a plurality of fuses in identical signal and reference legs... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070222500 - Boosting voltage generating circuit for generating a stable boosting voltage under a wider range of supply voltage and semiconductor memory device having the same: The boosting voltage generating circuit of example embodiments may include a boosting level detection unit, a first boosting pump, and a second boosting pump. The boosting level detection unit may be configured to generate a target level detection signal and a margin level detection signal. The target level detection signal... Agent: Harness, Dickey & Pierce, P.L.C

20070222499 - Swing width control circuit and high voltage pumping circuit using the same: A swing width control circuit and a high voltage pumping circuit using the same are disclosed. The swing width control circuit includes a swing width controller for receiving a first pumping signal having a first swing width and generating a second pumping signal having a second swing width larger than... Agent: Cooper & Dunham, LLP

20070222501 - Programmable fractional charge pump for dc-dc converter: A charge pump provides a programmable multiplication factor for generating an output voltage. A first output voltage may be generated by connecting a first plurality of N capacitors in a first plurality of (N+1) configurations. A second output voltage may be generated by connecting a second plurality of M capacitors... Agent: Bever Hoffman & Harms, LLP Tri-valley Office

20070222498 - Slew rate control of a charge pump: A charge pump system including a clock circuit and a charge pump circuit is provided. The clock circuit provides a first clock with a frequency based on a memory block select signal indicative of load capacitance of a charge node. The charge pump circuit receives the first clock and charges... Agent: The Law Offices Of Gary R. Stanford

20070222502 - Semiconductor apparatus: A semiconductor apparatus includes a constant voltage circuit that converts an input voltage and outputs a prescribed constant voltage. The constant voltage circuit includes an output transistor that receives an input of a control signal and outputs a current (from an input terminal to an output terminal) in accordance with... Agent: Cooper & Dunham, LLP

20070216447 - Current comparator using wide swing current mirrors: A current comparator includes an input node for receiving an input current, an output node, a first wide swing current mirror having an input coupled to the input node of the current comparator, a power node for receiving a first power supply voltage such as ground, and an output coupled... Agent: Hogan & Hartson LLP

20070216448 - Apparatus for adaptive trip point detection: Apparatus are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip... Agent: Law Office Of James Trosino

20070216449 - Reduction of the time for executing an externally commanded transfer of data in an integrated device: Cumulative delay contributions introduced by an input buffer and by the metal line that distributes the buffered external control signal to data transfer circuits for performing a transfer of data to and from an integrated device are reduced by having the external signal distributed unbuffered through a metal line of... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070216450 - Semiconductor integrated circuit device and semiconductor integrated circuit system: A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing... Agent: Mcdermott Will & Emery LLP

20070216451 - Divider circuit: A divider circuit comprises at least two clock edge controlled differential buffer store elements, each being clocked by complementary input clock signals, each comprising internal storage nodes which are pre-chargeable to a pre-charge potential, and each comprising a differential data input. The internal storage nodes of the buffer store elements... Agent: Maginot, Moore & Beck Chase Tower

20070216452 - Power supply for a vehicle: A power supply system that supplies high-voltage power to a vehicle drive motor is provided to achieve reduction in size, weight and cost of power supply. The power supply system includes a plurality of battery modules connected in series. With the intermediate connection point of the battery modules as an... Agent: Knobbe Martens Olson & Bear LLP

20070216453 - Power-on reset signal generation circuit and method: A power-on reset (POR) circuit (200) can include a voltage divider section (202) having a first divider resistor (R21), a second divider resistor (R22), and a diode connected transistor (N22). Signal generator section (204) can include a transistor N21 that is activated according to a potential generated by voltage divider... Agent: Haverstock & Owens, LLP

20070216454 - Fast locking mechanism for delay lock loops and phase lock loops: A fast lock mechanism for delay lock loops and phase lock loops. A first circuit is coupled to receive an input clock signal and to generate an output clock signal responsive to the input clock signal. The first circuit includes a charge pump and delay cells. The charge pump generates... Agent: Blakely Sokoloff Taylor & Zafman

20070216456 - Delay locked loop and method of locking a clock signal: A delay locked loop includes a variable delay unit, a phase inversion unit, a delay selecting unit, a delay control unit and an inversion control unit. The variable delay unit delays a reference clock signal based on phase difference between a first feedback clock signal and a reference clock signal,... Agent: Volentine & Whitt PLLC

20070216455 - Partial cascode delay locked loop architecture: Various embodiments for a partial cascode delay locked loop architecture are described. In one embodiment, an apparatus may include a delay locked loop circuit having a plurality of partial cascode circuits. The plurality of partial cascode circuits may be arranged to reduce phase noise from a ground power supply voltage... Agent: Tyco Electronics Corporation

20070216457 - Methods and arrangements to adjust a duty cycle: Methods and arrangements to adjust a duty cycle of a clock signal are disclosed. Embodiments may include a duty cycle controller to adjust the duty cycle of the clock signal based upon a delay signal and an input clock signal. A duty cycle detector may determine signals with frequencies based... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20070216458 - Pwm buffer circuit for adjusting a frequency and a duty cycle of a pwm signal: A PWM buffer circuit includes a duty cycle converting circuit and a frequency-fixed PWM signal generating circuit. The duty cycle converting circuit is used for receiving a first PWM signal and then generating a duty cycle reference voltage on the basis of the first PWM signal. The duty cycle reference... Agent: Birch Stewart Kolasch & Birch

20070216459 - Ac power source controller: An AC power source controller includes an input side, which is electrically connected to an output side via a power source controlling interface; and a phase modulator, which is electrically connected to the power source controlling interface. The phase modulator includes a microcontroller unit, an encoding DIP switch, a control... Agent: Hdsl

20070216460 - Dynamic flip-flop circuit: A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070216461 - Semiconductor device and an electronic apparatus incorporating the semiconductor device: A semiconductor device and an electronic apparatus incorporating the semiconductor device are disclosed. The semiconductor device includes a power circuit that further includes a power transistor for providing current to a load (load current), a temperature detector for detecting the temperature of the power transistor, and a current detector for... Agent: Dickstein Shapiro LLP

20070216462 - Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit: A clock generation circuit receives a reference clock signal for outputting clock signals to peripheral circuits. A duty ratio of at least one of output buffer signals output from buffer circuits included in the clock generation circuit is varied so that a duty ratio of at least one of the... Agent: Mcdermott Will & Emery LLP

20070216463 - Semiconductor device: In order to prevent a signal of a signal wiring from receiving a bad influence due to a power supply capacitor, provided is a semiconductor including a high reference potential terminal and a low reference potential terminal composing power supply voltage terminals; a first MOS capacitor in which a gate... Agent: Arent Fox PLLC

20070216464 - Circuit for distributing an initial signal with a tree structure, protected against logic random events: An embodiment of the invention relates to a circuit for distributing an initial signal, comprising an input node receiving the initial signal, a plurality of terminal nodes each providing at least one resulting signal to a circuit component, and different connection branches between the input node and the plurality of... Agent: Graybeal Jackson Haley LLP

20070216465 - Semiconductor device: There is provided a semiconductor device including a first logic circuit to operate based on a first power supply and a second power supply, and a second logic circuit to operate based on the first power supply and a third power supply boosted from the second power supply. The second... Agent: Young & Thompson

20070216466 - Systems and methods for creating and using a conditioning signal: Systems and methods for creating and using a conditioning signal are provided. In some embodiments, systems for creating a conditioning signal providing information regarding an input signal are provided, wherein the systems comprise: a signal conditioning developer that receives the input signal and produces the conditioning signal; a delay device... Agent: Wilmerhale/columbia University

20070216467 - Semiconductor device including internal voltage generation circuit: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is... Agent: Mcdermott Will & Emery LLP

20070216468 - Thermal sensor and method: In one embodiment, an apparatus is constituted with a temperature sensing circuit adapted to be coupled to a current sources circuit, and configured to measure a circuit temperature and to generate a temperature-indicating signal in response to the circuit temperature and an adjustable current output by the current sources circuit;... Agent: Schwabe, Williamson & Wyatt, P.C.

20070216469 - Semiconductor circuit: A semiconductor circuit suitable for normally-on switching elements or switching elements low in threshold voltage. A negative power supply is charged by a high-voltage power supply. A high-voltage switch controls the advisability of applying a voltage to a high-voltage terminal. With deducing the power supply to power switching elements, the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070216471 - Dual-voltage generation system: A voltage generation system for generating operating voltages for memory devices, especially non-volatile memories, from a single external high voltage source. In one embodiment, the system comprises an input terminal for receiving an external voltage, a charge pump for producing a first high voltage based on the external voltage to... Agent: Howard Chen, Esq. Preston Gates & Ellis LLP

20070216470 - Methods and apparatus for reduced hardware multiple variable voltage generator: A circuit is described that generates multiple voltages each having a common reference point. The circuit uses a feedback control loop to generate a center voltage, a first voltage generator, and a second voltage generator. The first voltage generator generates a first high voltage related to the center voltage plus... Agent: Priest & Goldstein, PLLC

20070216472 - Generation of a reference voltage: A circuit of generation of a reference voltage by a first MOS transistor connected to a first terminal of application of a supply voltage, the first transistor being in series with a second MOS transistor controlled by an input stage of a transconductance amplifier and their junction point defining an... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070216473 - Midpoint potential generating circuit for use in a semiconductor device: An object of the invention is to improve a defect caused at the time of starting a midpoint potential generating circuit for use in a semiconductor device. A bias generating circuit supplies a grounding potential as a bias voltage Vbias and sets a midpoint potential of capacitors C1 and C2... Agent: Arent Fox PLLC

20070216474 - Filter circuit: A filter circuit includes a voltage amplifier, a resistor, a capacitor, and an analog switch connected between the voltage amplifier and the capacitor. When the voltage amplifier is turned on, the analog switch is opened so that the capacitor is disconnected from the voltage amplifier. Thus, an output voltage of... Agent: Posz Law Group, PLC

20070210834 - Reset detection circuit in semiconductor integrated circuit: A reset detection circuit for a logic circuit and a RAM includes a first determining circuit, a second determining circuit and a reset signal generating circuit. The first determining circuit operates with a first voltage and determines whether a second voltage is equal to or higher than a reset voltage... Agent: Posz Law Group, PLC

20070210835 - Multiple sampling sample and hold architectures: A sample and hold circuit architecture samples using two capacitors that are cyclically switched between charge and discharge modes. The sample and hold circuit includes a buffer to receive an input signal to be sampled, a first sampling capacitor, a second sampling capacitor, and an amplifier. The first sampling capacitor... Agent: Gauthier & Connors LLP Suite 2300

20070210837 - Electric circuit, and pulse power source: A pulse power source comprises a first circuit, a second circuit, a transformer for coupling the first circuit and the second circuit, and a switching controller. The second circuit comprises a third semiconductor switch connected in series with a secondary winding of the transformer. The third semiconductor switch is connected... Agent: Burr & Brown

20070210836 - Precision differential level shifter: A differential level shifter employs a variable current mirror to maintain a reference voltage at one output while the other output follows a differential input. Resistor networks allow postproduction trimming of load resistors and the current mirror, resulting in a precise and accurate output of the differential signal. An active... Agent: Holland & Midgley, LLP

20070210839 - Output buffer circuit and method with self-adaptive driving capability: An output buffer for providing a buffered current to a circuit load includes a plurality of operative stages, each one for generating a component of the buffered current and an enabling circuit for selectively enabling each operative stage. The output buffer further comprises at least one auxiliary stage and control... Agent: Paul F. Rusyn Graybeal Jackson Haley LLP

20070210838 - High voltage tolerant input buffer: A high voltage tolerant input buffer capable of operating across wide range of power supply, including low power supply voltages, dynamically controls the gate voltage of an NMOS pass transistor by sensing the incoming high voltage signal at the pad and dynamically controlling the gate bias voltage of NMOS pass... Agent: Hogan & Hartson LLP

20070210840 - System and method for power on reset and under voltage lockout schemes: A system and method for power-on reset and under-voltage lockout schemes. The system includes a first transistor, which includes a first gate, a first terminal, and a second terminal, the second terminal being biased to a predetermined voltage. The system includes a second transistor, which include a second gate, a... Agent: Townsend And Townsend And Crew, LLP

20070210842 - Delay locked loop circuit and semiconductor integrated circuit device: A technology capable of avoiding malfunction of a delay locked loop without generating a constant phase error in a delay locked loop circuit is provided. In a delay locked loop circuit, a control circuit is disposed in the outside of a delay locked loop, and in phase comparison of the... Agent: Miles & Stockbridge PC

20070210843 - Dll circuit and semiconductor device having the same: A DLL circuit comprising: delay circuits which output first and second delayed clock signals obtained by delaying the reference clock signal by a delay times selected according to control signals; an interpolation circuit which interpolates a phase difference between the delayed clock signals to output an internal clock signal; an... Agent: Hayes Soloway P.C.

20070210841 - Dll circuit of semiconductor memory apparatus and method of delaying and locking clock in semiconductor memory apparatus: A DLL circuit of a semiconductor memory apparatus includes a frequency sensing unit that generates and outputs a high frequency signal and a low frequency signal on the basis of a CAS latency signal. A clock dividing unit divides the frequency of an internal clock by a predetermined value and... Agent: Venable LLP

20070210844 - Pulse frequency modulation oscillating circuit for a dc/dc converter: A pulse frequency modulation oscillating circuit includes a reference voltage generator for generating a first reference voltage and a second reference voltage, a first comparison circuit for comparing a state signal with the first reference voltage, a second comparison circuit for comparing the state signal with the second reference voltage,... Agent: North America Intellectual Property Corporation

20070210845 - Storage elements using nanotube switching elements: Data storage circuits and components of such circuits constructed using nanotube switching elements. The storage circuits may be stand-alone devices or cells incorporated into other devices or circuits. The data storage circuits include or can be used in latches, master-slave flip-flops, digital logic circuits, memory devices and other circuits. In... Agent: Wilmer Cutler Pickering Hale And Dorr LLP

20070210846 - Inverter gate delay line with delay adjustment circuit: The present invention provides a digital circuit comprising an inverter gate delay line and a delay adjustment circuit. The inverter gate delay line comprises a series of a plurality of inverter gates that receives a serial data. The delay adjustment circuit comprises a replica inverter gate delay line comprising a... Agent: John Chen Room 303

20070210847 - Parameterization method for a converter and converter implementing the method: making the delay time (T) between the two voltage edges (11, 12, 13, 14) generated vary, and determining an optimal delay time (T2) starting from a quantity (Ipeak, Ieff) representative of the common-mode current measured for the various values of the delay time (T).... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070210849 - Clock generation circuit: In a second system that generates a clock signal that is synchronized with a first system, a control voltage value that controls the second oscillator such that the second system is synchronized with the first system is monitored according to the phase difference between a reference signal that is generated... Agent: Mcginn Intellectual Property Law Group, PLLC

20070210850 - Internal clock generator: An internal clock generator that modulates a high-frequency clock signal to a low-frequency signal to transmit the low-frequency signal if a transmission line for transmitting the high-frequency clock signal is long, and then restores the transmitted low-frequency signal to the high-frequency signal. The internal clock generator includes a first signal... Agent: Ladas & Parry LLP

20070210848 - Pulse generator and method of generating pulses, such as for template generation in impulse radio systems: The pulse generator comprises: a delay line arranged to receive a digital input signal and to produce a plurality of delay line output signals; first and second pulse generator blocks comprising logic circuitry arranged to generate a plurality of successive first output pulses in response to said different delay line... Agent: Harness, Dickey & Pierce, P.L.C

20070210851 - Qkd system with dual-mode pulse generator: A QKD system that includes a dual-mode pulse generator capable of operating as both a clock-based pulse generator and a delay-based pulse generator while minimizing the limitations of these two types of pulse generators is disclosed. When the pulse generator operates in “delay mode,” the smallest output pulse width possible... Agent: OpticusIPLaw, PLLC

20070210852 - Voltage level shift circuit and semiconductor integrated circuit: Provided is a voltage level shift circuit including: a first voltage level shift circuit formed of a P-channel enhancement type transistor (M1) and an N-channel depletion type MOS transistor (M3); and a second voltage level shift circuit formed of a P-channel enhancement type transistor (M2) and an N-channel depletion type... Agent: Brinks Hofer Gilson & Lione

20070210853 - Voltage generation circuit and semiconductor memory using the same: The voltage generation circuit that have a standard voltage generation circuit that generates a reference voltage; a minimum voltage setting circuit that sets a minimum voltage; a voltage setting circuit that has a plurality of resistive elements and a plurality of gate transistors connected to a plurality of the resistive... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070210854 - Methods and systems for semiconductor diode junction protection: Protection methods and protection systems for semiconductor devices with diode junctions. The protection methods and protection systems detect the anomalies in the behavior of the junction and protect the device from damage.... Agent: Burns & Levinson, LLP

20070210855 - Replica biased low power voltage regulator: An apparatus, method and system are described for providing a low power replica biased regulated supply voltage without the size requirements of using a large resistor coupled between the source of a master transistor and ground. Instead, a source of a replica transistor diode may be biased with a bias... Agent: Blakely Sokoloff Taylor & Zafman

20070210856 - Band gap constant-voltage circuit: Provided is a band gap constant-voltage circuit capable of achieving a quick startup time to thereby preventing an output voltage from being stabilized at 0 V due to noise or the like even under the normal condition. The band gap constant-voltage circuit according to the present invention includes: an output... Agent: Brinks Hofer Gilson & Lione

20070210857 - Power gating circuit of a signal processing system: A power gating circuit of a signal processing system includes a low dropout linear regulator, a control circuit, and an output circuit. The low dropout linear regulator includes a first transistor, an operational amplifier, a first resistor, a second resistor, and an output end. The output circuit includes a fourth... Agent: North America Intellectual Property Corporation

20070210858 - Circuit and method for fast switching of a current mirror with large mosfet size: The present invention discloses a fast switching current mirror circuit and method for generating fast switching current. The circuit and method for fast switching of a current mirror with large MOSFET size will save space and current consumption.... Agent: Stmicroelectronics, Inc.

20070205808 - Sense amplifier: The present invention provides a sense amplifier including a current sense circuit that outputs a detection voltage corresponding to an electric current intended for comparison, a current sense circuit that outputs a reference voltage corresponding to an electric current for reference, and a comparison circuit that compares the detection voltage... Agent: Nixon Peabody, LLP

20070205807 - Signal amplifier: The amplifier includes first and second inverters that form a flip-flop. In this flip-flop, an input of first inverter is connected to an output of the second inverter, and an output of the first inverter is connected to an input of the second inverter. Control terminals of at least one... Agent: Sughrue Mion, PLLC

20070205809 - Semiconductor device, and power supply device and image pickup device using the same: An electronic circuit includes a semiconductor device which has an internal circuit that uses a positive power supply voltage and a negative power supply voltage, and which controls the operation of the above-mentioned internal circuit by an external input. The semiconductor device includes an input signal detection circuit that operates... Agent: Rohm Co., Ltd. C/o Keating & Bennett, LLP

20070205810 - Switched gate current driver: Embodiments of the present invention are directed to current driver circuits and methods for driving a load. The current driver circuit includes a first transistor (Q1) and a second transistor (Q2) each having a gate, a drain and a source. The drain of the second transistor (Q2) forms the output... Agent: Fliesler Meyer LLP

20070205812 - Current drive circuit reducing vds dependency: A first transistor is provided in a first route and a second transistor is provided in a second route, the first route and the second route constituting a current mirror circuit. The sources of the transistors are grounded. In order to match VDS of the first transistor and that of... Agent: Cantor Colburn, LLP

20070205811 - Wave shaping output driver to adjust slew rate and/or pre-emphasis of an output signal: Integrated circuit, system, method and machine readable media embodiments adjust a slew rate and/or a transmit pre-emphasis of an output signal at selected phases during a bit time. A timing circuit provides a plurality of delayed data signals in response to a clock signal. A plurality of adjustable impedance circuits,... Agent: Deniro/rambus

20070205813 - Circuit and method for reducing jitter and/or phase jump problems in a clock amplifier device: A circuit for reducing jitter and/or phase jump problems in a clock amplifier device due to variations in the voltage supplied to the clock amplifier device has an input terminal connected to the supply voltage to allow the circuit to sense the actual supply voltage, and an output terminal connected... Agent: Maginot, Moore & Beck Chase Tower

20070205814 - Electronic driver device for an external load for which the slew rate of the output signal is independent of the external load capacity and the corresponding integrated component: This disclosure relates to an electronic driver device for an external load to which an input signal is applied at its input and that produces an output signal to the external load from its output. Such an electronic driver device includes elements that reduce dependence of the slew rate of... Agent: Westman Champlin & Kelly, P.A.

20070205815 - Stochastic reset circuit: In one embodiment, an integrated circuit device includes a power on reset (POR) circuit and a stochastic reset circuit configured to control enabling and disabling of the POR circuit. The stochastic reset circuit may have a value from among many possible values. The POR circuit may be enabled during a... Agent: Okamoto & Benedicto, LLP

20070205816 - Phase-locked loop circuit, delay-locked loop circuit and method of tuning output frequencies of the same: A phase-locked loop (PLL) circuit includes a phase/frequency detector (PFD), a charge pump, a loop filter, a control circuit, a VCO, and a feedback circuit. The control circuit generates a digital control signal in response to the up signal, the down signal, and the oscillation-control voltage. The VCO generates an... Agent: Mills & Onello LLP

20070205817 - Method, circuit and system for detecting a locked state of a clock synchronization circuit: Locked state detection circuits, devices, systems, and methods for detecting a locked or synchronized state of a clock synchronization circuit are described. Detection of a locked state includes a circuit including a phase detector configured to generate a delay adjustment signal in response to comparison of a forward path signal... Agent: Trask Britt, P.C./ Micron Technology

20070205818 - High-speed data sampler with input threshold adjustment: Method and apparatus for sampling a high-speed digital signal include providing a data signal to a differential data input circuit, an offset control signal, and a strobe pulse. In response to the strobe pulse, the data signal is resolved into an output logic state based to a relatively greater extent... Agent: Patterson, Thuente, Skaar & Christensen, P.A.

20070205819 - Delay circuit with constant delay time regardless of process condition or voltage variation and pulse generator using the same: A delaying circuit is capable of constantly maintaining its delay regardless of process condition or voltage variation and a pulse generating circuit uses the delaying circuit. The delay circuit for delaying a signal that is inputted to an input stage by a predetermined time to output to an output stage,... Agent: Lowe Hauptman Berner, LLP

20070205820 - Low-power consumption high-voltage cmos driving circuit: The low power consumption CMOS high voltage driving circuit relates to a kind of high voltage driving circuit for output driving, and there is an out buffer stage between the output end of the level switch stage and the input end of the high voltage output stage, comprising a high... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070205821 - Integrated circuit: An integrated circuit can be switched between operating modes without the need for a dedicated mode selection pin. A circuit for operation at a specified maximum supply voltage comprises first and second supply terminals, a first signal input for application of a regular input signal, a second signal input, and... Agent: Texas Instruments Incorporated

20070205822 - Data path differentiator for pre-emphasis requirement determination or slot identification: An apparatus and method is disclosed for generating path length information for two (usually redundant) receive paths in a receiving device such as a server blade so that the proper amount of equalization and/or pre-emphasis may be applied to receiver and driver circuits in the server blade. In one embodiment,... Agent: Emulex Design & Manufacturing Corporation C/o Morrison & Foerster LLP

20070205823 - Preventing reverse input current in a driver system: In one embodiment, a method is provided for preventing reverse input current from flowing into a power source. The method includes: providing a system having a plurality of operating modes for driving a load, wherein in each operating mode the power delivered to the load is a multiple of the... Agent: Sidley Austin LLP

20070205824 - Adjustable transistor body bias circuitry: An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements... Agent: G. Victor Treyz

20070205825 - Switched capacitor filter and feedback system: A loop filter (30) includes a first capacitor (31) provided between an input terminal for a current signal and a reference voltage, a switched capacitor circuit (32) provided between the input terminal and the first capacitor (31) and a second capacitor (33) provided in parallel to the first capacitor (31)... Agent: Mcdermott Will & Emery LLP