Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 05/07

20070120581 - Comparator circuit: An improved comparator circuit and associated methods are disclosed. In one embodiment, the comparator circuit comprises two voltage-to-time converter circuits, one for each input voltage to be compared, and an arbiter circuit for receiving the time-converted output of each converter. Each converter assesses the magnitude of its input voltage, and... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20070120582 - Output driver: An output driver includes a pull-up unit including a pull-up element and a first inductive peaking element connected in series between a first voltage and an output node and a pull-down unit including a pull-down element and a second inductive peaking element connected in series between a second voltage and... Agent: Mills & Onello LLP

20070120585 - Clock signal reproduction device and clock signal reproduction method: A phase comparator detects time lag or time lead of the phase of a data signal with respect to a reproduced clock signal from a first digital VCO. A random walk filter measures a difference between number of lags and number of leads, controls the first digital VCO to shift... Agent: Baker & Mckenzie LLP Patent Department

20070120583 - Method and apparatus for fast locking of a clock generating circuit: In a method and apparatus for using a clock generating circuit to minimize settling time after dynamic power supply voltage ramping, a clock signal may be generated using a clock generating circuit having, among other things, open feedback loop switch logic and a dynamic fast lock control signal generator. Whereupon,... Agent: Advanced Micro Devices, Inc. C/o Vedder Price Kaufman & Kammholz, P.C.

20070120584 - Phase- or frequency-locked loop circuit having a glitch detector for detecting triggering-edge-type glitches in a noisy signal: A phase- or frequency-locked loop circuit (200) that generates an accurate output signal (ACC_SYN_OUT) even in the presence of edge-triggering-type glitches (148, 304A, 304B) in the input reference clock signal (REF_CLK). The locked-loop circuit includes a phase or frequency difference detector (216) and a glitch detector (208) that generates a... Agent: Downs Rachlin Martin PLLC

20070120586 - Phase-locked loop: A phase-locked loop with reduced settling time, in particular in or for a transceiver circuit of a tire pressure monitoring system, is disclosed, The phase-locked loop includes, sequentially arranged in a signal path, phase comparators for generating a phase difference signal by comparing a reference input signal and an output... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20070120587 - Delay locked loop circuit and method: A delay locked loop includes initialization circuitry that ensures that a DLL is initialized to an operating point that is not to close to either end of a delay vs. control voltage characteristic. The initialization circuitry forces the DLL to initially search for a lock point starting from an initial... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20070120588 - Low-jitter clock distribution: A first oscillatory signal is distributed to a number of destinations in an integrated circuit die. The frequency of a second oscillatory signal is made to track the average frequency of the first oscillatory signal, using an injection locked oscillator, as such rejecting high frequency jitter. The second oscillatory signal... Agent: Blakely Sokoloff Taylor & Zafman

20070120589 - Driver circuit: A driver circuit includes first and second three-terminal active elements, and first and second delay units. The first and second three-terminal active elements are series-connected. Each of the first and second three-terminal active elements has an amplification function and first, second, and third electrodes. The second and third electrodes of... Agent: Blakely Sokoloff Taylor & Zafman

20070120590 - Apparatus for generating elevated voltage: Disclosed is an apparatus for generating an elevated voltage that compares an external supply voltage with a reference voltage, and performs voltage pumping using either the reference voltage or the external supply voltage as an input voltage of a pumping unit.... Agent: Venable LLP

20070120591 - Regulated charge pump with digital resistance control: A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070120592 - Semiconductor device with pump circuit: In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a... Agent: Mcdermott Will & Emery LLP

20070120593 - Apparatus for generating reference voltage in semiconductor memory apparatus: An apparatus for generating a reference voltage in a semiconductor memory apparatus according includes: a first voltage generating unit that generates a voltage proportional to temperature; a second voltage generating unit that generates a voltage inversely proportional to temperature; and a reference voltage generating unit that adjusts the amount of... Agent: Venable LLP

20070120594 - Method and apparatus for sensing current and voltage in circuits with voltage across an led: Methods and apparatuses to sense current and voltage in circuits with voltage drop. In one aspect of the invention, a circuit includes a transistor coupled to a voltage reference. A light emitting diode (LED) is coupled to be driven by the transistor in response to a voltage across an output... Agent: Blakely Sokoloff Taylor & Zafman

20070115031 - Differential sense amplifier circuit and method triggered by a clock signal through a switch circuit: A differential sense amplifier is described that can be configured as a preamplifier or a latch circuit as triggered by a clock signal connected to a switch circuit. When the clock signal is set at a first signal level, the switch circuit in the differential sense amplifier is activated so... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070115032 - Test mode and test method for a temperature tamper detection circuit: An integrated circuit temperature sensor includes a sensing circuit operable to determine whether the integrated circuit is currently exposed to one of a relatively low temperature or a relatively high temperature. A selection circuit operates to select a measured voltage across the base-emitter of a bipolar transistor of the integrated... Agent: Stmicroelectronics, Inc.

20070115033 - Class-ab output circuit: An output circuit includes: a current source transistor connected between a high-potential-side power supply and an output terminal; a current sinking transistor connected between a low-potential-side power supply and the output terminal; a third transistor constituting a current mirror circuit together with the current source transistor; a fourth transistor connected... Agent: Sughrue Mion, PLLC

20070115034 - Low-voltage differential signal driver with pre-emphasis circuit: A low-voltage differential signal driver with a pre-emphasis circuit having a current control circuit and a pre-emphasis circuit is provided. Wherein, the pre-emphasis circuit includes the current sourcing circuit and the current sinking circuit, both of which have similar circuit structure, coupled to the current control circuit, respectively. The current... Agent: Jianq Chyun Intellectual Property Office

20070115035 - Phase shifter: A Phase shifter for generating a phase-shifted, in particular phase-delayed, output signal from an input signal is disclosed. In one embodiment, the phase shifter includes a first delay line and at least one further delay line with respectively cascaded delay elements that form a U-shaped signal path along which at... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070115036 - Generating multi-phase clock signals using hierarchical delays: Circuits and methods for generating multi-phase clock signals using digitally-controlled hierarchical delay units (HDs) are provided. A plurality of serially-coupled HDs outputs clock signals that are phase-shifted relative to a reference clock signal. Each HD includes either one or two variable delay lines that provide coarse phase adjustment of an... Agent: Fish & NeaveIPGroup Ropes & Gray LLP

20070115037 - Voltage-pulse converting circuit and charge control system: A voltage-pulse converting circuit according to an embodiment of the invention includes: a first input terminal and a second input terminal applied with an input voltage to be converted into a pulse; an integrator having positive and negative input terminals; an input switching unit switching connection between the first and... Agent: Sughrue Mion, PLLC

20070115038 - Driver for voltage driven type switching element: A driver apparatus for a voltage driven type switching element and a method for driving a voltage driven type switching element that discharge an electrical charge stored at the gate terminal of the voltage driven type switching element at a discharge rate. The discharge rate is controlled so that the... Agent: Young & Basile, P.C.

20070115039 - Clock generator, system on a chip integrated circuit and methods for use therewith: A system on a chip integrated circuit includes a first circuit module and N other circuit modules that are operable to produce at least one output signal based on at least one input signal. A reference oscillator for generating a base clock signal for the first circuit module. A clock... Agent: Garlick Harrison & Markison

20070115040 - Pulse-signaling circuits for networks on chip: A pulse circuit contains an input stage configured to receive input pulses on input nodes using push-pull elements, wherein a given push-pull element is configured to receive an input pulse on a given input node and to provide a corresponding internal signal. The pulse circuit further contains a feedback loop... Agent: Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20070115041 - Level conversion circuit: A level conversion circuit that prevents the operation speed from decreasing when the power supply voltage decreases while appropriately performing level conversion. The level conversion circuit includes first and second PMOS transistors. A first NMOS transistor is connected to the first PMOS transistor and the second PMOS transistor. A second... Agent: Arent Fox PLLC

20070115042 - Accurate temperature measurement method for low beta transistors: An accurate temperature monitoring system that uses a precision current control circuit to apply accurately ratioed currents to a semiconductor device, which may be a bipolar junction transistor (BJT), used for sensing temperature. A change in base-emitter voltage (ΔVBE) proportional to the temperature of the BJT may be captured and... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070115043 - Current control technique: An output driver circuit and current control technique to facilitate high-speed buses with low noise is used to interface with high-speed dynamic RAMs (DRAMs). The architecture includes the following components: an input isolation block (120), an analog voltage divider (104), an input comparator (125), a sampling latch (130), a current... Agent: Deniro/rambus

20070115044 - Charge pump for intermediate voltage: A charge pump generates a voltage higher than an intermediate voltage and a regulator circuit provides a first regulated voltage higher than the intermediate voltage. A second stage includes a regulator stage using the first voltage to provide the intermediate voltage from the first voltage. A charge pump provides a... Agent: Sierra Patent Group, Ltd.

20070115045 - Constant voltage circuit: A constant voltage circuit is disclosed that includes an output control transistor and an overcurrent protection circuit. The overcurrent protection circuit includes a proportional current generation circuit part, a current division circuit part, a division ratio control circuit part, a current-voltage conversion circuit part, and an output current control circuit... Agent: Dickstein Shapiro LLP

20070115046 - Method and apparatus for tuning gmc filter: A system and method for providing a tunable GMC filter is disclosed wherein a transconducted element having an attenuator in a feedback loop therewith is allowed to oscillate at a first oscillation frequency. An input to the filter enables tuning of the oscillation frequency to a pre-determined frequency.... Agent: Howison & Arnott, L.l.p

20070109024 - Latch type sense amplifier: A latch type sense amplifier includes a latch unit, an amplifying unit and a circuit module for charging or discharging the latch unit. The latch unit is configured by two sets of serially coupled PMOS and NMOS transistors, whose gates and drains are cross-coupled. The amplifying unit is coupled between... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070109025 - Resonant gate drive circuit with centre-tapped transformer: This invention relates to a resonant gate drive circuit for a power switching device, such as a MOSFET, that uses a centre-tapped transformer to increase the driving gate voltage approximately twice as high as the supply voltage. The gate capacitance of the power switching device is charged and discharged by... Agent: Stephen J. Scribner Parteq Innovations

20070109026 - Fast, low offset ground sensing comparator: A fast, accurate, low offset comparator may be configured with multiple gain stages. A low gain, low input impedance, and fully differential common-gate amplifier may be configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption. The inputs of the comparator may comprise... Agent: Huffman Law Group, P.C.

20070109027 - Free-running numerically-controlled oscillator using complex multiplication with compensation for amplitude variation due to cumulative round-off errors: A method and apparatus for efficiently generating complex sinusoids of a desired frequency by multiplying a phasor by a predetermined value once every sampling interval, and using the highest order bits within the phasor to identify if the phasor is at an integer multiple 45 degrees and substituting components in... Agent: Philips Intellectual Property & Standards

20070109028 - Electrical device comprising analog frequency conversion circuitry and method for deriving characteristics thereof: An electrical device comprises analog conversion circuitry having an input and an output. The electrical device is essentially provided for converting a first input signal within a first frequency range applied to the input to a first output signal within a second frequency range different from the first frequency range... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20070109029 - Precision triangle waveform generator: A triangle waveform generator is set forth that comprises a capacitive element, a regulator, and a control circuit. The regulator is configured to charge the capacitive element in responsive to a first control signal and to discharge the capacitive element in response to a second control signal. The control circuit... Agent: Brinks Hofer Gilson & Lione

20070109030 - Phase-locked loop integrated circuits having fast phase locking characteristics: A phase-locked loop (PLL) integrated circuit includes a voltage-controlled oscillator and a loop filter having first and second input terminals and an output terminal coupled to an input of the voltage-controlled oscillator. A charge pump and a phase-lock accelerator are provided. The charge pump is configured to drive the first... Agent: Myers Bigel Sibley & Sajovec

20070109032 - Charge pump circuit and method thereof: A charge pump circuit and method thereof are provided. The example charge pump may include a first switch transistor supplying a first current to an output node in response to a first signal to increase a level of current at the output node, a second switch transistor sinking a second... Agent: Harness, Dickey & Pierce, P.L.C

20070109031 - Charge pump circuit with regulated current output: The output current of a current sink is regulated by a reference current provided by a current source and a reference voltage obtained by filtering the output voltage of the current sink. The current sink to be regulated is a voltage control current source, where the control voltage is obtained... Agent: North America Intellectual Property Corporation

20070109033 - Memory device having a duty ratio corrector: A memory device having a duty ratio corrector which can reduce power consumption by blocking current paths between output terminals and a ground terminal by applying input signals for turning off switching devices for generating an auxiliary voltage for correcting a duty ratio at an initial stage, and which can... Agent: Marshall, Gerstein & Borun LLP

20070109034 - Semiconductor device: The well voltage of a CMOS circuit having low-threshold-voltage MOSFETs is controlled when the power supply is turned on, during normal operation, and when the supply voltage is cut off. The CMOS circuit can thus operate stably with lower power consumption, because latching-up is reduced when the supply voltage is... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070109035 - Charge pump: A charge pump has a number of serially connected pumping stages, with each stage having a pair of cross coupled inverters having a first input and a second input. Each inverter has a N channel transistor having a first end and a second end, and a P channel transistor having... Agent: Dla Piper Rudnick Gray Cary Us, LLP

20070109036 - Semiconductor integrated circuit with reduced current consumption: A semiconductor integrated circuit includes a pump circuit configured to raise an external power supply voltage to generate a stepped-up voltage, and a detector circuit configured to detect the stepped-up voltage generated by the pump circuit to control activation/deactivation of the pump circuit, wherein the detector circuit includes a differential... Agent: Arent Fox PLLC

20070109037 - Bandgap reference circuits: Bandgap reference circuits capable operating in low voltage environments. In the bandgap reference circuit, a current generation circuit generates an output current obtained by combining a first current, a second current and a third current. The first current is converted from a first voltage and a first forward voltage of... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070109038 - Bias voltage generating circuit: In a bias voltage generating circuit for outputting through switching over a plurality of bias voltages and standby voltages provided for the respective bias voltages, a voltage return unit is provided for each bias voltage, and charges stored in the voltage return unit are supplied before power ON starts so... Agent: Mcdermott Will & Emery LLP

20070109039 - Reference circuit capable of supplying low voltage precisely: A reference voltage circuit is provided which includes a first MOS transistor including a first gate, and a second MOS transistor including a second gate. The first gate includes a first conductive type impurity with a concentration less than or equal to 1×1012 cm−3, or no impurity. The second gate... Agent: Cooper & Dunham, LLP

20070109040 - Stacked cmos current mirror using mosfets having different threshold voltages: A stacked CMOS current mirror using metal oxide semiconductor field effect transistors (MOSFETs) having different threshold voltages is disclosed. The stacked CMOS current mirror includes a first MOSFET having a drain and a gate which are connected to an input current terminal, a second MOSFET having a drain connected to... Agent: Sughrue Mion, PLLC

20070103203 - Sample hold circuit and multiplying d/a converter having the same: A sample hold circuit includes an op-amp, first capacitors provided on an inverting side of the op-amp and second capacitors provided on a non-inverting side. The sample hold circuit is configured such that a total capacitance of the first and second capacitors to which an input voltage is applied in... Agent: Posz Law Group, PLC

20070103204 - Method and apparatus for conversion between quasi differential signaling and true differential signaling: Transmit-side active signal management circuitry applies one or more active signal management processes to a digital signal at a transmit side of an interconnect. At the receive side of the interconnect, receive-side active signal management circuitry applies one or more corresponding active signal management processes, as appropriate, to the received... Agent: Larson Newman Abel Polansky & White, LLP

20070103206 - Constant voltage diode: A plurality of recesses are provided on a first main surface of an n-type semiconductor region of a semiconductor chip forming a constant voltage diode, and a p++-type semiconductor region is provided on the first main surface including inner faces of the plurality of recesses. Thereby, a portion of a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070103205 - Simultaneous lvds i/o signaling method and apparatus: First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to... Agent: Texas Instruments Incorporated

20070103208 - Source driver output stage circuit, buffer circuit and voltage adjusting method thereof: A buffer circuit applied to a source driver output stage circuit includes a buffer and a D-class amplifier. The buffer is coupled to an input voltage for accordingly outputting an output voltage. The D-class amplifier includes a comparator and a switch device. The comparator is for comparing the input voltage... Agent: Rabin & Berdo, PC

20070103207 - Source follower capable of increasing a voltage swing of an input terminal: A source follower, which can increase the voltage swing of the input terminal and overcome the insufficient driving capability of the typical source follower, includes a first current source, a first transistor, a second current source, a second transistor, a third current source and a third transistor, and uses the... Agent: Bacon & Thomas, PLLC

20070103209 - Apparatus and method for outputting data of semiconductor memory apparatus: An apparatus for outputting data of a semiconductor memory apparatus, which is capable of varying the slew rate and the data output timing, includes a bias generator that generates a bias having a level corresponding to a set value, a slew rate controller that controls a pull-up slew rate or... Agent: Venable LLP

20070103210 - Power-on reset circuit for an integrated circuit: A power-on reset circuit for an integrated circuit has a trigger unit that includes (i) a first voltage drop element with a first terminal for coupling to a supply voltage, and a second terminal; (ii) a second voltage drop element with a first terminal, coupled to the second terminal of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070103211 - Reset circuit: An exemplary reset circuit includes a reset signal generator providing a first reset signal, an inverter, and a NAND gate. The inverter includes an input connected to the reset signal generator for receiving the first reset signal, and an output. The NAND gate includes a first input connected to the... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070103212 - Digital delay locked loop capable of correcting duty cycle and its method: An apparatus for adjusting a clock signal, including: a clock multiplexing unit for receiving an external clock signal, an external clock bar signal and a feed-backed clock signal in order to select one of the external clock signal and the external clock bar signal as an output signal of the... Agent: Blakely Sokoloff Taylor & Zafman

20070103213 - Electronic circuitry: Timing signal generation and distribution are combined in operation of a signal path exhibiting endless electromagnetic continuity affording signal phase inversion and having associated regenerative active means. Two- or more-phases of substantially square-wave bipolar signals arise directly in traveling wave transmission-line embodiments compatible with semiconductor fabrication including CMOS. Coordination by... Agent: Dechert LLP

20070103214 - Switchable pll circuit: An electronic circuit includes a first and a second PLL stage (PLL1, PLL2) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an input signal (IN). When in parallel, only the second PLL circuit (PLL2) is actively supplying... Agent: Joseph J. Laks, Vice President Thomson Licensing LLC

20070103216 - Duty cycle corrector: A duty cycle corrector includes a first controllable delay configured to delay a first signal to provide a second signal, a second controllable delay configured to delay the second signal to provide a third signal, a circuit configured to adjust the first controllable delay and the second controllable delay to... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070103215 - Level shifter apparatus and method for minimizing duty cycle distortion: A level shifter apparatus and method for minimizing duty cycle distortion are provided. The level shifter includes a bank of comparators each having an associated threshold built into it. The comparators compare a difference in source voltages for two power domains to these built-in thresholds and output a signal indicative... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070103217 - Data retention in operational and sleep modes: A circuit is disclosed for retaining a signal value during a sleep mode while a portion of said circuit is powered down comprising: a clock signal input operable to receive a clock signal; at least one latch clocked by said clock signal; a data input, a data output and a... Agent: Nixon & Vanderhye, PC

20070103218 - Logical circuit: A logical circuit receives first and second input signals in which a period of a first logic level partially overlaps, and outputs first and second output signals in which a period of the first logic level does not overlap. The logical circuit comprises a first unit which changes a phase... Agent: Arent Fox PLLC

20070103220 - Clock driver: A clock driver is provided. A first driving unit is configured with a plurality of drivers and receives a first clock signal to drive a first pumping clock. A second driving unit is configured with a plurality of drivers and receives a second clock signal to drive a second pumping... Agent: Blakely Sokoloff Taylor & Zafman

20070103221 - Clock signal generating device, generating method, and signal processing device: When the operating speed of a switched capacitor circuit is accelerated, the timing of the clock signals regulating switched capacitor circuit operation can be disrupted by the effects of variation introduced by the manufacturing process as well as parasitic resistance and parasitic capacitance on signal traces. A control signal generating... Agent: Ratnerprestia

20070103219 - Duty ratio adjustment: There is disclosed a duty ratio adjustment for adjusting the duty ratio of an input clock signal. First and second one-shot pulse generation circuits respectively detect rising/tailing edges of an external input signal and output pulse signals of constant widths. Third and fourth one-shot pulse generation circuits respectively detect rising/tailing... Agent: Norman P. Soloway Hayes Soloway P.C.

20070103222 - Integrated circuit and method for generating a clock signal: An integrated circuit for generating a clock signal includes a voltage conversion unit, a maximum power determination unit, a clock control unit and a clock generator. The voltage conversion unit converts an external power supply voltage into an internal power supply voltage and detects a variance in current consumption of... Agent: F. Chau & Associates, LLC

20070103223 - Semiconductor device: A semiconductor device includes an output MOS transistor to control a current flowing into an L-load in accordance with a gate signal input to its gate, a level shifter to sift the level of an input signal based on a power supply voltage at a Vcc terminal to generate the... Agent: Foley And Lardner LLP Suite 500

20070103225 - Charge pump circuit: A first charge pump circuit section generates a first voltage, and a second charge pump circuit section generates a second voltage. A drive pulse supply section includes buffer elements supplying driving pulses to switching elements in the first charge pump circuit section and the second charge pump circuit section. A... Agent: Cantor Colburn, LLP

20070103224 - Semiconductor charge pump using mos (metal oxide semiconductor) transistor for current rectifier device: A semiconductor charge pump includes a plurality of P-channel MOS transistors being connected in series, a plurality of first pumping capacitors one electrode of each of which is connected to a connection point of each of the P-channel MOS transistors, a clock signal generating circuit which generates first and second... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070103226 - Reference voltage generator: A reference voltage generator according to an embodiment of the present invention includes: a voltage setting circuit generating a first voltage having a predetermined voltage difference from an output voltage; a voltage buffer receiving the first voltage and outputting a first power supply substantially equal to the first voltage; a... Agent: Mcginn Intellectual Property Law Group, PLLC

20070103227 - Voltage buffer for capacitive loads: A voltage buffer for capacitive loads isolates the load from the feedback loop. Using a variation of a follower arrangement, a second transistor outside of the feedback loop introduced. The current to the load is supplied through the second transistor, which is connected to have the same control gate level... Agent: Parsons Hsue & De Runtz, LLP - Sandisk Corporation

20070103228 - Stackable programmable passive device and a testing method: A programmable passive device comprising a first node and a second node. A plurality of passive device elements electrically coupled to the first node. A plurality of switches are electrically coupled to at least the second node and selectively coupled to a number of the plurality of passive device elements... Agent: Greenblum & Bernstein, P.L.C

20070096771 - Low voltage detection circuit: A low voltage detection circuit that is precise and highly reliable at the power-on as well as during normal operation is offered. The low voltage detection circuit includes a reference voltage generation circuit, a divider circuit, a comparator that serves as a comparison circuit, and a second constant current transistor... Agent: Morrison & Foerster LLP

20070096772 - System and method for time-delay integration imaging: A system is provided that includes an optical arrangement, an assembly of a plurality of detectors, and a signal processor. The optical arrangement is capable of viewing a scene that includes an object, where the scene is capable of moving through a field of view of the optical arrangement during... Agent: Alston & Bird LLP

20070096773 - Sample and hold circuit with multiple channel inputs, and analog-digital converter incorporating the same: It is required to provide a further reduction in circuit scale to perform time division sampling and holding using a plurality of sampling capacitors and a common operational amplifier. The plurality of sampling capacitors sample input analog signals of multiple channels on each channel. Switches are provided corresponding in number... Agent: Mcdermott Will & Emery LLP

20070096774 - System and method for clock switching: A system for clock-switching applied in the field of integrated circuits is described. A phase interpolator converts an input clock signal into a clock_A and a clock_B having a phase difference therebetween and transmitting the clock_A and the clock_B. A switch command unit connected to the phase interpolator receives either... Agent: Madson & Austin Gateway Tower West

20070096775 - Adaptive voltage scaling for an electronics device: Techniques for adaptively scaling voltage for a processing core are described. In one scheme, the logic speed and the wire speed for the processing core are characterized, e.g., using a ring oscillator having multiple signal paths composed of different circuit components. A target clock frequency for the processing core is... Agent: Qualcomm Incorporated

20070096778 - Amplifier with passive data port for continuous voip: A passive directional coupler is receptive of VoIP, Internet, and video/data signals, and is used in a CATV amplifier device to couple the video/data signals to the input terminal of an amplifier, and to bypass the VoIP and Internet signals to a modem port, for insuring continuous connection of the... Agent: Kenneth Watov Watov & Kipnes, P.C.

20070096777 - Differential driver: A differential driver includes first and second switches connected in parallel to a current source, with a pair of differential inputs connected to control inputs on the first and second switches, and first and second output drivers connected to the first and second switches through current mirrors.... Agent: Hewlett Packard Company

20070096776 - Technique for improving negative potential immunity of an integrated circuit: An integrated circuit (IC) with negative potential protection includes a switch, a gate drive circuit and a comparator. The switch includes a double-diffused metal-oxide semiconductor (DMOS) cell formed in a first-type epitaxial pocket, which is formed in a second-type substrate. The switch also includes a second-type+ isolation ring formed in... Agent: Delphi Technologies, Inc.

20070096779 - High voltage tolerant port driver: A plurality of output drive devices are capable of tolerating an overvoltage produced by an electrical connection with an external device operating in a high-voltage supply realm. The drive devices are capable of sustaining a continuous electrical connection to the elevated voltage levels and produce communications at an output voltage... Agent: Schneck & Schneck

20070096780 - Output stage interface circuit for outputting digital data onto a data bus: An output stage interface circuit (1) comprises a main bipolar transistor (Q1) coupling a data output terminal (5) to a first rail (2) to which the positive of the power supply voltage (VDD) is applied, and a substrate diffusion isolated main NMOS transistor (MN1) coupling the data output terminal (5)... Agent: Wolf Greenfield & Sacks, PC

20070096781 - Power supply voltage control apparatus: A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to minimum power supply voltage where normal operation is possible in a short period of time without errors in operation of internal... Agent: Greenblum & Bernstein, P.L.C

20070096782 - Method and apparatus for fail-safe and restartable system clock generation: A method and apparatus for fail-safe and restartable system clock generation provides recovery from failures due to incorrect clock generator settings or from marginal clock distribution components. Clock failure is detected at a point along the clock distribution path between the output of the clock generator and the downstream circuits.... Agent: Ibm Corporation (mh) C/o Mitch Harris, Attorney At Law, L.L.C.

20070096783 - Timing circuits with improved power supply jitter isolation technical background: In accordance with the invention, feed forward compensation of jitter induced by power supply noise is incorporated into the negative feedback control loop of a timing synchronization circuit, such as a phase locked loop or delay locked loop. More particularly, the dependence of the circuitry in the negative feedback loop,... Agent: Synnestvedt & Lechner, LLP

20070096784 - Delay locked loop circuit: A delay locked loop (DLL) circuit includes a first DLL section configured to receive a reference clock signal, to delay the reference clock signal in response to a first control signal, and to output a phase delayed signal having a predetermined phase delay. A second DLL section delays the reference... Agent: Mcginn Intellectual Property Law Group, PLLC

20070096785 - Dll circuit and test method thereof: A DLL circuit includes a first delay line circuit, a first phase comparison circuit, a control circuit, and a first selecting circuit. The first delay line circuit can change a delay amount and provide a delay to a first clock signal. The first phase comparison circuit can detect a phase... Agent: Mcginn Intellectual Property Law Group, PLLC

20070096786 - Reset circuit: An exemplary reset circuit includes a reset signal generator and a control circuit. The reset signal generator provides a first reset signal. The control circuit includes a first reset signal input, a control terminal, and an output. The first reset signal input receives the first reset signal, the control terminal... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070096787 - Method for improving the timing resolution of dll controlled delay lines: The timing resolution of a DLL based delay line can be achieved by making the number of delay stages in the master voltage-controlled delay line variable. By adjusting both the tap selected on a slave voltage-controlled delay line as well as the number of stages of delay in the master... Agent: Hogan & Hartson LLP

20070096788 - Adaptive coding and modulation using linked list data structures: A process is described to build physical layer frames with a modcode adapted to the signal quality of a destination terminal. Data packets assigned to the same modcode may be sent in the same frame, although packets associated with higher modcodes may be used to complete a frame before switching... Agent: Townsend And Townsend And Crew LLP Viasat, Inc (client #017018)

20070096789 - Clock signal generation using digital frequency synthesizer: A method of generating a clock signal using a digital frequency synthesizer includes providing a base clock to the digital frequency synthesizer, comparing a phase of an output clock from the digital frequency synthesizer with a phase of a reference signal, and issuing at least one frequency control command to... Agent: Hewlett Packard Company

20070096790 - Minimized line skew generator: The system described herein provides a minimized skew generator that has very small timing variation. Four phase signals are compressed into one signal including the four phase information. Therefore, the signal with all of the phase information travels on the same line, thus avoiding the concerns of skewing based on... Agent: Jonathan O. Owens Haverstock & Owens LLP

20070096791 - Pulse generator using latch and control signal generator having the same: An exemplary embodiment of the present invention provides a pulse generator generating a control signal to control a latch unit included in a source driver for sequentially latching input data applied to a source data line of a display device, wherein the pulse generator includes a latch circuit latching an... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070096792 - Transistor switch with integral body connection to prevent latchup: A circuit device having a transistor-based switch topology that substantially eliminates the possibility of latchup of the device. A series-connected low voltage threshold (LVT) N-channel transistor and a pull-up resistor are coupled across a switching (P-channel) transistor so that an integral body connection is provided for the switching transistor, which... Agent: Dillon & Yudell LLP

20070096793 - Semiconductor device: A semiconductor device includes first and second lines, a first transistor configured to electrically connect with the second line, and a second transistor configured to electrically connect the first line and the first transistor, the second transistor being turned ON when a bias voltage for operation is impressed between the... Agent: GlobalIPCounselors, LLP

20070096794 - Body bias coordinator, method of coordinating a body bias and sub-circuit power supply employing the same: The present invention provides a body bias coordinator for use with a transistor employing a body region. In one embodiment, the body bias coordinator includes a control unit configured to control the transistor and make it operable to provide a virtual supply voltage from a source voltage during activation of... Agent: Texas Instruments Incorporated

20070096796 - High voltage charge pump with wide range of supply voltage: A charge pump circuit utilising CMOS or MOSFET (p-channel or n-channel) configured as switches for charge transfer is proposed. Instead of using the conventional diode-connected transistors, CMOS transistors configured as switches are used so that the threshold voltage drop across the stages of the charge pump is eliminated. Two of... Agent: Dickstein Shapiro LLP

20070096795 - Led bias current control using adaptive fractional charge pump: A charge pump provides a multiplication factor of 4/3 by using a three-phase mode of operation. In a first mode, first and second capacitors are charged from an input voltage while a third capacitor drives the output voltage based on stored charge in the third capacitor. In a second mode,... Agent: Bever Hoffman & Harms, LLP Tri-valley Office

20070096797 - Method to avoid device stressing: A system for protecting a weak device operating in micro-electronic circuit that includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system includes a... Agent: Scully Scott Murphy & Presser, PC

20070096798 - Tuning circuit for transconductors and related method: Tuning circuits and related method for tuning transconductance in a transconductor-capacitor (Gm-C) filter system are provided. In the tuning circuit, a periodic input signal with constant amplitude triggers a transconductor cell to charge/discharge a capacitor for building an output signal across the capacitor, and a magnitude-detection feedback circuit provides feedback... Agent: North America Intellectual Property Corporation

20070096799 - Complex band-pass filter: A complex band-pass filter. The complex band-pass filter includes a band-pass filter coupled to a voltage source. The band-pass filter includes a first plurality of transconductors that receives a first voltage, where the first voltage controls the center frequency of the band-pass filter. The band-pass filter also includes a second... Agent: Sawyer Law Group LLP