Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 12/06

20060290387 - Integrated semiconductor memory: An integrated semiconductor circuit has a tunable resistor circuit whose total resistance value can be altered, the total resistance value being stipulated by a digital control word. A comparator compares a first voltage applied to the tunable resistor circuit with a second voltage applied to an external resistor element. A... Agent: Baker Botts, L.L.P.

20060290389 - Flame detector trapezoidal excitation generator output control circuit and method: An electronic circuit for generating a trapezoidal excitation waveform includes a controllable frequency source and a trapezoidal waveform generator. The controllable frequency source generates a source waveform that, upon energization thereof, has an initial frequency value, and decreases in frequency to a substantially constant frequency value a time period after... Agent: Honeywell International Inc.

20060290388 - High frequency control of a semiconductor switch: Resonant gate driver circuits provide for efficient switching of, for example, a MOSFET. However, often an operation of the resonant gate driver circuit does not allow for an application where high switching frequencies are required. According to the present invention, a pre-charging of the inductor of the resonant gate driver... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20060290390 - Gate driver: In a gate driver including a plurality of stages sequentially outputting shifted signals, each of the stages includes a first controller for controlling a first node in response to a first scan signal and a second scan signal; a second controller for controlling second and third nodes in response to... Agent: Jenkens & Gilchrist, P.C.

20060290391 - Integrated clock generator with programmable spread spectrum using standard pll circuitry: An apparatus comprising a phase lock loop circuit and a control circuit. The phase lock loop circuit may be configured to generate an output signal having a first frequency in response to (i) an input signal having a second frequency, (ii) a first divider value and (iii) a second divider... Agent: Lsi Logic Corporation

20060290393 - Clock generating circuit and clock generating method: The invention provides a clock generating circuit for generating a spectrum spread clock and carrying out high-speed and accurate phase control of a reference clock signal and an output clock signal, which is composed of compact circuits, and a method for generating the clock. The spectrum spread clock generating circuit... Agent: Arent Fox PLLC

20060290392 - Clock generators: e

20060290395 - Digital dll device, digital dll control method, and digital dll control program: A digital DLL device is provided which can reduce an error with respect to a target delay amount. The device provides a delay to an input clock signal so as to equally divide a clock cycle T thereof into N parts, and includes first variable delay sections and second variable... Agent: Arent Fox PLLC

20060290397 - Duty cycle correction circuit of delay locked loop and delay locked loop having the duty cycle correction circuit: A duty cycle correction circuit and a delay locked loop (DLL) including the duty cycle correction circuit, are capable of controlling their operation in order to correctly analyze the cause of generation of a duty cycle error when the duty cycle error is generated in the DLL. The duty cycle... Agent: Volentine Francos, & Whitt PLLC

20060290394 - Jitter-resistive delay lock loop circuit for locking delayed clock and method thereof: A delay lock loop circuit for delaying a reference clock to lock a delayed clock. The delay lock loop circuit includes a clock divider for dividing a frequency of the reference clock by N to generate a frequency-divided clock, a programmable delay circuit electrically coupled to the clock divider for... Agent: North America Intellectual Property Corporation

20060290396 - Method and apparatus for glitch-free control of a delay-locked loop in a network device: A method of controlling a delay-locked loop (DLL) module is disclosed. The method includes the steps of receiving a clock signal, comparing the received clock signal with a reference clock signal to determine whether a required phase difference between the signals is within specified tolerances, producing a correction signal when... Agent: Squire, Sanders & Dempsey L.L.P.

20060290398 - Bist to provide jitter data and associated methods of operation: In an embodiment, a transmitter circuit is in an integrated circuit die with a test latch, and the test latch is enabled by a test clock signal to under-sample the transmit signal from the transmitter circuit. In a method of operation, a transmit signal is generated in an integrated circuit... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20060290399 - Capacitor pulse forming network with multiple pulse inductors: Capacitor based pulse forming networks and methods are provided which require fewer inductors are that pulsed more frequently to provide a smaller, lower mass, and lower inductance pulse forming network having better pulse shaping characteristics than conventional pulse forming networks. In one implementation, the invention can be characterized as a... Agent: Fitch Even Tabin And Flannery

20060290400 - Method and apparatus for analyzing integrated circuit operations: A method and apparatus for viewing and/or analyzing the operations and logical states of an integrated circuit. The logical state of various flip-flops within the ASIC may be determined at a specified time. The embodiment may store these flip-flop states in a computer-readable data structure, such as a file or... Agent: Dorsey & Whitney, LLP Intellectual Property Department

20060290401 - Dead time control circuit capable of adjusting temperature characteristics of dead time: In a dead time control circuit, a delay circuit is connected to an input terminal and adapted to delay signals therethrough by a delay time corresponding to a dead time. A logic circuit has a first input connected via the delay circuit to the input terminal, a second input connected... Agent: Mcginn Intellectual Property Law Group, PLLC

20060290403 - Differential clock tree in an integrated circuit: A clock distribution network having: a main trunk configured to provide a differential clock signal; a plurality of branches coupled to the main trunk for distributing the differential clock signal to a plurality of circuit elements on the integrated circuit; and a plurality of switches coupling the main trunk to... Agent: Xilinx, Inc Attn: Legal Department

20060290402 - Programmable logic device having an embedded differential clock tree: A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf... Agent: Xilinx, Inc Attn: Legal Department

20060290404 - Apparatus and methods for voltage level conversion: A cross-coupled, latching voltage level converter to convert a signal from a first voltage domain to a second voltage domain and hold an output logic level is disclosed. The converter includes back-to-back first and second inverter circuits coupled to a first voltage source operable at a first voltage level. A... Agent: Vedder Price Kaufman & Kammholz

20060290405 - Level shifter and method thereof: A level shifter and method thereof. The example level shifter may include a level shifting unit generating a plurality of internal voltages, shifting the voltage levels of a plurality of input signals and outputting an output signal based at least in part on the plurality of internal voltages and a... Agent: Harness, Dickey & Pierce, P.L.C

20060290406 - Switched capacitor circuit capable of minimizing clock feedthrough effect and having low phase noise and method thereof: A switched capacitor circuit includes a positive side capacitor coupled to a first positive side node; a first positive side switch element for selectively coupling the first positive side node to a second node according to a first control signal; and a precharge circuit coupled to the first positive side... Agent: North America Intellectual Property Corporation

20060290407 - Active driving of normally on, normally off cascoded configuration devices through asymmetrical cmos: Disclosed is a method of controlling a High Electron Mobility Transistor (HEMT) through a cascode circuit, the cascode circuit including first and second switches, a capacitor connected to a source of the first switch, a source of the HEMT being connected to the drain of the first switch, and a... Agent: Ostrolenk Faber Gerb & Soffen

20060290408 - Temperature compensation circuit: A temperature compensation circuit consists of a thermo sensitive resistance, a fixed resistance, a logic buffer, and a logic inverter, without incorporating any operational amplifier. A resistance value of the thermo sensitive resistance is changed by temperature change. The fixed resistance has a small temperature changes that is smaller than... Agent: Posz Law Group, PLC

20060290409 - Transparent conductive laminated body: A transparent conductive laminated body comprising: a transparent film substrate having a thickness of 2 to 200 μm, and a first transparent dielectric thin film, a second transparent dielectric thin film and a transparent conductive thin film that are formed on one side of the substrate in this order from... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20060290414 - Charge pump circuit and semiconductor memory device having the same: A charge pump circuit includes a switch for transmitting an electric charge between a pumping node and an output of the charge pump circuit such that a pre-charge voltage level is applied to a control node during pre-charge operation and a pumping control voltage level is applied to the control... Agent: F. Chau & Associates, LLC

20060290410 - Efficient charge pump for a wide range of supply voltages: A voltage booster and regulator usable with Dickson-type charge pump device is specifically adapted to maintain efficiency with both high and low supply voltages. For high voltage supplies (e.g., 2.6 volts or more), the charge pump reduces overall power consumption resulting in a more efficient design. For low voltage applications... Agent: Schneck & Schneck

20060290413 - Semiconductor device and booster circuit: A semiconductor device, comprises: a semiconductor substrate; a buried oxide (BOX) layer formed on the semiconductor substrate; a semiconductor layer formed on the BOX layer; a plurality of metal oxide semiconductor (MOS) capacitors formed on the semiconductor layer; and a switching element formed on the semiconductor substrate, wherein the switching... Agent: Oliff & Berridge, PLC

20060290412 - Substrate bias voltage generating circuit for use in a semiconductor memory device: A substrate voltage generating circuit for use in a semiconductor memory device is provided. The semiconductor memory device includes a charge pump for generating a substrate bias voltage in response to a clock signal; a first inverter type detector for detecting whether the substrate bias voltage reaches a target voltage;... Agent: F. Chau & Associates, LLC

20060290411 - Voltage multiplier circuit including a control circuit providing dynamic output voltage control: A voltage multiplier circuit includes a control circuit and a first voltage multiplier stage. The control circuit receives a power supply voltage and a reference voltage and provides a first output voltage being the difference between a first selected voltage and the power supply voltage where the first selected voltage... Agent: Patent Law Group LLP

20060290415 - Low-voltage, buffered bandgap reference with selectable output voltage: A temperature-independent voltage reference containing two independent bias circuits powered by the reference voltage, each bias circuit containing components with an exponential dependence of current on voltage and one containing a resistive impedance, and further including voltage dividers and an active component.... Agent: Blakely Sokoloff Taylor & Zafman

20060290417 - Exponential function generator and variable gain amplifier using the same: The present invention relates to an exponential function generator which is realized with only CMOS element without BJT element, not limited by the physical properties of the element or a square circuit, and not complicated in its configuration, and a variable gain amplifier using the same. The exponential function generator... Agent: Lowe Hauptman Berner, LLP

20060290416 - Low-leakage current sources and active circuits: A low-leakage circuit includes first, second, and third transistors, which may be P-channel or N-channel FETs. The first transistor provides an output current when enabled and presents low leakage current when disabled. The second transistor enables or disables the first transistor. The third transistor connects or isolates the first transistor... Agent: Qualcomm Incorporated

20060290418 - Wide-band wide-swing cmos gain enhancement techique and method therefor: A regulated cascode current source has a current source circuit. A level shifter circuit is coupled to the current source circuit. The level shifter circuit has a circuit for independently controlling a voltage on a cascode node.... Agent: Weiss & Moy PC

20060290419 - Tuning circuit: The present invention relates to a filter and, more particularly, to a tuning circuit of a filter for correcting a cut-off frequency of the filter. The tuning circuit comprises a current generation unit having a first transistor and a variable resistor unit, and a capacitance correction unit having a second... Agent: Foley And Lardner LLP Suite 500

20060284651 - Circuit and method of blocking access to a protected device: Provided are a circuit and method of blocking access to a protected device. The blocking circuit includes a fusing circuit and a comparing circuit. The fusing circuit includes at least two fuses. The comparing circuit receives signals transferred through the respective fuses, which are obtained using resistors, compares the received... Agent: Harness, Dickey & Pierce, P.L.C

20060284652 - Power detecting circuit and demodulator comprising it: A high performance power detection circuit suitable to be made monolithic, being compact and low at cost, suitable to a radio-frequency operation in a wide band, having excellent linearity in detection characteristics, small fluctuation of detection characteristics against bias fluctuation, small fluctuation of detection characteristics against FET threshold voltage fluctuation... Agent: Rader Fishman & Grauer PLLC

20060284653 - Method for sample and hold a signal and flat pannel driving method using the same: A sample-and-hold circuit is provided for an input voltage in response to a timing signal and outputting a holding voltage. The sample and hold circuit includes a plurality of switches, first and second capacitors, first and second differential input units, and an output unit. One of the switches which is... Agent: J C Patents, Inc.

20060284654 - Low divide ratio programable frequency divider and method thereof: The invention provides a low divide ratio programmable frequency divider of a fractional-N type applied to a digital MOPLL tuner and a method thereof. In the invention, a divide ratio assigner assigns divide data as a main divide ratio and a pulse swallow value according to a first or a... Agent: Lowe Hauptman Berner, LLP

20060284655 - circuit and method for monitoring the integrity of a power supply: Circuits and methods are provided herein for monitoring the integrity of a power supply, the circuits and methods providing additional resources/information for diagnosing a cause behind a reset signal, and in some cases, a reason behind a power failure. A first method described herein provides exemplary steps for monitoring a... Agent: Daffer Mcdaneil LLP

20060284656 - Delay-locked loop device capable of anti-false-locking and related methods: The present invention discloses a delay-locked loop device capable of anti-false-locking, which comprises: a voltage control delay circuit comprising a plurality of delay units in a series for generating a delayed phase according to a reference phase and a control voltage; a phase detector coupled to the voltage control delay... Agent: North America Intellectual Property Corporation

20060284657 - Phase locked loop circuit and method of locking a phase: A phase locked loop circuit and method of locking a phase. The phased locked loop circuit may include a phase detector receiving an external clock signal and a feedback clock signal and outputting an up signal when a phase of the external clock signal leads a phase of the feedback... Agent: Harness, Dickey & Pierce, P.L.C

20060284658 - Rise and fall balancing circuit for tri-state inverters: Disclosed are various embodiments for adjusting both the rise and fall or both of an output pulse in an inverter circuit so that the output pulse has a length that matches the length of the input pulse. Stages of transistors having various sizes can be activated in both a pull-up... Agent: Lsi Logic Corporation

20060284659 - Cmos integrated circuit for correction of duty cycle of clock signal: A CMOS integrated circuit (12) for correction of the duty cycle of a clock signal has a correction amplifier (16) to which a clock signal (14) is applied. The output of correction amplifier (16) is connected to an output buffer (18) and to an input of a duty cycle detector... Agent: Texas Instruments Incorporated

20060284661 - Method and system for testing a settling time for a device-under-test: A system and method are disclosed for testing a settling time of a device-under-test (DUT). A method for determining a settling time of a device-under-test (DUT) includes activating a DUT to generate an output signal and mixing the output signal of the DUT and a reference signal to generate a... Agent: Texas Instruments Incorporated

20060284660 - Reset device and display device having same: A reset device includes a reset switch (20) and a reset circuit (30). The reset switch is used for producing a reset command. The reset circuit is used for producing a reset signal to reset a processor (40) in accordance with the reset command. The reset switch includes a delay... Agent: North America Intellectual Property Corporation

20060284662 - Delay circuit and test apparatus: There is provided a delay circuit that delays an input signal to output the delayed signal. The delay circuit includes a first delay element operable to receive the input signal and delay the input signal to output the delayed signal, a buffer operable to receive the delay signal output from... Agent: Osha Liang L.L.P.

20060284663 - Timing control circuit and method: A timing control circuit and a timing control method are provided. The circuit and method is for outputting a plurality of latch pulses in a TFT-LCD to avoid a rewriting phenomenon. The timing control circuit is characterized in that among the latch pulses, except for the first latch pulse, each... Agent: Jianq Chyun Intellectual Property Office

20060284664 - Pulse generator and method for pulse generation thereof: A pulse generator comprises a CMOS inverter, a capacitive device and a resistive device, where the CMOS inverter has two terminals connected to a source voltage and a reference voltage, e.g., ground, respectively, the capacitor device and the resistive device are connected to the input end of CMOS inverter in... Agent: Volentine Francos, & Whitt PLLC

20060284665 - High-speed tdf testing on low cost testers using on-chip pulse generators and dual ate references for rapidchip and asic devices: A circuit which facilitates TDF testing without having to purchase expensive new test equipment, such as a new test platform that is capable of supporting test frequencies well beyond the current 200 MHz limitation. A solution to current TDF testing problems by adding circuitry to the device-under-test (DUT) that is... Agent: Lsi Logic Corporation

20060284666 - Voltage-and temperature-compensated rc oscillator circuit: An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and... Agent: Sierra Patent Group, Ltd.

20060284667 - Apparatus and method for isolating noise from a signal: A circuit is provided for isolating noise from an input signal to an Analog/Digital (A/D) converter. The circuit includes a plurality of multiplexers and a capacitor connected between the poles of two Single-Pole Multi-Throw (SPMT) multiplexers. A method is also provided for isolating noise from an input signal to the... Agent: Baker & Hostetler LLP

20060284668 - Bandgap reference circuit: A bandgap reference circuit, taking two or more power supplies as the input power supply for outputting a reference voltage, includes a first reference circuit, a second reference circuit, a power selection circuit and a switch circuit. The first and second reference circuits receive two respective power supplies for producing... Agent: Jianq Chyun Intellectual Property Office

20060284669 - Noise shaping technique for spread spectrum communications: A spread spectrum noise shaper uses a modulation technique to achieve a greater signal-to-noise or signal-to-interference ratio (SNR or SIR). The technique doubles the system SIR, in principle. This doubling yields a doubling in system capacity. SNR is increased by receiving the spread spectrum signal in the presence of less... Agent: Volpe And Koenig, P.C. Dept. Icc

20060284670 - Neutralization techniques for differential low noise amplifiers: An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two... Agent: Epson Research And Development Inc Intellectual Property Dept

20060279338 - Fully differential large swing variable gain amplifier: The fully differential large swing variable gain amplifier circuit includes: a first 5-transistor transconductor having a common mode node; and a second 5-transistor transconductor having a common mode node coupled to the common mode node of the first 5-transistor transconductor, wherein the second 5-transistor transconductor operates 180 degrees out of... Agent: Texas Instruments Incorporated

20060279339 - Integrated circuit: An integrated circuit is disclosed that includes a MOS output stage transistor, a gate terminal for applying a drive signal, which controls the turning on and off of the output stage transistor, a charge transistor, which when the output stage transistor is turned on supplies a gate electrode of the... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20060279340 - Semiconductor integrated circuit device: A dummy MOSFET is provided which is connected in common with the gate of an N channel output MOSFET that constitutes a CMOS output circuit and which is set so as to have a gate capacitance corresponding to a difference between a gate capacitance of a P channel output MOSFET... Agent: Miles & Stockbridge PC

20060279341 - Self-aligning data path converter for multiple clock systems: A system and method for aligning an input signal (24) synchronized to a first clock signal (22) with a second clock signal (26) The invention includes a mechanism (106) for generating a third clock signal (354) and an arrangement (352) for loading the input signal (24) in accordance with the... Agent: Leonard A. Alkov, Esq. Raytheon Company

20060279342 - Dll measure initialization circuit for high frequency operation: A memory device, delay lock loop circuit (DLL) and DLL reset circuitry are described. The DLL includes a shift register and a measured delay for pre-loading the shift register. The reset circuitry selectively filters a clock signal propagation through the measured delay during a reset operation.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20060279343 - Soft-error rate improvement in a latch using low-pass filtering: In a preferred embodiment, the invention provides a circuit and method for reducing soft error events in latches. A low-pass filter is placed between the output of a forward inverter and the inputs of a feedback keeper. The first and second outputs of the low-pass filter are connected to first... Agent: Hewlett Packard Company

20060279344 - Circuit for dc offset cancellation: A circuit having multiple overlapped feedback loops for DC offset cancellation is provided with applying in one of multistage amplifier, multistage filter, and the combination thereof. The circuit includes a plurality of negative feedback variable bandwidth switches coupled to each stage of the above mentioned multistage devices, the output of... Agent: Rosenberg, Klein & Lee

20060279345 - Impedance controller for semiconductor device: An impedance controller includes multiple determination units for determining which of multiple candidate codes results in a best impedance match for an I/O pad of a semiconductor device. In addition, an error prevention unit of the impedance controller prevents any undesired bit pattern from causing improper operation of the impedance... Agent: Law Office Of Monica H Choi

20060279346 - Semiconductor integrated circuit: A semiconductor integrated circuit that operates upon supply of a plurality of power potentials including a first power potential and a second power potential higher than the first power potential, includes: an internal circuit that operates upon supply of the first power potential; an inverter that inverts an output signal... Agent: Harness, Dickey & Pierce, P.L.C

20060279347 - Semiconductor integrated circuit: A semiconductor integrated circuit operates at two or more supply potentials including a first supply potential and a second supply potential that is higher than the first supply potential, and includes (1) an internal circuit that operates at the first supply potential, (2) an inverter that inverts a control signal... Agent: Harness, Dickey & Pierce, P.L.C

20060279348 - Synchronization circuits and methods: Synchronization circuits and methods for generating level-shifted signals having different voltages and substantially the same phase irrespective of process parameter variations or applied power supply voltages are provided. A synchronization circuit includes a first level-shifting unit receiving an input reference signal having a first swing voltage and generating a first... Agent: F. Chau & Associates, LLC

20060279349 - Trimming temperature coefficients of electronic components and circuits: There is described methods and circuits for trimming a temperature coefficient of change of a parameter of at least one electrical component while maintaining a substantially constant parameter value, the method comprising applying a heating cycle to trim said parameter value away from a target parameter value and back to... Agent: Ogilvy Renault LLP

20060279350 - System and method for power management with scalable channel voltage regulation: An integrated circuit power device includes a monolithic voltage regulator channel for providing low voltage high current output. The devices can be installed in parallel without a master control IC and without limitations on the number of channels to support CPU power, or can be used alone to support regular... Agent: Blank Rome LLP

20060279351 - Driving circuit for use with high voltage bidirectional semiconductor switches: A driving circuit for a half bridge utilizing bidirectional semiconductor switches in accordance with an embodiment of the present application includes a high side driver operable to control a high side bidirectional semiconductor switch, wherein the high side driver provides a negative bias voltage to the bidirectional semiconductor switch to... Agent: Ostrolenk Faber Gerb & Soffen

20060279352 - Charge pump, dc-dc converter, and method thereof: A charge pump for a DC-DC converter includes an input terminal receiving an input voltage, an output terminal outputting an output voltage, a plurality of charge pumping stages connected in series between the input terminal and the output terminal, and a voltage level shifter shifting voltage levels of first and... Agent: Cantor Colburn, LLP

20060273827 - Systems, apparatuses and methods for synchronizing clock signals: An apparatus may include a first phase control circuit and/or a second phase control circuit. The first phase control circuit may compare the phase of the first clock signal with the phase of the second clock signal, and may control the phase of the first clock signal based on the... Agent: Harness, Dickey & Pierce, P.L.C

20060273828 - Phase detector and method having hysteresis characteristics: A phase detector generates a first output signal if a feedback clock signal leads a reference clock signal by more than a first time. The phase detector generates a second output signal if the feedback clock signal lags the reference clock signal by more than a second time. If the... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20060273829 - Controlling transient current peaks: An apparatus for controlling transient current peaks including a bus interface unit and a waveform shaper coupled to the bus interface unit and a peripheral device. The bus interface unit generates a control signal having a transition from a first value to a second value over a period of time.... Agent: Blakely Sokoloff Taylor & Zafman

20060273830 - I/f conversion device and photo-detection device: An I/F converter 10 includes a first comparator portion 111, a second comparator portion 112, a current mirror circuit 14, a reference voltage source 15, an SR-type flip-flop circuit 16, a buffer amplifier 18, a first capacitive element C1, a second capacitive element C2, a switch SW1, a switch SW2,... Agent: Drinker Biddle & Reath (dc)

20060273831 - Differential delay-line analog-to-digital converter: Differential delay-line analog-to-digital (A/D) converters for use in current and power sensing applications are provided. These A/D converters are well suited for a wide range of electronic applications, including over-load protection, current mode control, current sharing in digitally controlled switched-mode power supplies, power sensing, and implementation of power optimization methods... Agent: Hensley Kim & Edgington, LLC

20060273832 - Buffer circuit, driver circuit, and semiconductor testing apparatus: There is provided a buffer circuit that can deal with input and output signals having a large voltage swing. Such a buffer circuit is designed for outputting an output signal corresponding to an input signal. The buffer circuit includes an input/output circuit for maintaining an output impedance at a constant... Agent: Osha Liang L.L.P.

20060273833 - Clock frequency multiplier and method for multiplying a clock frequency: A clock frequency multiplier is provided. The clock frequency multiplier comprises a tracking circuit, a pulsing circuit, and a shaping circuit. The tracking circuit receives a clearing signal and a reference clock signal, outputs the quotient of the number of cycles of the reference clock signal in a cycle of... Agent: J C Patents, Inc.

20060273834 - Delay locked loop and method for setting a delay chain: A delay locked loop includes a delay chain that contains a plurality of series-connected delay cells, a phase detector arrangement that contains a plurality of phase detector cells and a control unit. The delay locked loop delays an input signal by a delay time via the delay chain depending on... Agent: Edell, Shapiro & Finnan, LLC

20060273835 - Charge pump bias network: A circuit for supplying selected currents to a charge pump without harmful effects arising from operation of current switches in the charge pump. A charge pump current setting is applied in digital form to a set of two-position switches coupled to binary-weighted current sources. Currents from the sources selected by... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P.

20060273836 - Method and apparatus to set a tuning range for an analog delay: An apparatus and method for an analog fine delay line, a hybrid delay line, and a delay locked loop (DLL) is described. In the DLL, a coarse phase detector compares a reference signal and feedback signal in controlling coarse phase adjustment signals indicating whether a delay of a coarse delay... Agent: Trask Britt, P.C.

20060273837 - Pulse latch circuit and semiconductor integrated circuit: The disclosed invention is intended to decrease the power consumption of a pulse latch circuit. A pulse latch circuit that operates in sync with a pulsed clock signal, including a first operation mode in which shifting test pattern scan data is performed and a second operation mode in which shifting... Agent: Miles & Stockbridge PC

20060273839 - Delay circuit and semiconductor device including same: Disclosed are a delay circuit and a semiconductor device including the same. The delay circuit comprises a plurality of delay blocks, which are connected in series, and a driving portion adapted to logically combine signals transmitted by the plurality of delay blocks to generate a delay circuit output signal. Each... Agent: Volentine Francos, & Whitt PLLC

20060273838 - Master latch circuit with signal level displacement for a dynamic flip flop: A master latch circuit (10) with signal level displacement for a flip-flop (1) clocked by a clock pulse signal (Clk), wherein the master latch circuit (10) comprises a signal delay circuit (13) which delays and inverts the clock pulse signal (ClK) resulting in a specific time delay (AT), and a... Agent: Maginot, Moor & Beck

20060273840 - Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof: A controlled delay circuit has a first gate chain, and a second gate chain. The first gate chain is used to measure a time difference between a changeover point of a first control signal and a changeover point of a second control signal. The second gate chain, which receives third... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20060273841 - Programming and determining state of electrical fuse using field effect transistor having multiple conduction states: A circuit is provided which is operable to program an electrically alterable element, e.g., fuse or antifuse, to a programmed state and determine whether the electrically alterable element is in the programmed state or not. Such circuit includes a multiple conduction state field effect transistor (“multi-state FET”) having at least... Agent: International Business Machines Corporation Dept. 18g

20060273842 - Dynamic well bias controlled by vt detector: In one embodiment of the invention, the p- well back bias for the NCH transistors in a DRAM sense amplifier circuit are dynamically adjusted. Preferably, during sensing, the p- well back bias for the NCH transistors of the sense amps is increased to in effect lower the threshold voltages for... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20060273845 - Capacitance multiplier: A capacitance multiplier includes a self-biasing active load for generating a stable bias voltage without a separate current bias. In addition, the capacitance multiplier includes a cascode load within a multiplying section for increasing the output resistance and in turn the charging/discharging efficiency. Furthermore, the capacitance multiplier is implemented with... Agent: Law Office Of Monica H Choi

20060273843 - High efficiency bi-directional charge pump circuit: A charge pump circuit having a first voltage node acting as an input when the charge pump circuit boosts negative voltages, and acting as an output when the charge pump circuit boosts positive voltages and a second voltage node acting as an input when the charge pump circuit boosts positive... Agent: Schneck & Schneck

20060273844 - Vpp voltage generator for generating stable vpp voltage: The present invention relates to a VPP voltage generator that generates a stable VPP voltage. The VPP voltage generator of the present invention generates a stable VPP voltage. Therefore, power consumption can be saved, a precharge time of word line can be prevented from increasing and a tRCD characteristic can... Agent: Mayer, Brown, Rowe & Maw LLP

20060273846 - Bias voltage generator with auto trimming function: An automatic trimming bias voltage generator that does not require a test mode to trim a bias voltage, and allows the bias voltage to be automatically trimmed in a plurality of operating voltage regions without adding elements to the layout. The automatic trimming bias voltage generator includes a reference bias... Agent: F. Chau & Associates, LLC

20060273847 - Output level voltage regulation: A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator... Agent: Schneck & Schneck

20060273848 - Semiconductor integrated circuit device: A semiconductor integrated circuit device has a boosted-voltage power-supply circuit generating a boosted voltage, an internal circuit being driven with the boosted voltage, and a control circuit controlling the internal circuit by receiving the boosted voltage. The boosted-voltage power-supply circuit has a first output terminal for the internal circuit, and... Agent: Arent Fox PLLC