Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 10/06

20060238224 - Method and apparatus for simplifying the control of a switch: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across...

20060238225 - Variable frequency generator: A digital circuit generates very precise varying clock frequencies for applications that can tolerate a small degree of jitter but require exact longer term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixel rate remains exact and consistent. In some applications,...

20060238226 - Fractional-n baseband frequency synthesizer in bluetooth applications: A baseband clock synthesizer having particular use in a BLUETOOTH piconet device, having the capability of generating either 12 MHz or 13 MHz clock signals generated from any reference clock signal, e.g., 12.00, 12.80, 13.00, 15.36, 16.80, 19.20, 19.44, 19.68, 19.80, and 26.00 MHz. A fractional-N frequency divider is implemented...

20060238227 - Delay-locked loop circuits and method for generating transmission core clock signals: A delay-locked loop (DLL) circuit and a method for generating transmission core clock signals are provided, where the DLL circuit receives an applied external clock signal and generates a transmission core clock signal, the DLL circuit includes a delay circuit unit and a transmission core clock signal generating unit, the...

20060238228 - Cascade system capable of restraining duty cycle offsets: The invention relates to a cascade system capable of restraining duty cycle offsets. The cascade system receives an input signal with an input duty cycle. The cascade system comprises a plurality of circuit units. The circuit units are connected in series. Each circuit unit receives a signal from a previous...

20060238229 - Reset mode indication for an integrated circuit using a non-dedicated pin: An integrated circuit has circuitry and pins coupled to the circuitry. One of the pins is an internal reference voltage pin having a pin signal that is set at a level outside of a normal range for the pin signal so that the integrated circuit is indicated to reset and...

20060238230 - Integrated circuit with adaptive speed binning: Systems and techniques are disclosed relating to adapting the frequency of an electronic device comprising an integrated circuit and an electronic component to improve performance. The integrated circuit determines a set of frequency plans, each corresponding to a distribution of delay range highest passing values and one of a set...

20060238231 - Pulse signal generator device: To allow changes in period and duty ratio at a desired timing without control of the timing for setting values of the period and duty ratio by a CPU, a unit 1 for storing a plurality of values of periods, a unit 2 for storing a plurality of values of...

20060238232 - Voltage level shifting device: A voltage level shifting device includes an activation or deactivation control input, first and second output nodes, a capacitor coupled between the output nodes, a high-voltage transistor for charging the capacitor, a high-voltage transistor for discharging the capacitor, a comparator which generates a charge blocking signal and a discharge signal,...

20060238233 - Circuit arrangement for a capacitive proximity switch: Disclosed is a charge transfer-based circuit arrangement for capacitive proximity switches comprising a capacitive sensor element (C3), the capacity of which changes according to the actuation mode. Said circuit arrangement comprises a central capacitor (C2), a first controllable connecting means (D2) that impinges the capacitive sensor element with a charging...

20060238234 - Producing reference voltages using transistors: An exemplary circuit embodiment includes a depletion-mode transistor and an enhancement-mode transistor. The circuit also includes a circuit portion coupled to a gate region of the depletion-mode transistor and to a gate region of the enhancement-mode transistor. In this embodiment, the circuit portion is configured to provide a reference voltage...

20060238235 - Switchable current mirror with feedback: In one embodiment of the invention, a switchable output current mirror with feedback is disclosed. The current mirror includes a master stage, a slave stage, and an operational amplifier that is coupled in a feedback loop with the master stage. A reference current is introduced at an input node of...

20060238236 - Semiconductor apparatus: Disclosed is a semiconductor apparatus adapted to reduce the inflow of current from an external input terminal in a power saving mode. A mode decision circuit 11 outputs to an interruption circuit 10 and a floating prohibiting circuit 15 a mode signal indicating whether operation of the semiconductor apparatus is...

20060238237 - Driver/equalizer with compensation for equalization non-idealities: A high speed serial data communication system includes provisions for the correction of equalization errors, particularly those errors introduced by equalizer non-idealities. The equalization is achieved at the data transmitter, and is based on dynamic current subtraction at the output of a differential pair. When bit time>0, the error current...

20060238238 - Operational amplifier for output buffer and signal processing circuit using the same: An operational amplifier includes: a differential amplifier for differentially amplifying first and second differential input signals to generate first and second output signals through first and second nodes; a driver for driving an output node in response to the second output signal; and a drive current adjuster for adjusting a...

20060232302 - Apparatus for generating internal voltage: An internal voltage generator according to the present invention stably supplies an internal voltage regardless a level of power voltage input from a source external to a semiconductor memory device. The present invention includes a dead zone controller to generate a reference voltage, a high reference voltage and a low...

20060232303 - Sense amplifier for flash memory device: A sense amplifier circuit comprises first and second cross-coupled inverters to produce a latch with first and second power supply nodes. The first latch power supply node couples a first power supply potential to the latch when the sense amplifier is operating in a read-out mode. The second latch power...

20060232304 - Apparatus and methods for adaptive trip point detection: Apparatus and methods are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds...

20060232305 - Logic gate with reduced sub-threshold leak current: The logic gate of the present invention is of a configuration that includes a first transistor, a second transistor, and a connection-switching unit. The first transistor receives a first voltage at its source, a first input signal at its gate, and supplies a first output signal from its drain. The...

20060232306 - Dither amplitude correction for constant current drivers: In satisfying the above need, as well as overcoming the enumerated drawbacks and other limitations of the related art, the present invention provides an improved switched driver circuit. As disclosed above, there is a need to compensate for the high impedance load characteristics in certain implementations of hysteretic switching constant...

20060232307 - Semiconductor integrated circuit device: A semiconductor integrated circuit device including an I/O circuitry capable of low-voltage high-speed operation at low cost is provided. In the I/O circuitry, when an I/O voltage (for example, 3.3 V) is lowered to a predetermined voltage (for example, 1.8 V), portions causing a speed deterioration are a level conversion...

20060232308 - Delay stabilization circuit and semiconductor integrated circuit: A delay stabilization circuit capable of suppressing a drop in stability of delay or frequency and a cost increase and also able to shorten a design time, and a semiconductor integrated circuit are provided. The delay stabilization circuit includes a passive noise filter configured by a capacitor and a resistor,...

20060232309 - Digital-control-type phase-composing circuit system: A digital-control phase-composing circuit system has a phase-composing circuit which is supplied with two input clock signals having a phase difference therebetween and a control signal, and which composes an output clock signal having a phase between the phases of the two input clock signals on the basis of weighting...

20060232311 - Duty detection circuit and method for controlling the same: A duty detection circuit is provided with a main circuit unit that includes at least a first capacitor that is discharged during the time period in which the clock signal is at a high level and charged during the time period in which the clock signal is at a low...

20060232310 - System and method for on/off-chip characterization of pulse-width limiter outputs: The present invention provides for a method for characterization of pulse-width limiter outputs. A known clock signal is received. A pulse width of the received known clock signal is limited through a first pulse-width limiter to generate a first intermediate signal. The first intermediate signal is delayed by a known...

20060232312 - Method and apparatus for reducing duty cycle distortion of an output signal: A method and apparatus for reducing the duty cycle distortion of a periodic signal in high speed devices. More specifically, there is provided a device having a switching point modulation circuit coupled to input logic and configured to modulate the periodic output signal from the input logic such that the...

20060232313 - Schmitt trigger circuit in soi: This invention relates to a trigger circuit with hysteresis using the semiconductor on insulator technology, characterised in that it comprises at least two CMOS inverter stages, each inverter stage being composed of a first branch comprising at least one P-channel junction field effect transistor (PFET) in series between a first...

20060232314 - Phase adjustment device, phase adjustment method, and semiconductor integrated circuit: A phase adjustment device which adjusts a phase difference between a first output pulse signal and a second output pulse signal according to a phase difference between a first input pulse signal and a second input pulse signal, the phase adjustment device including: a first selection unit which selects one...

20060232315 - Variable delay line with multiple hierarchy: Disclosed herein are improved, simplified designs for a hierarchical delay line (HDL). The HDL is useful in providing precise phase control between an input clock signal and an output clock signal, and has particular utility as the variable delay in a delay-locked loop (DLL). In one embodiment, a coarse unit...

20060232317 - Clock reproduction circuit: A clock reproduction circuit receives a multi-valued input data signal to generate a reproduced clock signal with a higher accuracy. The clock reproduction circuit includes a data judgement block which judges whether or not three consecutive data are such that a first-order data is equal to a third-order data and...

20060232316 - Multi-power source semiconductor device: In a multi-supply-voltage semiconductor device including multiple blocks 31, 32, each of which has independent clock circuit 41, 42, and operating with variable power supply 101, variable delay circuit 20 which changes the amount of delay in accordance with the voltage value of the variable power supply 101 is provided...

20060232318 - Power clamp circuit and semiconductor device: A power clamp circuit for preventing unnecessary power supply leak current at a tolerable power supply noise level. A reference voltage circuit generates a reference voltage by reducing a positive voltage supplied from a first power supply terminal by a predetermined potential and supplies the reference voltage to a buffer...

20060232319 - Level shifter circuit: A low-power consumption level shifter circuit is provided by preventing a through current which is generated when a level of a signal is changed. In order to prevent a through current which flows when a level of a signal of the input is changed, the p-channel TFTs are controlled so...

20060232320 - Semiconductor integrated circuit: A semiconductor integrated circuit that operates on multiple supply potentials including a first potential and a second potential that is higher than the first potential. The semiconductor integrated circuit includes a potential-lowering circuit operating on the second supply potential and including an N-channel MOS transistor that lowers the second supply...

20060232321 - High-density low-power data retention power gating with double-gate devices: A new power gating structure with robust data retention capability using only one single double-gate device to provide both power gating switch and virtual supply/ground diode clamp functions. The scheme reduces the transistor count, area, and capacitance of the power gating structure, thus improving circuit performance, power, and leakage. The...

20060232322 - Voltage transfer circuit: A voltage transfer circuit outputs an equivalent to an input voltage when enabled. Otherwise, the transfer circuit is in standby and outputs an equivalent to a standby voltage (e.g., signal ground). The voltage transfer circuit includes a switching circuit, a standby circuit, and an input-transfer circuit. The output of the...

20060232323 - Circuit and method for stable fuse detection: A fuse state detection circuit is comprised of a first fuse element, a second fuse element, and an output for carrying an output signal, the output signal represents a first logic state when the first fuse element is blown and the second fuse element is unblown and the output signal...

20060232324 - Control circuit for command signals of clock generator: A control circuit for command signals of a clock generator includes a power supply end, an output end, a control end, a diode, a first resistor and a second resistor. The first resistor, the diode, and the second resistor are connected in series between the power supply end and the...

20060232325 - Method for operational amplifier sharing between channels: A multi-channel current regulator includes two or more channels, each channel acting as a current source or sink for a respective load. Each channel regulates its load current so that the load current is proportional to an input voltage supplied to the channel. An operational amplifier is shared between the...

20060232326 - Reference circuit that provides a temperature dependent voltage: A reference circuit that includes a first circuit configured to provide a temperature dependent current, a second circuit configured to provide a first current, and a third circuit. The third circuit is configured to provide a temperature dependent voltage based on the first current and the temperature dependent current. The...

20060232327 - Constant voltage circuit capable of quickly responding to a sudden change of load current: A constant voltage circuit which is capable of quickly responding to a sudden change of an output voltage includes an output transistor, and first and second error amplifiers. The output transistor outputs a power with an output voltage and an output current to a load. The first error amplifier is...

20060232329 - Integrated channel filter using multiple resonant filters and method of operation: A circuit includes a first filter comprising a first inductor coupled to a first variable capacitor, wherein the first filter is associated with a first resonant frequency. The circuit further comprises an amplifier coupled to the first filter and a second filter coupled to the amplifier. The second filter comprises...

20060232328 - Switchable low pass configuration and an optical receiver with a switchable low pass configuration: The invention relates to a switchable low-pass filter arrangement which has an upper limiting frequency determining the low-pass filter behavior. The arrangement includes a transistor circuit, which has at least one transistor arranged as a source follower or as an emitter follower; a capacitive component at the output of the...

20060226877 - Operational amplifier with less offset: A differential amplifier includes an input stage circuit including a first differential pair and a second differential pair which are complementary to each other; a first current mirror circuit connected with the first differential pair and configured to function as an active load; a second current mirror circuit connected with...

20060226878 - Comparator circuit with offset cancellation: A method of comparing signals includes obtaining first and second signals to be compared and first and second offset cancellation signals, combining the first offset cancellation signal with the first signal to be compared to form a first combined signal and combining the second offset cancellation signal with the second...

20060226879 - Bicycle electric power unit: A bicycle electric power unit supplies electric power to a bicycle motor unit having a power source, a power source controller, a power source voltage detector, a first power source switch and a second power source switch. The power source controller turns off the first power source switch when the...

20060226880 - Internal power supply control method, internal power supply circuit, and semiconductor device: When a DLL circuit using a clock is employed, the internal power supply circuit is arranged between the external power supply and the DLL circuit. The internal power supply circuit supplies power from the external power supply after reducing the voltage thereof. The internal power supply circuit is divided into...

20060226881 - Sampling phase detector for delay-locked loop: A delay-locked loop (DLL) architecture is provided that includes a voltage controlled delay line, a sample-and-hold circuit and an amplifier circuit. The voltage controlled delay line may have a plurality of buffer stages to provide a first clock signal and a second clock signal. The sample-and-hold circuit may receive signals...

20060226882 - Method and apparatus for controlling transition rates on adjacent interconnects: A method, and apparatus are provided for controlling transition rates on adjacent interconnects in an electronic chip design. Each interconnect includes a first inverter that receives a net input and provides an initial inverted output and a second inverter coupled to the first inverter receiving the initial inverted output and...

20060226883 - High-voltage pulse generating circuit: A high-voltage pulse generating circuit has an inductor, a first semiconductor switch, and a second semiconductor switch which are connected in series between opposite terminals of a DC power supply unit, and a diode having a cathode terminal connected to a terminal of the inductor which has another terminal connected...

20060226884 - Low power bus-hold circuit: A low power bus hold circuit includes: a first inverter having an input coupled to a bus hold input node; and a second inverter having a first input coupled to a first output of the first inverter and a second input coupled to a second output of the first inverter,...

20060226885 - Apparatus and method for generating pulses: An apparatus for generating pulses includes: (a) A delay unit having an input delay locus for receiving a delay unit input signal and an output delay locus for presenting an output delay signal. The delay unit output signal is delayed by a delay interval with respect to the input delay...

20060226886 - Semiconductor device capable of preventing erroneous operation attributed to electrostatic noise, and input device and scanner equipped therewith: A semiconductor device includes: a plurality of external signal input means; an external input unit having a switch each connected between the external signal input means and a read line and electrically connected for output from the external signal input means on the read line; a shift register receiving an...

20060226887 - Bus switch circuit with back-gate control during power down: The bus switch with back gate control circuit includes: an NMOS transistor coupled between a first port and a second port; a PMOS transistor coupled in parallel with the NMOS transistor; a first blocking device coupled between the first port and a control node of the PMOS transistor; a second...

20060226888 - Temperature sensing circuit: A temperature-sensing circuit includes a first circuit block outputting an output voltage having negative or positive temperature coefficients and a second circuit block amplifying the output voltage of the first circuit block to a predetermined amplitude and outputting the amplified output voltage. It further includes a third circuit block producing...

20060226889 - Method and apparatus for providing compensation against temperature, process and supply voltage variation: In the present invention an apparatus and method for providing compensation against temperature, process and supply voltage variation in MOS circuits has been proposed. The invention provides a change in process, temperature and voltage detection circuit, which controls the body bias and the drive of the devices in the CMOS...

20060226890 - On/off charge pump: A method includes controlling the connection of a charge pump output to a load capacitor as a function of activation control signals to an oscillator controlling the charge pump. A charge pump system includes a charge pump, an oscillator, a switching element and an enable signal generator. The switching element...

20060226891 - Voltage pumping device: A voltage pumping device is disclosed. The device may include a voltage level detector for detecting a level of a voltage fed back thereto and generating a voltage pumping enable signal according to the detected voltage level, an oscillator for operating in response to the voltage pumping enable signal and...

20060226892 - Circuit for generating a reference current: A circuit for generating a reference current, including, between two terminals of application of a supply voltage: at least a first branch formed of at least a first and of at least a second transistors in series; at least a second branch formed of at least a third and of...

20060226893 - Bias circuit for high-swing cascode current mirrors: A bias circuit for providing at least first and second bias signals for biasing a cascode current source and/or a cascode current sink includes a resistive element and first, second and third transistors, each transistor having first and second source/drain terminals and a gate terminal. The first source/drain terminal of...

20060226894 - Multiple circuit blocks with interblock control and power conservation: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other...

20060226895 - Multiple circuit blocks with interblock control and power conservation: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other...

20060226896 - Switched capacitor filter and feedback system: A switched capacitor filter comprises three switched capacitor circuits. Each switched capacitor circuit has a capacitance. A first state that the capacitance is connected to an input end of a current signal, a second state that the capacitance is connected to an output end of a voltage signal, and a...

20060220689 - Data input buffer in semiconductor device: A data input buffer in a semiconductor is capable of avoiding operation speed deterioration of the data input buffer due to the temperature condition or process characteristic. The data input buffer in a semiconductor device includes an input detecting unit for detecting logic level of input data by comparing the...

20060220688 - Precision tuning of a phase-change resistive element: The present invention comprises a method and structure for programming an on-chip phase-change resistor to a target resistance. Using an off-chip precision resistor as a reference, a state-machine determines a difference between the resistance of an on-chip resistor and the target resistance. Based upon this difference, the state machine directs...

20060220690 - Voltage level detection circuit: A voltage level detection circuit is disclosed. The detection circuit may include a pull-up unit including a plurality of pull-up devices, each for supplying an internal voltage in response to a signal resulting from a logic operation of a voltage up control signal and a voltage down control signal, a...

20060220691 - Method in an electric net data transmission system for keeping the signal level constant in a coupling furnished with supply cable: Method in low voltage net transmission system for keeping the signal level of transmission constant on the net voltage rail or on wall outlet. In the method the feedback signals are taken wined or wirelessly from one or some locations of the actual apparatus or supply cable to the measuring...

20060220692 - Sample-hold circuit and semiconductor device: A first sampling capacitor 3 is connected between an output terminal of a first analog switch 1 and the ground, and an input terminal of a second analog switch 2 is connected to a node between the first analog switch 1 and the first sampling capacitor 3. A second sampling...

20060220693 - Differential blocking sampler, in particular for an analog digital converter: The blocking sampler comprises two main semi-samplers each having a respective differential input (E, E′) and a respective differential output (S, S′). With each main semi-sampler is associated a respective auxiliary blocking semi-sampler comprising an auxiliary tracking transistor (T1a, T1a′) powered by a voltage tapped off from the terminals of...

20060220694 - Voltage hold circuit and clock synchronization circuit: A voltage hold circuit which holds an input signal voltage includes a voltage comparator unit configured to output a result of comparison between a voltage of an externally inputted control signal and a voltage of an outputted analog hold signal, a digital value hold unit configured to increase or decrease...

20060220695 - Circuit arrangement for generating switch-on signals: A circuit arrangement for generating switch-on signals for driving track-and-hold elements of an analog-to-digital converter operating with interleaved timing comprises a first input for inputting a common reference clock signal, at least one window device for generating clock signals which are interleaved with respect to one another in terms of...

20060220696 - Semiconductor device with level conversion circuit: A level conversion circuit includes a differential pair of first and second transistors receiving differential input signals; a current mirror section; and a CMOS-type latch circuit. The current mirror section includes a first current mirror circuit receiving output current from the first transistor to output a first mirror current; a...

20060220697 - Multiple reference clock synthesizer: A clock synthesizer for dividing a source clock by N.R including a logic circuit, a delay line, a select circuit, an accumulator, and a clock divider circuit. The logic circuit divides N.R by 2M to get NNEW.RNEW in which NNEW is zero and RNEW is at least 0.5. The delay...

20060220699 - Circuit and method for transistor turn-off with strong pulldown: In accordance with the present invention, there is provided a circuit and method for providing a switchable strong pulldown for a power FET in an off state to avoid inadvertent or false turn ons. A strong pulldown is provided to the gate of a power FET to avoid inadvertent turn...

20060220702 - Data input buffer in semiconductor device: A semiconductor device for improving an operation speed of a data input buffer includes: a plurality of data input buffers each for detecting a logic level of an input data by comparing the input data with a reference voltage to output the detected signal as an internal data signal; and...

20060220698 - Drive circuit for a switching element: A drive circuit applies a drive voltage through an output terminal to a switching element. The drive circuit includes a supplying circuit, an amplifying circuit, a detecting circuit, and an adjusting circuit. In response to a control signal, the supplying circuit generates a first drive current. The amplifying circuit generates...

20060220700 - Flip-flop circuit having low power data retention: A flip-flop (10) has a normal mode and a low power mode to save power. The flip-flop (10) has a master latch (14) and a slave latch (20). The slave latch (20) is used to retain the condition of the flip-flop (10) during the low power mode, where power is...

20060220701 - Input circuit of a semiconductor device: A input circuit of a semiconductor device is disclosed. The input circuit may include a data receiver including a first comparator for comparing first input data with a predetermined reference voltage and outputting second input data according to the result of the comparison, a second comparator for receiving a data...

20060220703 - Programmable high speed interface: Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and...

20060220705 - High performance low power multiple-level-switching output drivers: Long existing performance, noise, and power consumption problems of prior art output drivers are solved by using n-channel transistors as pull up transistors and p-channel transistors as pull down transistors for high performance output drivers. Output drivers of the present invention can be fully compatible with HSTL or SSTL interfaces...

20060220704 - High-speed, low-power input buffer for integrated circuit devices: A high-speed, low-power input buffer for an integrated circuit device in which the input voltage (VIN) is coupled to both a pull-up and a pull-down transistor. In accordance with a specific embodiment, the input buffer utilizes a reference voltage input (VREF) during a calibration phase of operation but not when...

20060220707 - Output driver for semiconductor device: There are provided an output driver for a semiconductor device for securing the constant pull-up and pull-down drivability regardless of temperature condition and process characteristic. The output driver for a semiconductor device includes a first driving unit for transmitting an output data; a detecting unit for detecting at least one...

20060220706 - Power-on solution to avoid crowbar current for multiple power supplies' inputs/outputs: Techniques to avoid crowbar current are provided. An integrated circuit according to an embodiment of the present invention includes a first node having a first supply voltage level. A first level shift circuit is connected between the first node and a first path. A second level shift circuit is connected...

20060220708 - Digital clock frequency doubler: A digital clock frequency doubler for increasing an input frequency of an input clock signal includes an input block, and a generator block. The input block receives the input clock signal, and generates a pulse signal having an ON period equal to the input clock signal period. The generator block...

20060220709 - Circuit and method for generating power up signal: There is provided a circuit and a method for generating a power up signal. The circuit for generating a power up signal, includes an external power voltage divider for dividing a magnitude of an external power voltage so as to output the divided voltage, an external power voltage detector for...

20060220710 - Delay locked loop device: A delay device, with a controllable delay time, has three circuit parts. The delay device is connected in series between an input connection for receiving an input clock signal and an output connection for outputting an output clock signal. The delay time is set based on a phase difference between...

20060220711 - Differentuial charge pump with common mode control: Charge pump for providing an output current for charging and discharging a filter in accordance with an input signal, said charge pump comprising a first current source connectable with the input signal for driving the current source and adapted to providing a first current equal to a constant current Io...

20060220712 - Frequency double circuit: A frequency double circuit includes an input terminal, a first voltage source, a multiplier, a second voltage source, and an output terminal. The input terminal receives an input signal and outputs to the first voltage source. The first voltage source filters out a direct current signal of the input signal....

20060220713 - Frequency-based slope-adjustment circuit: A method and apparatus for a frequency-based slope-adjustment circuit block are described herein....

20060220714 - Clock generator and clock duty cycle correction method: A clock duty cycle correction (DCC) circuit for correcting a clock duty cycle of an external clock includes a phase comparator for comparing a phase of a rising clock with that of a falling clock to thereby output comparing signal; a DCC controller for outputting a DCC enable signal and...

20060220715 - Power down circuit capable of a wide rage control signal regardless of the power supply voltage fluction: The present invention is to provide a power down circuit, which can configure a wide range of the voltage of the control signal regardless of the fluctuation of the power supply voltage. In the power down circuit 1, the drain of the first N channel MOS transistor M1, into which...

20060220716 - Electronic circuitry protected against transient disturbances and method for simulating disturbances: The circuitry comprises successive stages, each comprising a combinatory logic circuit connected to the input of a first latch. Staggered clock signals are respectively associated with the first latches of the odd and even stages. Means for detecting a transient disturbance affecting the first latch of a stage and liable...

20060220718 - Data latch circuit of semiconductor device: A data latch circuit for latching a data signal in synchronization with a clock signal includes a hold time delay unit for generating a first clock signal by delaying the clock signal for a hold time of the data signal and an inverse first clock signal as a second clock...

20060220717 - Flip-flop circuit having low power data retention: A flip-flop (10) comprises a first latch circuit (18), a second latch circuit (24), and a third latch circuit (26). The first latch circuit (18) is coupled to receive a clock signal and a first power supply voltage. The second latch circuit (24) is coupled to the first latch circuit...

20060220719 - Methods and apparatus for improved phase switching and linearity in an analog phase interpolator: Methods and apparatus are provided for improving phase switching and linearity in an analog phase interpolator. A phase interpolator in accordance with the present invention comprises (i) a plurality of tail current sources that are activated for substantially all times when the phase interpolator is operational; (ii) at least two...

20060220720 - Methods and apparatus for maintaining desired slope of clock edges in a phase interpolator using an adjustable bias: Methods and apparatus are provided for maintaining a desired slope of clock edges in a phase interpolator using an adjustable bias. The disclosed phase interpolator comprises at least one delay element to generate at least two interpolation signals each having an associated phase and a variable slope unit associated with...

20060220721 - Clock delay compensation circuit: A clock delay compensation circuit for an integrated circuit having a first voltage domain and a second voltage domain, has a first delay element that receives a clock signal and generates a first delayed clock signal, and a multiplexer that receives the clock signal and the first delayed clock signal...

20060220723 - Controlling circuit for controlling operating clock and/or driving voltage of logic circuit, and method thereof: A controlling circuit for controlling an operating clock of a logic circuit in an electronic device and the method thereof are disclosed. The controlling circuit includes a storage device, a detector, at least one comparator, and a controller. The storage device stores a first threshold value and a first return...

20060220722 - Power consumption reduction circuit for clock network: A power consumption reduction circuit for reducing power consumed by a clock tree network including a transmission control circuit. The power consumption reduction circuit includes a transmission control circuit for controlling transmission of the clock signal to the buffer circuit group so as to selectively provide and interrupt the clock...

20060220724 - Pcmo resistor trimmer: Using programmable resistance material for a matching resistor, a resistor trimming circuit is designed to reversibly trim a matching resistor to match a reference resistor. The programmable resistance materials such as metal-amorphous silicon metal materials, phase change materials or perovskite materials are typically used in resistive memory devices and have...

20060220725 - Receiver with decision-directed equalizer: A circuit is configured to receive and process a signal that includes in-phase and out-of-phase components that correspond to in-phase and out-of-phase components of a time sequence of symbols. A phase sensor in the circuit is configured to determine a phase value in accordance with an equalized version of the...

20060220727 - Electronic switch and operational method for transistor: An electronic switch and an operational method for transistor are provided. The electronic switch includes a switch transistor and a bulk switch. The switch transistor has at least a first terminal, a second terminal and a third terminal. According to the third terminal, the connecting status between the first and...

20060220726 - System, method and program product for well-bias set point adjustment: A well-bias system dynamically adjusts well-bias set points to optimal levels across an integrated circuit (IC) for enhanced power savings and component reliability during a standby or low-power mode of operation. A controller within the IC determines if the chip power supply voltage will be reduced during an imminent standby...

20060220729 - Internal voltage generator: Provided is an internal voltage generator for preventing an occurrence of leakage current while a charge pumping is not performed. The internal voltage generator includes: a charge pumping unit for pumping an external voltage to generate a high voltage higher than the external voltage; a level detecting unit for detecting...

20060220728 - Voltage booster circuit: The present invention provides a voltage booster circuit for effectively supplying a boosted voltage of a stable level despite of small area. The voltage booster circuit of the present invention includes: an oscillator for generating a basic pulse signal; a phase divider for dividing a frequency of the basic pulse...

20060220730 - Cmos regulator for low headroom applications: A complementary metal oxide semiconductor (CMOS) voltage regulator for low headroom applications includes a differential input common mode range amplifier. The differential input common mode range amplifier is formed by a plurality of CMOS transistors. A source follower CMOS transistor is coupled to an output of the differential input common...

20060220732 - Constant current circuit and constant current generating method: The present invention provides a constant current circuit and a constant current generating method, wherein when a voltage slight in temperature dependence is applied to an element to output a constant current, temperature dependence of the element can be cancelled. A current indicative of first temperature dependence, which is generated...

20060220733 - Temperature-independent current source circuit: A temperature-independent current source is provided, which includes a current source generating a current that is proportional to the temperature and a current source generating a current that is inversely proportional to the temperature. Values of the circuit elements are selected so that the currents of the current sources add...

20060220731 - Transistor bias current regulation apparatus, method, and system: A biased transistor circuit utilizes a transistor that exhibits a change in threshold voltage as the drain-to-source voltage changes due to power supply voltage changes. A bias circuit senses the power supply voltage changes and modifies a gate bias voltage on the transistor to maintain a substantially constant drain bias...