Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 09/06

20060208765 - High frequency integrated circuit (hfic) microsystems assembly and method for fabricating the same: High frequency integrated circuit (HFIC) microsystems assembly and method for fabricating the same are disclosed. Presented HFIC assembly method has the optimized structure for minimizing the losses in transmitting electronic and electromagnetic energy in interconnects; it optimizes the area used for interconnects and eliminates most hazardous materials from the assembly...

20060208766 - Jitter detection apparatus: In a jitter detection apparatus, a playback RF signal 3 detected from an optical disc medium 1 is subjected to waveform shaping, and thereafter, converted into a digital RF signal 6 with a sampling clock having a cycle twice as long as a cycle of a channel clock. Thereafter, an...

20060208767 - Switch control apparatus, semiconductor device test apparatus and sequence pattern generating program: It is an object to properly control timing of opening and closing a switch by a circuit of simple constitution. A switch control apparatus for controlling a switch is provided, the switch control apparatus including a sequence memory for recording a sequence pattern includes open/close instruction data which instruct to...

20060208768 - High speed peak amplitude comparator: Various methods and circuits for implementing high speed peak amplitude comparison. The invention achieves higher speed of operation by eliminating the slow feedback loop commonly employed in peak detection. In one embodiment, the invention directly compares a signal that represents the peak amplitude of the input signal minus a small...

20060208769 - Circuit for use in frequency or phase detector: A tracking data cell (10) comprising: —a pair of track and hold circuits (1, 1′) coupled to a first multiplexer (5), —a clock signal (H+, H−) being inputted substantially in anti-phase in the respective track and hold circuits (1, 1′) for determining a receipt of a data signal (D+, D−)...

20060208773 - Circuit arrangement with a transistor having a reduced reverse current: A circuit arrangement is disclosed herein having an input terminal configured to receive an input voltage, and an output terminal to provide an output voltage for a load. A first transistor with a load path and a control terminal is connected between the input terminal and output terminal. A first...

20060208771 - Fan out buffer and method therefor: In one embodiment, a fan out buffer has the inputs of a plurality of output followers connected to the output of a plurality of distribution gates....

20060208770 - Power efficient dynamically biased buffer for low drop out regulators: The buffer circuit includes a first transistor MP1 having a first end coupled to an output node N2 and a control node coupled to an input node N1; a second transistor MN2 coupled to a second end of the first transistor MP1; a third transistor MN1 coupled to the second...

20060208772 - Semiconductor integrated circuit and noise-reduction method thereof: Regarding a semiconductor integrated circuit equipped with elements or circuits producing state changes upon receiving a common input, timings to produce state changes by the input are displaced. This is achieved by configuring a plurality of elements or circuits (input buffer circuits) with different threshold levels (threshold voltages Vtha, Vthb,...

20060208774 - Driver circuit capable of providing rise and fall transitions that step smoothly in the transition regions: A driver circuit that has a plurality of output elements that are switched on and off in staggered fashion by signals generated by first and second drive chains of a drive chain configuration. The first drive chain comprises “N” delay elements, each of which produces a time delay equal to...

20060208775 - Frequency dividing circuit, power supply circuit and display device: A level shifter and a charge pump circuit are added, among cascade-connected unit frequency dividing circuits forming a frequency dividing circuit, to the unit frequency dividing circuit in the first stage. The charge pump circuit boosts an input voltage based on a dot clock signal, and supplies the booster voltage...

20060208776 - Six phase synchronous by-4 loop frequency divider and method: A frequency divider circuit for obtaining, from a plurality of first signals having a first frequency and being out-of-phase to each other, at least one second signal having a second frequency equal to a fraction of the first frequency. The frequency divider circuit includes a delaying block for each first...

20060208777 - Semiconductor device for generating power on reset signal: A reference voltage generating circuit receives a power supply voltage and generates a reference voltage. A reference voltage level guarantee circuit generates a sense signal when the circuit senses that a value of the reference voltage has reached a predetermined value. A power supply voltage sensing circuit has a voltage...

20060208778 - Loop filter integration in phase-locked loops: A phase-locked loop and method are disclosed. One method embodiment includes providing a dual-path filter of a phase-locked loop, the dual-path filter consisting of passive components, and summing control signals in the dual-path filter using the passive components....

20060208780 - Delay-locked loop with feedback compensation: A delay-locked loop (DLL) with feedback compensation is provided to increase the speed and accuracy of the DLL. After the variable delay line of the DLL is adjusted to minimize phase error, multiple clock cycles may be required before the adjusted signal is fed back to the phase detector. During...

20060208779 - Variable delay clock synthesizer: In an embodiment, a fine resolution of variable clock delay is implemented using a variable DC offset having fine resolution. The proportional ratio between the DC offset and the phase delay/advance of the clock is calibrated in a closed-loop manner. In an embodiment, in a calibration circuit, an adaptive positive...

20060208781 - Method and apparatus for distorting duty cycle of a clock: An apparatus for controllably distorting the duty cycle of a clock signal is disclosed. Methods and systems using embodiments of the invention are also described....

20060208782 - Track and hold circuit: A track and hold circuit (1) comprising: —a linear amplifier (2) receiving a differential analog signal (D+, D−) and being controlled by a first binary clock signal (H+) having a first phase, —the linear amplifier (2) providing a feed-forward input signal substantially equal with the differential analog signal (D+, D−)...

20060208783 - Latch and clock structures for enabling race-reduced mux scan and lssd co-compatibility: An edge triggered system is provided having a data and scan input includes a latch device having a clock input and an AND gate, coupled to the latch device, structured and arranged to receive a first clock signal and an inverted clock signal to generate a clock to the clock...

20060208784 - Circuit for controlling phase with improved linearity of phase change: A circuit for controlling phase includes a first node providing a current responsive to a first clock signal, a first plurality of switch circuits coupled to the first node, a first plurality of current supply sources coupled to the first plurality of switch circuits, respectively, a second node providing a...

20060208785 - Variable delay circuitry: Circuitry for providing an input data signal to other circuitry on an integrated circuit includes a course delay chain and a fine delay chain. These two delay chains are cascadable, if desired, to provide a very wide range of possible amounts of delay which can be finely graded by use...

20060208786 - Method and device for clock synchronisation with a vestigial-sideband-modulated transmitted signal: A method for clock synchronisation between an amplitude-modulated or phase-modulated received signal (r(t)) and a transmitted signal (s(t)) estimates the timing offset (ε) between the received signal (r(t)) and the transmitted signal (s(t)) by means of a maximum-likelihood method. The maximum-likelihood method in this context is realised by an estimation...

20060208787 - Analog switch with reduced parasitic bipolar transistor injection: According to the invention a well-switching arrangement, with a semiconductor circuit including a switch having an input terminal, an output terminal and a body region and at least one comparator having a first input coupled to at least one of the terminals and a second input coupled to a positive...

20060208788 - Mosfet for synchronous rectification: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of...

20060208789 - Switching power source device: A switching power source device is provided which comprises a drive controller 40 connected between an error amplifier 26 and changeover circuit 37. A second comparator 52 of drive controller 40 compares an output voltage or an equivalent signal thereto from error amplifier 26 with a numerical value from a...

20060208790 - Precise and process-invariant bandgap reference circuit and method: A voltage generation circuit generating a reference voltage using a bandgap reference. A countering circuit is included to adaptively counter for any deviations caused in a bandgap reference voltage such that the reference voltage is independent of fabrication process variations and changes in ambient temperature. In an embodiment, current, proportionate...

20060208791 - Transferred-impedance filtering in rf receivers: The present invention provides a method for using transferred-impedance filtering in RF (radio frequency) receivers (e.g., inside of a mobile communication device), wherein said filtering can be done with MOS-switches transferring impedance of a regular RC or RCL circuit to RF frequency filtering inside an RFIC (radio frequency integrated circuit)....

20060202720 - Comparator with resonant tunneling diodes: A comparator uses two resonant tunneling diodes (RTDs) in series with resistors of the latch element of the comparator. By inserting two RTD diodes in series with resistors, the negative resistance of the first and the second RTD diodes reduces the effective RC time constants of the resistors and latch,...

20060202721 - Differential comparator with extended common mode voltage range: A system and method is provided for extending the range of a common mode voltage of a differential comparator. In one embodiment, a differential comparator comprises an input stage with a negative voltage reference node, a first differential input coupled to a first differential pair transistor and operative to receive...

20060202722 - Sample-and-hold circuits: A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacitor couples to the second terminal...

20060202723 - Systems and methods that employ inductive current steering for digital logic circuits: The present invention provides systems and methods that utilize inductive current steering to improve logic circuit performance by mitigating propagation delays associated with conventional transistor current steering. The system and methods employ RF transformers, wherein energizing primary windings induce current in associated secondary windings. In one aspect, a single clock...

20060202724 - Comparator circuit assembly, in particular for semiconductor components: The invention relates to a semi-conductor component with a comparator circuit assembly (1), as well as a comparator circuit assembly (1), in particular a comparator/receiver circuit assembly, comprising a first and second transistor (8, 9), whose control inputs are connected with each other, and a third transistor (10), to whose...

20060202725 - Frequency divider with slip: An apparatus has a frequency divider accepting a clock. The frequency divider is selectable between an N divide factor and an M divide factor via a divide mode signal, where an absolute value of (N−M)=1. The apparatus also has a pulse generator responsive to a slip signal and driven by...

20060202726 - Fast-locking digital phase locked loop: An apparatus for synchronizing signals. For devices, such as memory devices, implementing a synchronization device to synchronize signals, a synchronization device having a delay locked loop coupled to a phase locked loop may be implemented. The delay locked loop is implemented to measure the period of a reference signal and...

20060202727 - Switching device for detecting a voltage interruption: A switching device for detecting a voltage interruption at a control unit in a motor vehicle, with a nonvolatile memory for storage of calibration data for an actuator that can be adjusted by the control unit and a drive unit. The control unit is supplied with an internal voltage through...

20060202728 - Charge pump clock for non-volatile memories: A charge pump clock for a memory device wherein pump clock signals are generated at an adaptive rate. The circuit of the present invention generates clock edges at a minimum of TD seconds apart so long as address transitions do not exceed a pre-determined limit. However, if address changes are...

20060202729 - System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal: A signal generating circuit includes a pulse generator generating a pulse responsive to a periodic clock reference signal. The pulse propagates through a plurality of series-connected delay elements in a measurement delay line. The measurement delay line is coupled to a series of latches that correspond to respective groups of...

20060202730 - Clock sources and methods with reduced clock jitter: Clock sources are provided which are especially useful for reducing phase noise in signal samplers that typically provide samples of an analog input signal in signal-conditioning systems such as analog-to-digital converters. This phase noise reduction is realized with the recognition that sampler noise is related to clock jitter by a...

20060202733 - High performance signal generation: A high performance phase detector includes a local digital oscillator for generating a digital reference signal of programmable frequency and phase. The phase detector accumulates a difference in phase between the digital reference signal and a sampled input signal to produce a measure of phase error. The phase detector can...

20060202731 - Semiconductor integrated circuit device: A clock signal is provided with amplitudes of a plurality of levels and flip-flop circuits having different threshold values are used so that at least two different frequencies can be simultaneously supplied through one clock signal line....

20060202732 - Synchronous clock generator including duty cycle correction: A clock generator for generating an output clock signal synchronized with an input clock signal and having a corrected duty cycle. The clock generator includes an input buffer to buffer the input clock signal and generate a buffered clock signal and an output buffer to generate the output clock signal...

20060202734 - Voltage multiplier and relative operating method: A voltage multiplier includes a control circuit that generates first and second signals in phase opposition and a charging section. The latter comprises a first capacitor having a first terminal coupled to the first signal and a second capacitor having a first terminal coupled with the second signal. The multiplier...

20060202736 - Bootstrapped switch for sampling inputs with a signal range greater than supply voltage: The bootstrapped switch for sampling inputs with a signal range greater than supply voltage includes: a bootstrapped switch coupled between an input node and an output node; a first transistor having a first end coupled to a control node of the bootstrapped switch, and having a backgate coupled to a...

20060202735 - Bootstrapped switch with an input dynamic range greater than supply voltage: The bootstrapping circuit capable of sampling inputs beyond supply voltage includes: a bootstrapped switch coupled between an input node and an output node; a first transistor having a first end coupled to a control node of the bootstrapped switch, and having a backgate coupled to the second end of the...

20060202738 - Line regulator with high bandwidth (bw) and high power supply rejection ratio (psrr)and wide range of output current: Aspects of a method and system for a linear regulator with high bandwidth, PSRR, and a wide range of output current are provided. A method for isolating voltages in a circuit may comprise applying a reference voltage to an isolation resistor based on a supply voltage. An internal voltage at...

20060202737 - Method and circuit for driving a gate of a mos transistor negative: A method and circuit for driving the gate of a MOS transistor having a negative or low threshold voltage negative, in which the driving circuit is formed on a single chip. A negative voltage is generated from a positive voltage to drive the gate of the MOS transistor negative. The...

20060202739 - Relay set in network device and method thereof: A relay set in a network device. The relay includes a first switch, a switch control unit, and a first AC coupling unit. The first switch is coupled between a first receiving end of the network device and a first transmitting end of the network device. The switch control unit...

20060202740 - Bias selection: One or more MOS devices may be used as a bias selecting circuit to pass a bias voltage from a bias generator to a level shifting circuit....

20060202743 - Adaptive input voltage controlled voltage booster: Provided is a voltage booster adaptively controlled by an input voltage. The voltage booster includes an Operational Transconductance Amplifier (OTA) having positive and negative input terminals and generating an output current in response to a voltage difference between the positive and negative input terminals. The positive input terminal of the...

20060202742 - Bootstrapping ciruit capable of sampling inputs beyond supply voltage: The bootstrapping circuit capable of sampling inputs beyond supply voltage includes: a bootstrapped switch MN20 coupled between an input node and an output node; a first transistor MP13 having a first end coupled to a control node of the bootstrapped switch MN20; a clock bootstrapped capacitor C13 having a first...

20060202741 - Fast start charge pump for voltage regulators: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are...

20060202744 - Voltage generating circuit with two resistor ladders: A voltage generating circuit that drives multiple output terminals in alternating positive and negative cycles has two resistor ladders, one resistor ladder generating voltages for the positive cycles, the other resistor ladder generating voltages for the negative cycles. Single-ended amplifiers are connected directly to the resistor ladders, and a switching...

20060202745 - Reference voltage generating circuit and reference current generating circuit: In a reference current generating circuit, an output voltage of a regulator is divided by a resistance dividing circuit consisting of resistors to generate a micro reference voltage. It is possible to connect and disconnect the resistance dividing circuit using a switch consisting of a transistor. A switch consisting of...

20060202746 - Nmos reverse battery protection: A reverse polarity protected system comprises a voltage source that includes positive and negative terminals. A polarity-sensitive device has a first terminal that communicates with the positive terminal of the voltage source, and that includes a second terminal. A low-resistance switch communicates with the first and second terminals of the...

20060202747 - Filter circuit array, in particular higher-order low-pass filter circuit array: A filter circuit array is disclosed. In one embodiment, the filter circuit array includes a higher-order filter circuit array, wherein one energy storage per order of filter is provided. The transfer function of the filter circuit array has a zero formed by a first energy storage, in particular capacitor, and...

20060202748 - Input circuit: An input circuit has a differential amplification circuit which converts a differential signal to a single end signal to output the single end signal, an attenuation circuit which attenuates a first input signal to output the attenuated signal to the differential amplification circuit, a capacitor in which one end thereof...

20060197558 - Clock loss detection and switchover circuit: In one aspect, an embodiment provides a clock loss sense and switchover circuit and method in which clock switchover is responsive to loss of a primary signal and to additional switch command signaling. In another aspect, an embodiment provides a clock loss sense circuit and method that utilizes counters and...

20060197559 - Data input buffer for use in a semiconductor device: The present invention provides a semiconductor design technology, in particular a data input buffer for use therein. This data input buffer secures a data level sensing margin in a weak data transmission cycle upon an asymmetrical data pattern transmission. Specifically, the present invention provides a technology of improving a level...

20060197560 - Output circuit: The present invention relates to an output circuit. A first external power is supplied to be used as a second external power in a normal operating mode, and the supply of the power is shut off and an output driver is made to have a HIGH impedance state in a...

20060197561 - Controller and loading system thereof: A loading system and a controller thereof are disclosed. The controller includes an adjustable triangle wave generator, an error signal generator, and a pulse signal generator. The triangle-wave generator is adapted to perform an amplitude and frequency operation according to the reference voltage and the feedback voltage for generating an...

20060197563 - Anti-gate leakage programmable capacitor: An anti-gate leakage programmable capacitor including at least one capacitor having a first terminal coupled to a first node and a second terminal, a second node, and a control circuit which selectively couples the second terminal of the capacitor to the second node or which drives the second terminal to...

20060197564 - Clock generating apparatus and method in optical storage system: A clock generating apparatus and clock generating method of an optical disc drive for calibrating a clock signal according to an input signal. The clock generating apparatus includes a frequency detector for detecting sampling times in a duration when the clock signal samples an interval between two synchronization patterns of...

20060197562 - Phase locked loop that sets gain automatically: There is provided a phase locked loop, PLL, that sets gain automatically. The PLL comprises a frequency discriminator for providing a first signal that represents the difference between a first frequency and a second frequency. The PLL also comprises a comparator coupled to the frequency discriminator for receiving the first...

20060197565 - Delay locked loop for controlling duty rate of clock: There is provided a DLL capable of controlling a duty rate of a clock by a fuse option or an EMRS input. The DLL includes a first clock buffer, a second clock buffer, a first delay line, a second delay line, a shift register, a first duty control unit, a...

20060197567 - Dll circuit for providing an adjustable phase relationship with respect to a periodic input signal: The invention relates to a DLL circuit for providing an adjustable time delay of a periodic input signal, said circuit having controllable delay elements which are connected in series and form a delay chain, having a phase detector in order to generate a control signal on the basis of the...

20060197566 - Dll circuit for providing an output signal with a desired phase shift: The present invention relates to a DLL circuit for providing an output signal which is shifted with by a desired phase shift with respect to a periodic input signal. In one embodiment, the DLL Circuit comprises a plurality of delay elements all having the same delay time and being connected...

20060197568 - Slew rate calibrating circuit and slew rate calibrating method: A slew rate calibrating circuit and a slew rate calibrating method are provided which are capable of adjusting, with high accuracy, a slew rate of a signal to be output to a transmission path. A first clock is input and a delay time of a variable delay circuit is increased...

20060197569 - Drive circuit for two switching converter stages in a voltage converter: A drive circuit is disclosed including a first feedback circuit designed to generate a first feedback signal from a first voltage to be controlled and a first reference voltage. The drive circuit further includes a signal converter designed to generate a second feedback signal from the first feedback signal such...

20060197570 - Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods: Pulse-width modulation (PWM) circuits and methods integrate a feedback signal and an input signal to generate an integral signal, and generate a PWM signal by switching an output node from a first source voltage to a second source voltage based upon comparing the integral signal with a first reference voltage,...

20060197571 - High speed pulse based flip-flop with a scan function and a data retention function: Provided is a multi-threshold CMOS (MTCMOS) flip-flop for latching a data input signal in response to a clock signal and converting the latched signal to a data output signal. The flip-flop includes: a latch unit receiving the data input signal in a normal mode, latching the data input signal based...

20060197572 - Delay circuit and ring oscillator using the same: In a delay circuit, when a first conductivity-type transistor (M6) becomes conductive on the basis of one level of its input signal, a first current path is formed through a source side transistor (M4), the first conductivity-type transistor (M6), and a second drive transistor (M9) between a source power line...

20060197573 - Semiconductor integrated circuit and method for manufacturing semiconductor integrated circuit: The semiconductor integrated circuit of the present invention comprises a clock circuit for generating a clock signal. The clock circuit comprises a clock control circuit for controlling propagation of the clock signal. The clock control circuit comprises a burn-in control signal input terminal for inputting a burn-in control signal that...

20060197574 - Auto-zero circuit: An auto-zero circuit is disclosed. The auto-zero circuit includes a first set of circuits for implementing a first auto-zero phase and a second set of circuits for implementing a second auto-zero phase. The first set of circuits includes a first differential amplifier and a first feedback path coupled between an...

20060197575 - Baseline wandering correction device and method: A baseline wandering correction device for correcting baseline wandering of signals at a first output terminal and a second output terminal of a receiver includes: a control circuit for outputting a control signal according to voltages of the first and the second output terminals and a second threshold value; a...

20060197576 - Variable resistance circuit: Values of control signals 61, 62, 63, . . . , 6n, each inputted to an input terminal for operation control 6 of each of transistor elements 4 constituting a variable resistance portion 2, are controlled based upon an input signal 40 and offset signals 52, 53, . . ....

20060197577 - Lossy linearizers for analog optical transmitters: System and method for compensating for even order and odd order nonlinear distortion in a single by introduction of a compensating signal that removes substantially all of the nonlinear distortion in one order or in two orders. Two or more diodes are arranged in at least one of an anti-series...

20060197578 - Level converter: A level converter is disclosed. In one embodiment, the level converter includes a first and second input for applying a first voltage and first and second output terminals for providing a second voltage, a first RC element, and a second RC element, and a first controlled current source arrangement and...

20060197579 - Semiconductor device with level converter having signal-level shifting block and signal-level determination block: A semiconductor device including a level converter (LSC) is disclosed. The level converter comprises a voltage-up circuit (LSC1) that operates on low voltage of power supply (VDD) and steps up voltage enough to drive the level converter and a level converter circuit (LSC2) that operates on high voltage of power...

20060197580 - Protected power devices: A power insulated gate field effect transistor has main cells (2) controlled by a main cell insulated gate and sense cells (4) controlled by a sense cell insulated gate. A sample and hold circuit (10,50) is arranged to operate in a plurality of states including at least one sample state...

20060197581 - Temperature detecting circuit: p

20060197582 - Voltage providing circuit: A voltage providing circuit includes a protective circuit and a power supply circuit. The protective circuit includes a first transistor. A first control signal is input to a collector of the first transistor, a second control signal is input to a base of the first transistor, an emitter of the...

20060197583 - Method of enhancing efficiency of charge pump circuit and charge pump selector circuit: A method for enhancing efficiency of charge pump circuit, and a charge pump control selector are provided. Power consumption of output, delivered from the charge pump unit to the load circuit, is detected. A sample signal is obtained and compared with a reference signal to generate a comparison signal. The...

20060197584 - Speed-up circuit for initiation of proportional to absolute temperature biasing circuits: A PTAT biasing circuit for use in a bandgap referenced voltage source includes a startup sub-circuit. Prior to activation of a power up indication signal, the speedup circuit forces the PTAT biasing circuit from a degenerate operating point to a normal operating point. Upon detection of a feedback signal denoting...

20060197585 - Voltage reference generator and method of generating a reference voltage: According to one embodiment, the reference voltage generator generates a reference voltage which changes with temperature. For example, the reference voltage generator may generate a reference voltage that decreases as temperature increase. The reference voltage generator is configured to selectively change a temperature coefficient of the reference voltage such that...

20060197586 - Accurate cascode bias networks: Bias networks are provided for accurate generation of biases of cascode transistor arrangements. Network embodiments generate a voltage that accurately biases the transistor of a cascode arrangement at a selected point in its saturation region and this voltage is accurately transferred to the drain of a transistor via the gate-to-source...

20060197587 - Active filter: An active filter comprising a first stage (10), a second stage (20) and a third stage (30), each of them being provided with a respective operational amplifier (11, 21, 31); a feedback branch (50) defined by a resistor (51) connects the output (31c) of the third operational amplifier (31) to...

20060197588 - Filtering device having multiple inputs and multiple feedback paths: A filtering device for filtering N input signals to generate a filtered signal. The filtering device includes an input module and a first circuit. The input module includes at least N impedance components. Each impedance component comprises a first end and a second end. The first end is utilized for...

20060197558 - Clock loss detection and switchover circuit: In one aspect, an embodiment provides a clock loss sense and switchover circuit and method in which clock switchover is responsive to loss of a primary signal and to additional switch command signaling. In another aspect, an embodiment provides a clock loss sense circuit and method that utilizes counters and...

20060197559 - Data input buffer for use in a semiconductor device: The present invention provides a semiconductor design technology, in particular a data input buffer for use therein. This data input buffer secures a data level sensing margin in a weak data transmission cycle upon an asymmetrical data pattern transmission. Specifically, the present invention provides a technology of improving a level...

20060197560 - Output circuit: The present invention relates to an output circuit. A first external power is supplied to be used as a second external power in a normal operating mode, and the supply of the power is shut off and an output driver is made to have a HIGH impedance state in a...

20060197561 - Controller and loading system thereof: A loading system and a controller thereof are disclosed. The controller includes an adjustable triangle wave generator, an error signal generator, and a pulse signal generator. The triangle-wave generator is adapted to perform an amplitude and frequency operation according to the reference voltage and the feedback voltage for generating an...

20060197563 - Anti-gate leakage programmable capacitor: An anti-gate leakage programmable capacitor including at least one capacitor having a first terminal coupled to a first node and a second terminal, a second node, and a control circuit which selectively couples the second terminal of the capacitor to the second node or which drives the second terminal to...

20060197564 - Clock generating apparatus and method in optical storage system: A clock generating apparatus and clock generating method of an optical disc drive for calibrating a clock signal according to an input signal. The clock generating apparatus includes a frequency detector for detecting sampling times in a duration when the clock signal samples an interval between two synchronization patterns of...

20060197562 - Phase locked loop that sets gain automatically: There is provided a phase locked loop, PLL, that sets gain automatically. The PLL comprises a frequency discriminator for providing a first signal that represents the difference between a first frequency and a second frequency. The PLL also comprises a comparator coupled to the frequency discriminator for receiving the first...

20060197565 - Delay locked loop for controlling duty rate of clock: There is provided a DLL capable of controlling a duty rate of a clock by a fuse option or an EMRS input. The DLL includes a first clock buffer, a second clock buffer, a first delay line, a second delay line, a shift register, a first duty control unit, a...

20060197567 - Dll circuit for providing an adjustable phase relationship with respect to a periodic input signal: The invention relates to a DLL circuit for providing an adjustable time delay of a periodic input signal, said circuit having controllable delay elements which are connected in series and form a delay chain, having a phase detector in order to generate a control signal on the basis of the...

20060197566 - Dll circuit for providing an output signal with a desired phase shift: The present invention relates to a DLL circuit for providing an output signal which is shifted with by a desired phase shift with respect to a periodic input signal. In one embodiment, the DLL Circuit comprises a plurality of delay elements all having the same delay time and being connected...

20060197568 - Slew rate calibrating circuit and slew rate calibrating method: A slew rate calibrating circuit and a slew rate calibrating method are provided which are capable of adjusting, with high accuracy, a slew rate of a signal to be output to a transmission path. A first clock is input and a delay time of a variable delay circuit is increased...

20060197569 - Drive circuit for two switching converter stages in a voltage converter: A drive circuit is disclosed including a first feedback circuit designed to generate a first feedback signal from a first voltage to be controlled and a first reference voltage. The drive circuit further includes a signal converter designed to generate a second feedback signal from the first feedback signal such...

20060197570 - Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods: Pulse-width modulation (PWM) circuits and methods integrate a feedback signal and an input signal to generate an integral signal, and generate a PWM signal by switching an output node from a first source voltage to a second source voltage based upon comparing the integral signal with a first reference voltage,...

20060197571 - High speed pulse based flip-flop with a scan function and a data retention function: Provided is a multi-threshold CMOS (MTCMOS) flip-flop for latching a data input signal in response to a clock signal and converting the latched signal to a data output signal. The flip-flop includes: a latch unit receiving the data input signal in a normal mode, latching the data input signal based...

20060197572 - Delay circuit and ring oscillator using the same: In a delay circuit, when a first conductivity-type transistor (M6) becomes conductive on the basis of one level of its input signal, a first current path is formed through a source side transistor (M4), the first conductivity-type transistor (M6), and a second drive transistor (M9) between a source power line...

20060197573 - Semiconductor integrated circuit and method for manufacturing semiconductor integrated circuit: The semiconductor integrated circuit of the present invention comprises a clock circuit for generating a clock signal. The clock circuit comprises a clock control circuit for controlling propagation of the clock signal. The clock control circuit comprises a burn-in control signal input terminal for inputting a burn-in control signal that...

20060197574 - Auto-zero circuit: An auto-zero circuit is disclosed. The auto-zero circuit includes a first set of circuits for implementing a first auto-zero phase and a second set of circuits for implementing a second auto-zero phase. The first set of circuits includes a first differential amplifier and a first feedback path coupled between an...

20060197575 - Baseline wandering correction device and method: A baseline wandering correction device for correcting baseline wandering of signals at a first output terminal and a second output terminal of a receiver includes: a control circuit for outputting a control signal according to voltages of the first and the second output terminals and a second threshold value; a...

20060197576 - Variable resistance circuit: Values of control signals 61, 62, 63, . . . , 6n, each inputted to an input terminal for operation control 6 of each of transistor elements 4 constituting a variable resistance portion 2, are controlled based upon an input signal 40 and offset signals 52, 53, . . ....

20060197577 - Lossy linearizers for analog optical transmitters: System and method for compensating for even order and odd order nonlinear distortion in a single by introduction of a compensating signal that removes substantially all of the nonlinear distortion in one order or in two orders. Two or more diodes are arranged in at least one of an anti-series...

20060197578 - Level converter: A level converter is disclosed. In one embodiment, the level converter includes a first and second input for applying a first voltage and first and second output terminals for providing a second voltage, a first RC element, and a second RC element, and a first controlled current source arrangement and...

20060197579 - Semiconductor device with level converter having signal-level shifting block and signal-level determination block: A semiconductor device including a level converter (LSC) is disclosed. The level converter comprises a voltage-up circuit (LSC1) that operates on low voltage of power supply (VDD) and steps up voltage enough to drive the level converter and a level converter circuit (LSC2) that operates on high voltage of power...

20060197580 - Protected power devices: A power insulated gate field effect transistor has main cells (2) controlled by a main cell insulated gate and sense cells (4) controlled by a sense cell insulated gate. A sample and hold circuit (10,50) is arranged to operate in a plurality of states including at least one sample state...

20060197581 - Temperature detecting circuit: p

20060197582 - Voltage providing circuit: A voltage providing circuit includes a protective circuit and a power supply circuit. The protective circuit includes a first transistor. A first control signal is input to a collector of the first transistor, a second control signal is input to a base of the first transistor, an emitter of the...

20060197583 - Method of enhancing efficiency of charge pump circuit and charge pump selector circuit: A method for enhancing efficiency of charge pump circuit, and a charge pump control selector are provided. Power consumption of output, delivered from the charge pump unit to the load circuit, is detected. A sample signal is obtained and compared with a reference signal to generate a comparison signal. The...

20060197584 - Speed-up circuit for initiation of proportional to absolute temperature biasing circuits: A PTAT biasing circuit for use in a bandgap referenced voltage source includes a startup sub-circuit. Prior to activation of a power up indication signal, the speedup circuit forces the PTAT biasing circuit from a degenerate operating point to a normal operating point. Upon detection of a feedback signal denoting...

20060197585 - Voltage reference generator and method of generating a reference voltage: According to one embodiment, the reference voltage generator generates a reference voltage which changes with temperature. For example, the reference voltage generator may generate a reference voltage that decreases as temperature increase. The reference voltage generator is configured to selectively change a temperature coefficient of the reference voltage such that...

20060197586 - Accurate cascode bias networks: Bias networks are provided for accurate generation of biases of cascode transistor arrangements. Network embodiments generate a voltage that accurately biases the transistor of a cascode arrangement at a selected point in its saturation region and this voltage is accurately transferred to the drain of a transistor via the gate-to-source...

20060197587 - Active filter: An active filter comprising a first stage (10), a second stage (20) and a third stage (30), each of them being provided with a respective operational amplifier (11, 21, 31); a feedback branch (50) defined by a resistor (51) connects the output (31c) of the third operational amplifier (31) to...

20060197588 - Filtering device having multiple inputs and multiple feedback paths: A filtering device for filtering N input signals to generate a filtered signal. The filtering device includes an input module and a first circuit. The input module includes at least N impedance components. Each impedance component comprises a first end and a second end. The first end is utilized for...