Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 07/06

20060164125 - Comparator with offset compensation: A differential comparator with reduced offset. The differential comparator includes a first transistor coupled to a first input current and a second transistor coupled to a second input current. The first and second transistors are biased as diodes during a reset phase to store an offset voltage on parasitic capacitances...

20060164126 - High-speed comparator: A differential comparator with improved bit-error rate performance operating with a low supply voltage. The differential comparator includes a first pair of transistors receiving a differential input. A second pair of transistors is coupled to the first pair of transistors. A pair of resistive elements is connected between the first...

20060164127 - High speed peak amplitude comparator: Various methods and circuits for implementing high speed peak amplitude comparison. The invention achieves higher speed of operation by eliminating the slow feedback loop commonly employed in peak detection. In one embodiment, the invention directly compares a signal that represents the peak amplitude of the input signal minus a small...

20060164129 - Circuit for cutting-off output signal: An output signal cutting-off circuit includes a first switching element, a driving circuit and a voltage-drop-signal generating circuit. When a voltage to be monitored becomes lower than a threshold voltage, a voltage-drop-signal is generated and supplied to the driving circuit. The driving circuit turns on the first switching element based...

20060164128 - Low current power supply monitor circuit: A power supply monitor circuit is configured to monitor the state of a power supply, such as a battery, while drawing little power from the power supply and using relatively few device components and thus less on-chip resistance. The circuit includes a reference voltage circuit and a comparator circuit. The...

20060164130 - Semiconductor integrated circuit device: A semiconductor integrated circuit device includes a semiconductor substrate having a first surface. First wells of first conductive type are formed on the semiconductor substrate. Second wells of second conductive type are formed on the semiconductor substrate. The first wells surround each of the second wells on the first surface....

20060164131 - Active current mode sampling circuit: The invention relates to an active current mode sampling circuit comprising an operational amplifier (103) and at least one switched capacitor (C2, C2a, C2b). In order to reduce the power consumption of such a circuit, first switching elements (S101a, S101b, S102a, S102b) switch the switched capacitor (C2, C2a, C2b) between...

20060164132 - System and method for jitter control: A fractional-N frequency synthesizer is described that includes a voltage controlled oscillator (VCO), a programmable integer divider, and a glitch-free phase rotator. The phase select inputs of the phase rotator are controlled by a delta-sigma modulator to provide fine frequency resolution in addition to randomization and noise shaping of fractional...

20060164133 - Buffer circuit: The objective of the present invention is to present a buffer circuit by which a load can be driven at a high speed while restraining an increase in power consumption. A current input to npn transistor Q1 via node N1 is detected by current detection circuit 1. At bias control...

20060164134 - Buffer circuit and integrated circuit: In a two-stage inverter circuit including an inverter circuit constituted by first and second FETs and an inverter circuit constituted by two FETs, a source and a gate of a third FET are connected to a first power source and a second power source, respectively. A drain of the third...

20060164135 - Driver circuit: An abnormal reduction in a positive high power supply electric potential VH outputted by a positive booster charge pump circuit at switching of an output stage inverter in a driver circuit is prevented. An output of an inverter INV2 is applied to an input terminal of an inverter INV4 for...

20060164136 - Circuit and method for power-on reset: In a power-on reset circuit and a method of generating a power-on reset signal tolerant of variation of an ambient temperature, the power-on reset circuit includes a first power-on reset unit, a second power-on reset unit and a logic gate. The first power-on reset unit generates a first power-on reset...

20060164138 - Lock-detection circuit and pll circuit using same: A lock-detection circuit that can set an acceptable phase-error range adapted to define a locked state and/or an unlocked state at a constant rate without being affected by a frequency and that can detect the locked state and/or the unlocked state with precision without being affected by various fluctuations and...

20060164137 - Phase locked loop: A phase locked loop comprising a phase detector (100) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector (100) comprising: means (10) for obtaining a first one of said frequency control signals...

20060164141 - Controlled delay line circuit with integrated transmission line reference: Embodiments of the present invention include a controlled delay line circuit comprising a feedback loop including an integrated transmission line, wherein the integrated transmission line is used as a timing reference for the feedback loop and wherein the feedback loop and the transmission line are integrated on a single integrated...

20060164140 - Generating multi-phase clock signals using hierarchical delays: Circuits and methods for generating multi-phase clock signals using digitally-controlled hierarchical delay units (HDs) are provided. A plurality of serially-coupled HDs outputs clock signals that are phase-shifted relative to a reference clock signal. Each HD includes either one or two variable delay lines that provide coarse phase adjustment of an...

20060164139 - Loop circuitry with low-pass noise filter: Phase comparators for use in loop circuits (i.e., DLL circuits and PLL circuits) are provided. The phase comparators include a phase detector for comparing a reference clock signal and a feedback signal derived from the loop circuit generated internal clock signal. The phase comparators also include a low-pass noise filter...

20060164142 - High resolution pulse width modulator: A pulse width modulator (100) and method that facilitates high resolution pulse width modulation is provided. The pulse width modulator (100) creates a pulse width modulated signal having a duty cycle that is proportional to a controllable delay in the modulator. The pulse width modulator combines a first digitally controllable...

20060164143 - Method and system for reducing glitch effects within combinational logic: A method and system for reducing glitch effects in combinational logic is presented. If combinational logic incurs a particle-induced single event transient (SET) signal, a glitch reducing circuit, which is connected in a signal path between the combinational logic and downstream logic, will prevent the SET from propagating to the...

20060164144 - Flip-flop circuit and semiconductor device: A flip-flop circuit capable of stable, high-speed operation even at low voltages includes a clock buffer for outputting differential clock signals with an offset to first and second latch circuits, the clock signals having a threshold-value voltage of a transistor as the offset voltage. The first and second latch circuits...

20060164145 - Method and apparatus for creating variable delay: Disclosed herein is a method and apparatus used to create variable delay output from a high-speed trigger input signal. A variable delay generation circuit includes a preconditioning circuit, operative to provide a preconditioned signal in response to an input signal. At least one delay tap path is coupled to the...

20060164146 - Edge shifted pulse train generator: A pulse train generating circuit has a pattern generating circuit 10 that includes a memory 9 to store pattern data and reference voltage data, and synchronously provides the pattern data and the reference voltage data from the respective terminals A and B. A digital to analog converter 14 converts the...

20060164147 - Level conversion circuit: To provide a level shift circuit in which the margin of level shift operation is prevented from deteriorating when the potential difference between a first power supply and a second power supply is large. A level shift circuit for changing the signal level in a first logic circuit fed from...

20060164148 - Zero-bias-power level shifting: A circuit for voltage level translation with zero static current is disclosed for interfacing devices at one supply voltage with devices at another supply voltage. The translation is achieved by using a modified current mirror circuit such that the current mirror is effectively turned off when the output reaches a...

20060164149 - Mixer stage and method for mixing two signals having different frequencies: A mixer stage is provided that includes an oscillator, a first input, a second input, a first output, a second output, a set of four controllable amplifier elements, and a first current source. The mixer stage further includes at least one second current source in addition to the first current...

20060164150 - Compound semiconductor switch circuit device: High-resistance elements are connected as parts of a control resistor between a switching element and a protecting element immediately near the switching element and between adjacent protecting elements. Paths for high-frequency signals are cut off, and high-frequency signals can be prevented from leaking although there are parasitic capacitances due to...

20060164151 - Temperature compensated reference current generator: A first order temperature compensated reference current generator includes a current device providing a controlled current, a startup circuit connected to the current device for initiating operation of the current device, and a current definition mechanism driven by the current device for supplying a current which is independent of temperature,...

20060164152 - Bias generator for body bias: A bias generator is provided that includes a central bias generator to provide a first bias voltage and a local bias generator to receive the first bias voltage and to provide a second bias voltage. The central bias generator may include a replica bias generator circuit substantially corresponding to the...

20060164153 - Characteristic adjustment circuit for logic circuit, circuit, and method of adjusting a characteristic of circuit: A characteristic adjustment circuit for a logic circuit includes an oscillator that includes a first metal-oxide semiconductor (MOS) transistor and outputs an oscillation output, and a voltage generator that generates a voltage of a second MOS transistor of the logic circuit according to a phase difference between the oscillation output...

20060164156 - Charge pump circuit: A size of a charge pump circuit is reduced as well as its cost. In a positive booster charge pump circuit in an embodiment of this invention, a positive boosted voltage 2 VDD generated at its first stage node is used as a gate voltage to turn on a MOS...

20060164154 - Charge-pump circuit and boosting method for charge-pump circuit: A charge charge-pump circuit according to an embodiment of the invention includes: a first boosting capacitor; a second boosting capacitor series-connected with the first boosting capacitor; a first boosting clock driver connected between the first boosting capacitor and the second boosting capacitor and boosting the first boosting capacitor; and a...

20060164155 - Low-ripple boosted voltage generator: The output voltage ripple of a single stage or a multi-stage charge pump may be significantly reduced by introducing in the voltage generator a cascode connected output transistor. In operation, this output transistor may be in a conduction state and may be controlled with a voltage having a smaller ripple...

20060164157 - Bias generator for body bias: A bias generator unit is provided that includes a central bias generator to provide a bias voltage, a local bias generator to receive the bias voltage and a reference voltage and to provide a forward body bias signal or a reverse body bias signal. The bias generator may include a...

20060164158 - Reference voltage circuit: Disclosed is a reference voltage circuit including control means for performing control so that the voltage of a first current-to-voltage conversion circuit becomes equal to the voltage of a second current-to-voltage conversion circuit; a first current mirror circuit for outputting a current proportionate to the value of a current supplied...

20060164159 - Filter circuit: Disclosed is a filter circuit with an order of three or more, comprising at least one means for amplifying an in-band signal, wherein the frequency response of the filter output has a desirable attenuation characteristic obtainable with the order of the filter circuit. The gain of the amplifying means is...

20060164160 - Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive iir filter stages combined with direct sampling and mixing: A technique of improving antialiasing and adjacent channel interference filtering uses cascaded passive IIR filter stages combined with direct sampling and mixing. The methodology and related architecture allows for increased passive IIR filtering without necessitating use of amplifier stages....

20060158228 - Motion actuator: A motion actuator comprises a cylindrical movable shaft and a stage that contains an expansible/contractible device and two clamps. The expansible/contractible device can be controlled to drive the axial motion of the movable shaft, and the two clamps can be controlled to grip/release the shaft. The two clamps and the...

20060158229 - Improved signal detector for high-speed serdes: An improved signal detector system implementable in a high-speed SerDes receiver core that is able to detect valid signals from noise signals with a much tighter tolerance. The signal detector system improves upon the prior art designs by implementing modifications including: (1) the use of two peaking amplifiers for both...

20060158230 - Nanophotonic integrated circuit and fabrication thereof: A class of nanophotonic integrated circuit (nPIC) has been disclosed that is a platform technology for fiberoptic communication and computing, that is fabricated from waveguides that are based on natural index contrast (NIC) principle. A multifunctional nPIC and its fabrication details have been described. The nPIC is also known as...

20060158231 - Sampling and level shifting circuit: A circuit comprising a first switch for sampling a differential signal and a second switch for level-shifting the sampled differential signal is disclosed. The first and second switches are cross-coupled to cancel a charge injected between the first and second switches and for linearizing the charge transfer; and a capacitor...

20060158232 - Bus driver circuit: A solution for increasing the switching speed of a bus driver circuit includes a pair of transistors controlled by a pair of control circuits. Pumping circuits are placed between the control electrodes of the transistors to speed up the conduction of one of the transistors immediately after the other is...

20060158233 - Programmable phase-locked loop circuitry for programmable logic device: A phase-locked loop (“PLL”) for use in a programmable logic device (“PLD”) is constructed with modular components, which may be digital, and which may be programmable or adjustable, in place of the conventional analog charge pump and loop filter. Connections are provided between those components and the remainder of the...

20060158234 - Phase-lock loop and loop filter thereof: A loop filter includes a first resistor, a first capacitor, and an amplifier with a specific gain. Wherein, the amplifier includes an input terminal coupled to an input terminal and an output terminal of the loop filter through the first resistor. In addition, the amplifier also includes an output terminal...

20060158235 - Phase-locked loops: A phase-locked loop (PLL) is disclosed. One embodiment, among others, includes a PLL that provides a control signal and a square root module configured to receive state information, the state information corresponding to tuning information, the square root module further configured to multiply the control signal by a square root...

20060158236 - Schmidt trigger circuit having sensitivity adjusting function and semiconductor device including the same: To maintain the noise removal characteristic of a Schmidt trigger circuit stably. There are provided a Schmidt trigger circuit 10 constituted from a Vp/Vn setting unit 11 for determining the threshold level of an input signal and an RS latch unit 12, a driver unit 13 having a low-pass filter...

20060158237 - Programmable low-power high-frequency divider: A fast latch including: a NAND stage adapted to receive a clock signal and a data input signal; a clocked inverter stage, a first input of the clocked inverter stage coupled to the output of the NAND stage and a second input of the clocked inverter stage coupled to the...

20060158238 - Circuit and method of controlling a delay of a semiconductor device: A delay control circuit capable of controlling a delay time is disclosed. The delay control circuit includes a delay detecting circuit, a first pulse generator, a counter control circuit and a counter. The delay detecting circuit delays an input signal by a first time in response to an output signal...

20060158239 - Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit: An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse...

20060158240 - Distributed temperature control system for point of dispense temperature control on track systems utilizing mixing of hot and cold streams: A point of dispense temperature control apparatus for a track lithography system. The apparatus includes a first liquid source characterized by a first temperature and a first flow controller coupled to the first liquid source. The apparatus also includes a second liquid source characterized by a second temperature and a...

20060158241 - Cmos-based receiver for communications applications: A receiver and receiver front end having multiple independent differential inputs, multiple independent differential low-noise amplifiers, and two sets of double-balanced IQ mixers. The double-balanced mixers include cross-coupled PMOS devices that dynamically inject current at zero-crossing points to cancel out tail currents in the mixers. Also, methods of operating the...

20060158242 - Method and apparatus for extending the size of a transistor beyond one integrated circuit: A technique for extending the size of a power transistor beyond one integrated circuit is disclosed. An example apparatus includes a first integrated circuit chip having a first switch, which includes first, second and third terminals. The first integrated circuit chip further includes a first driver circuit having an input...

20060152250 - Low-voltage detection circuit: A low-voltage detection circuit detects a terminal voltage of a power supply terminal. The low-voltage detection circuit includes a first voltage-dividing circuit, a second voltage-dividing circuit, and a comparator. The second voltage-dividing circuit includes a bias circuit and a metal-oxide-semiconductor (MOS) transistor. The comparator compares and receives a voltage generated...

20060152251 - High dynamic range current-mode track-and-hold circuit: Embodiments of the current-mode track and hold circuit comprise a cascode input stage, a dynamic biasing stage, a cascode output stage, and a switch operable to interconnect the input stage and the output stage. The input stage is connected to receive an input current. The dynamic biasing stage is connected...

20060152252 - Data slicer with a source-degeneration structure: A data slicer with a source-degeneration structure is described. In particular, this invention can be implemented in a FM demodulation system. It located at the end of the demodulator. The data slicer can slice a signal transmitted through air and demodulates the same with a demodulator to produce a frequency-shifted...

20060152253 - Driver circuit: A driver circuit that prevents amplitude reduction at a high temperature comprises a differential pre-buffer circuit 22 for performing signal clamping by diodes 16 and 17 each having a nonlinear voltage-current characteristic with respect to an input signal and a differential output circuit 23 for amplifying output signals of the...

20060152254 - Reduced current input buffer circuit: There is provided a reduced current input buffer circuit. More specifically, in one embodiment, there is provided an input buffer circuit comprising an input buffer that is adapted to draw an operating current, means for providing a first portion of the operating current to the input buffer, and means for...

20060152255 - Gate oxide protected i/o circuit: An integrated circuit comprises a first input node and a second input node, an output node; a first output transistor of a first type and a second output transistor of a second type, and a first clamping transistor of the second type and a second clamping transistor of the second...

20060152256 - Push-pull buffer amplifier and source driver: A push-pull buffer amplifier and a source driver are provided. In the buffer amplifier, the N-type and the P-type comparators compare an input signal and an output signal. The input terminals of the first and the second inverters are coupled to the first output terminals of the N-type and the...

20060152257 - Frequency multiplier: A multiplier core outputs a single-phase signal containing a frequency component having a frequency which is an even multiple of the frequency of input signals. A differential amplifier includes first and second nMOS transistors having respective source terminals connected to each other. The output signal from the multiplier core is...

20060152258 - Trapezoid signal generating circuit: A trapezoid signal generating circuit has a charging and discharging circuit for a capacitor to generate a trapezoid signal which has less change at its rising portion and falling portion. Current output circuits supply a charging current and a discharging current in accordance with a voltage outputted from a current...

20060152259 - Delay locked loop circuit for a synchronous semiconductor memory device and a method of generating information about a load connected to a data pin of a synchronous semiconductor memory device: A delay locked loop (DLL) circuit for a synchronous semiconductor memory device which can control a delay time of a feedback loop within the DLL circuit according to the magnitude of an external load, and a method of generating information about a load connected to a data pin of a...

20060152260 - Semiconductor device having delay drift compensation circuit that compensates for delay drift caused by temperature and voltage variations in clock tree: A semiconductor device having a delay drift compensation circuit that compensates for a delay drift caused by temperature and voltage variations in a clock tree includes a clock driver having an output port, a first circuit having an input port, a first signal path between the output port of the...

20060152261 - Communication apparatus including driver means for applying a switched signal to a communication line with a controlled slew rate: A communication node including drivers (5,6) for applying a switched signal to a communication line (3,4) such as a CAN bus or a LIN bus, with a controlled slew rate. The driver (5,6) comprises a series of transfer elements (18,20) and a series of delay elements (17,19) for cumulatively establishing...

20060152262 - Pulse generators with variable pulse width and sense amplifiers using the same and related methods: Pulse generators include a delay circuit that is responsive to an input signal. The pulse generators also include an output circuit that is configured to generate an output pulse signal in response to the output of the delay circuit. In these pulse generators, the delay circuit has a variable delay...

20060152265 - Duty cycle corrector: A duty cycle corrector comprising a first circuit and a second circuit. The first circuit is configured to receive a clock signal having a first phase and a second phase and to obtain a first threshold value based on the length of the first phase and part of the second...

20060152266 - Duty cycle detector with first, second, and third values: A duty cycle detector comprising a first circuit configured to receive clock cycles including a first level and a second level. The first circuit is configured to obtain a first value based on the length of the first level and to obtain second and third values based on the length...

20060152264 - Method of establishing a pwm-modulated output signal representation: The invention relates to a method of establishing a PWM-modulated output signal representation (OS), providing a stream of parallelly determined intersection representations (PIR) on the basis of a stream of parallel reference signal representation (PRSR) and an input signal (IS), establishing a serial PWM output signal representation (OS) by transforming...

20060152263 - Pulse-width modulator circuit and method for controlling a pulse width modulator circuit: The invention relates to a pulse width modulator circuit for generating a reference signal having a desired duty cycle comprising an adjustment unit including at least one storage register and a counter, the storage register being configured for storing values corresponding to the desired duty cycle at least approximately and...

20060152267 - Multi-threshold mos circuits: A multi-threshold flip-flop includes a master latch, a slave latch, and at least one control switch. The master latch is composed of an input buffer formed with low threshold (LVT) transistors and a first latch circuit formed with LVT transistors. The slave latch is composed of a second latch circuit...

20060152268 - Latch circuit including a data retention latch: A latch circuit 2 is described including a function path latch 4, 6, which may be in the form of a standard flip-flop, together with a data retention latch 12, 14. The reset signal nreset and the scan enable signal SE are used to control these latches to perform reset,...

20060152269 - Latch circuit, 4-phase clock generator, and receiving circuit: A latch circuit includes a voltage driven type data reading unit and a voltage driven type data holding unit, and operates based on a clock signal that is supplied from an outside source. The data reading unit reads both a first input data and a second input data, and outputs...

20060152270 - Circuit arrangement for electrically isolated signal transmission: The invention relates to a circuit arrangement for DC-isolated transmission of an analog input variable by means of a signal transformation part, having a voltage input and a voltage output, and in particular also for voltage matching between the voltage input and the voltage output of the circuit arrangement. The...

20060152271 - Interface system between controller ic and driver ic, and ic suitable for such interface system: A disk controller IC (11), driven by a first supply voltage (V1), is provided with a push-pull type output circuit having an output terminal (P1). The output circuit may be turned ON/OFF by a control signal. On the other hand, disk driver IC (12) is provided with a first voltage...

20060152272 - Semiconductor integrated circuit with electrically programmable fuse: A semiconductor integrated circuit comprises an electrically programmable fuse element that is provided between a programming voltage node and a latch node, and a latch circuit that latches a voltage at the latch node. The semiconductor integrated circuit further comprises a current source that controls a magnitude of an operation...

20060152273 - Single-stage and modular multi-stage clock-booster: A single-stage clock booster produces a boosted clock voltage on an output node that is a multiple of a supply voltage. The single-stage clock booster includes a pump capacitor having a first terminal being driven by a first control phase signal. A first switch is controlled by the boosted clock...

20060152274 - Voltage generating/transferring circuit: Boost units are series-connected. A first MOS transistor is connected between one terminal of the series circuit and a VPP node, and the other terminal of the series circuit is connected to the gate of a second MOS transistor for transferring a boosted voltage. Each boost unit is made up...

20060152275 - Signal transmitting circuit: A signal transmitting circuit includes a driving circuit, and a plurality of receiving circuits receiving signals transmitted from the driving circuit. Each of the receiving circuits is coupled to the driving circuit consecutively via a transmission line. A voltage regulator is coupled to the driving circuit and the receiving circuits...

20060145727 - Glitch free reset circuit: An apparatus for compensating for glitch occurrence in a reset signal that is applied in an integrated circuit, includes: a logic stage capable to process an incoming signal and a delayed incoming signal that is a delayed version of the incoming signal, the logic stage capable to generate an output...

20060145728 - System and method for high frequency, high output swing buffers: Methods and systems for increasing gain for an electric circuit are disclosed herein. Aspects of the method may comprise receiving an input differential signal at a first configured pair of transistors and a second configured pair of transistors. The first and second configured pair of transistors may be inductively loaded....

20060145729 - High speed sample-and-hold circuit: The use of a dynamic current bias technique to dynamically bias a voltage switch of a sample-and-hold circuit is disclosed. Dynamically biasing the voltage switch mitigates nonlinear distortion caused by VBE (VGS) variation during charging and discharging the holding capacitor of the sample-and-hold circuit The bandwidth of the sample-and-hold circuit...

20060145730 - Signal processing apparatus having internal clock signal source: A signal processing apparatus includes: (a) A signal treating unit for effecting signal treating functions to present a treated signal at an output. (b) A clock generator receiving a clock signal and using the clock signal for presenting an internal clock signal for use by the signal treating unit. (c)...

20060145731 - Signal generating circuit: A power good signal generating circuit includes an NPN transistor, a first resistor, a second resistor, a third resistor, a first power source, and a second power source. The first resistor is connected between a base of the transistor and the first power source. The second resistor is connected between...

20060145733 - Bandlimited digital synthesis of analog waveforms: A method for generating a bandlimited digital signal, includes generating a sequence of digital samples of a waveform, such as a sawtooth, square, or pulse waveform. The waveform has a discontinuity with a phase within a particular sampling interval. The digital samples in the sequence of digital samples of the...

20060145732 - Fast locking method and apparatus for frequency synthesis: A fast-locking apparatus and method for frequency synthesis. A transition detector receives a first pulse signal indicative that the phase of an input signal leads that of a reference signal, receives a second pulse signal indicative that the phase of the input signal lags that of the reference signal, and...

20060145735 - Output buffer circuit eliminating high voltage insulated transistor and level shift circuit, and an interface circuit using the output buffer circuit: A novel output buffer circuit including an input circuit, a voltage generating circuit, and an output circuit forms a three-state buffer circuit. The output circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. With such a configuration, a simple circuit using no high voltage...

20060145734 - Rail-to-rail pad driver with load independent rise and fall times: A pad driver is presented that in one form is capable of driving a wide range of capacitive loads with constant rise and fall times, over a wide range of temperature and process corners. A desirable form of the pad driver is characterized by the ability to charge and discharge...

20060145736 - Variable division method and variable divider: A feedback path (307) is formed between an output (310c) of a fixed divider (305) and a control terminal (310b) of an inverting/noninverting unit (304). A connection device (306) is arranged on the feedback path (307). The feedback path (307) is connected/disconnected according to the level of the control signal...

20060145737 - Current-reuse-type frequency multiplier: A first differential input terminal is connected to one differential output terminal of a VCO, and a second differential input terminal is connected to the other differential output terminal of the VCO. RF signals in a complementary relationship with each other that are output from the VCO are input to...

20060145738 - Method and circuit configuration for synchronous resetting of a multiple clock domain circuit: A method and circuit configuration for synchronous resetting of an multiple clock domain circuit such as an Application Specific Integrated Circuit (ASIC) combine an asynchronous reset signal with a functional signal using a clocked reset tree of synchronous logic elements....

20060145739 - Power-up detection circuit that operates stably regardless of variations in process, voltage, and temperature, and semiconductor device thereof: A power-up detection circuit which operates in a stable way regardless of variation in PVT. The power-up detection circuit includes a bias circuit that generates a bias voltage in response to an external voltage, and a detection circuit that generates a detection signal in response to the bias voltage. The...

20060145741 - Digital delay lock loop: A digital delay locked loop architecture is independent of feedback delay (clock tree delay). The architecture employs a frequency detector circuit which monitors the frequency of the input clock and then sets a division factor for a reference clock used to control delay tap selection. In this way, the architecture...

20060145740 - Vcdl-based dual loop dll having infinite phase shift function: Provided is a dual loop DLL for generating an internal clock signal synchronized with an external clock, which includes a reference DLL receiving a reference clock and generating a plurality of phase clock signals having a first phase difference, a coarse loop selecting one of the phase clock signals and...

20060145742 - Pulse-on-edge circuit: A pulse on edge circuit includes a first pull up transistor having its gate terminal coupled to a delayed control signal and a second pull up transistor having its gate terminal coupled to an inverted delayed control signal. A first and second pull down transistors are coupled in series between...

20060145743 - Data latch, master/slave flipflop and frequency divider circuit: A data latch contains a supply connection, a reference ground potential connection and a data input. The input side of an inverter is connected to the data input, and it is coupled via a first switching device to the supply connection, and via a second switching device to the reference...

20060145744 - Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits: Methods of and apparatuses for matching the signal delay, clock timing, frequency response, gain, offset, and/or transfer function of signal pathways in electrical circuits such as, for example, time-interleaved and pipelined circuits using analog-valued floating-gate MOSFETs are disclosed. The methods and apparatuses disclosed are applicable to a variety of circuits,...

20060145745 - Synchronous clock generator including duty cycle correction: A clock generator for generating an output clock signal synchronized with an input clock signal and having a corrected duty cycle. The clock generator includes an input buffer to buffer the input clock signal and generate a buffered clock signal and an output buffer to generate the output clock signal...

20060145746 - On chip power supply: A technique, for drawing power from the external signal circuit to power on-chip elements for an integrated circuit diode (ICD), utilizes an integrated diode and capacitor. The capacitor is charged by the external applied voltage during the time the ICD blocks the external current flow. The charged capacitor then acts...

20060145747 - Multi-stage charge pump voltage generator with protection of the devices of the charge pump: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the...

20060145748 - N-stage exponential charge pumps, charging stages therefor and methods of operation thereof: An exponential charge pump uses a number of identical or similar charging stages, each having a first and second capacitor. During a first clock phase, the first capacitor of each stage is charged by the second capacitor of the preceding stage, and, during a complementary second clock phase, the positive...

20060145749 - Bias circuit having reduced power-up delay: A bias circuit includes a reference generator for generating a bias signal at an output of the reference generator. The reference generator is selectively operable a first mode or a second mode in response to a first control signal applied to the reference generator, wherein in the first mode of...

20060145750 - Voltage reference with enhanced stability: A composite voltage reference with improved temperature stability includes a monolithic voltage reference integrated circuit (“IC”). The voltage reference IC has an internal voltage reference, an internal OpAmp circuit including scaling resistors, a monolithic voltage reference IC temperature coefficient, and a user accessible input to vary a monolithic voltage reference...

20060145751 - Analog mos circuits having reduced voltage stress: Circuits and methods are provided for reducing the voltage stress applied to the drain to source conduction path of an FET and/or to reduce the stress to the gate oxide of an FET which may have a thin gate oxide. Thus, in a current mirror circuit disclosed herein, a first...

20060145752 - Control circuit and method: A control circuit including a first control unit, controlling a logic circuit, connected between a power supply and a virtual ground, the control unit connecting the virtual ground to a ground in response to a mode control signal when the logic circuit operates in an active mode and disconnecting the...

20060145753 - System for setting an electrical circuit parameter at a predetermined value: A system is disclosed for setting an electrical circuit parameter at a predetermined value. The system comprises a first electrical component having a first electrical parameter associated therewith. Sensing means generate a control signal indicative of the value of the first electrical parameter. A second electrical component has a second...

20060145754 - Analog filter circuit and adjustment method thereof: An analog filter circuit in which filter characteristic deviation can be adjusted with simple circuitry and its adjustment method can be provided. The analog filter circuit includes a low pass filter and a high pass filter and output signals of both filters are input to a comparison and adjustment section...