Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 06/06

20060139062 - Sense amplifiers with high voltage swing: A sense amplifier includes a reference voltage generator for generating a reference output voltage and a core output voltage generator for generating a core output voltage. The core output voltage generator includes a core front-end stage and a core back-end stage or includes a plurality of amplifier transistors each conducting...

20060139063 - Capacitor charging methods and apparatuses that use a secure parallel monitoring circuit: A capacitor charging circuit and method including a plurality of serially connected capacitors and parallel monitor circuits connected in parallel on a one-to-one basis to the capacitors. Each one of parallel monitor circuits applies a direct-current source voltage to a capacitor and bypasses a charge current of the capacitor when...

20060139065 - Current driver, data driver, display device and current driving method: A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives,...

20060139064 - Drive circuit of computer system for driving a mode indicator: A drive circuit of a computer system is for driving a mode indicator. The computer system includes a first port and a second port. The mode indicator includes a first receiving end and a second receiving end. The drive circuit includes a first input end connected to the first port,...

20060139066 - Input buffer circuit having a differential amplifier structure: An input buffer circuit achieving rail-to-rail operation maintains a uniform common mode output voltage even though an input signal having any voltage level is inputted. The input buffer circuit has a differential amplifier structure (and receiving two differential input signals. A first input part has a first inverter circuit into...

20060139067 - Method and system for synchronizing phase of triangular signal: A multiplicity of electronic devices is provided to generate triangular wave signals variable between an upper and lower limit voltages by charging or discharging capacitors. One of the triangular wave signals serves as a master triangular wave signal for controlling the phases of the remaining (or slave) triangular wave signals....

20060139068 - Method for configurably enabling pulse clock generation for multiple signaling modes: A method and a system for configurably generating enabling pulse clocks are disclosed herein. In various embodiments, enabling pulse clocks are configurably generated for a selected one of a first and a second signaling mode, employing a configurable enabling pulse clock generator configurable to so generate the enabling pulse clocks....

20060139070 - Initialization circuit for a semiconductor: An initialization circuit for a semiconductor device is disclosed. The initialization circuit comprises an internal voltage detector for outputting a desired level of voltage signal in response to a level of an internal voltage, a voltage corrector for correcting a voltage at an output terminal of the intemal voltage detector...

20060139071 - Power-on-reset circuit based on the threshold levels and quadratic i-v behavior of mos transistors: A system and method for providing a clock-independent reset signal based on supply voltage threshold levels is described. The trip points or predefined voltage levels where the power-on-reset circuit behavior reverses (which controls the reset signal) is determined by the dimensions of the transistors selected for the voltage dividers. The...

20060139069 - System and method for maintaining persistent state data: A system and method for maintaining persistent data during an unexpected power loss uses a memory controller and a supplemental power source. An entity running on the computer, for example, an application program, a utility, the operating system or other entity, may identify data for preservation using an application program...

20060139073 - Phase locked loop having enhanced locking characteristics: A phase locked loop (PLL) integrated circuit includes a voltage-controlled oscillator (VCO) configured to generate a clock signal at an output terminal thereof. The VCO is further configured to improve the frequency response of the PLL by varying a capacitance of the output terminal concurrently with changing a frequency of...

20060139072 - Z-state circuit for phase-locked loops: The four types of the Z-state circuits basically include a sensing gate, two stacked PMOS transistors, and a feedback line. The sensing gate senses a voltage at its input assuming no feedback is applied. Again, the corresponding output of two stacked PMOS transistors is assumed to be connected to the...

20060139074 - Charge pump dc / dc converter: The present invention is a charge pump circuit provided as a charge pump DC/DC circuit for reducing the in-rush current in an initial operation of a charge pump operation. The charge pump DC/DC converter is realized using a conventional charge pump SW circuit, without any modification to the charge pump...

20060139075 - Delay locked loop using synchronous mirror delay: A delay locked loop comprises a circuit configured to receive a clock signal, divide the clock signal by two to provide a divided clock signal, and mirror with respect to the divided clock signal a fractional portion of a feedback delay remaining after dividing the feedback delay by a multiple...

20060139076 - Z-state circuit for delay-locked loops: The four types of the Z-state circuits basically include a sensing gate, two stacked PMOS transistors, and a feedback line. The sensing gate senses a voltage at its input assuming no feedback is applied. Again, the corresponding output of two stacked PMOS transistors is assumed to be connected to the...

20060139077 - Flip-flop circuit: A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing...

20060139078 - Clock signal adjuster circuit: The present invention relates to a clock signal distribution circuit for distributing the clock signal to circuits such as LSI integrated circuits, and, more specifically, provides a clock adjuster circuit, which performs phase difference adjustment of clock signals automatically. It is a circuit, which on driving a circuit element implemented...

20060139079 - Delay circuit and semiconductor device: A delay circuit comprises: N-stage circuits having a first circit to a N-th circuit connected in cascade, the input signal being input to the first circuit and a transmission signal delayed by a (k-1)-stage (where 2≦k≦N) circuit is input to a k-th circuit for sequential transmission; a common delay circuit...

20060139080 - Data strobe signal generating circuit and data strobe signal generating method: Provided is a data strobe signal generating circuit capable of guaranteeing a preamble time (tRPRE). The data strobe signal generating circuit includes: a strobe output driver for outputting a data strobe signal to an outside of a semiconductor device so as to indicate synchronization between an external device and data...

20060139084 - Latch-based pulse generator: There is provided a pulse generator capable of generating a pulse with a reduced number of transistors that toggle in response to a clock signal, thereby reducing power consumption. The pulse generator includes a plurality of unit cells, wherein an nth unit cell (n is a natural number more than...

20060139083 - Modifying clock signals output by an integrated circuit: An integrated circuit of the kind which transmits a clock-signal off-chip to a load (7) is provided with a load measurement circuit (4), which measures a load value indicative of the power being drawn from the IC by the clock output (5), and a comparison circuit (13), which compares the...

20060139082 - Pulse generator and method for generating a pulse train: A method for generating a pulse train is provided with adjustable start and end times of individual pulses, in which additional clock signals are generated from a 0th clock signal, the signals which in each case have a frequency of the 0th clock signal and whose phase is shifted in...

20060139081 - Redundant synchronous clock distribution system: A redundant synchronous clock distribution system is provided comprising at least a first and a second clock module (CB-A, CB-B) and first and second clock distribution branches (O1, O2) adapted for synchronizing at least one clock slave module (CSM) connected downstream to the redundant synchronous clock distribution system. Each of...

20060139085 - Differential circuit and receiver with same: A differential circuit including a differential amplifier circuit having a differential element provided in a signal input circuit, a constant current source connected to the differential element, and loads respectively connected to the differential element, and a source follower circuit that outputs a differential voltage based on voltage drops developing...

20060139086 - Circuit arrangement for bridging high voltages using a switching signal: A circuit arrangement for bridging high voltages using a switching signal as a dynamic voltage level shifter includes switching signal sequences that can be processed or provided at different voltage levels. Thus, any technology for integrated high-voltage circuit involving any isolation method can be used to produce the circuit arrangements....

20060139087 - System for discharging electronic circuitry: An electronic discharge circuit. The discharge circuit includes a first current source having first current source input and output and a current control circuit having first, second, third, and fourth control contacts. An electronic circuit element of an electronic circuit has first and second element contacts. If first control contact...

20060139088 - Biasing scheme for low supply headroom applications: Methods and apparatus for improving the current matching within current mirror circuits in applications such as low voltage integrated circuits. Embodiments of the present invention attempt to maintain the proper current ratio between reference and output supplies by adjusting the reference output of the current mirror. An existing reference voltage...

20060132189 - Low power telemetry system and method: A telemetry system is described in which a plurality of channels are coupled to a bus. A control subsystem controls the channels so that one of the channels presents to the bus during its designated time period a channel characteristic. The control subsystem interrogates in the analog domain each of...

20060132190 - Periodic electrical signal frequency monitoring systems and methods: Systems and methods for monitoring frequencies of periodic electrical signals are disclosed. According to one technique, a first and second counters are respectively clocked by a first periodic electrical signal to be monitored and a second periodic electrical, and a threshold detector resets one of the counters when a count...

20060132191 - Low-power receiver equalization in a clocked sense amplifier: A receiver includes clocked, differential equalization circuitry to compensate for signal attenuation that varies with the frequency of the input signal received over a respective communication channel. The incoming signal is split into filtered and unfiltered signal components. Separate current-steering transistors coupled in parallel amplify the filtered and unfiltered components...

20060132193 - Differential amplifier and data driver employing the differential amplifier: Disclosed is a differential amplifier which includes first and second input terminals, an output terminal, first and second differential pairs, and first and second current sources for supplying currents to the first and second differential pairs. The first differential pair has first and second inputs of an input pair connected...

20060132192 - High speed analog envelope detector: A high speed analog transmission envelope (data-validity) detector for detecting the validity or invalidity of received data by generating (and comparing) first through fourth level-shifted signals based on a pair of differential input signals that are externally applied (received). Each of the first through fourth level-shifted signals has voltage levels...

20060132195 - Controller for driving current of semiconductor device: Disclosed is a controller for driving current of a semiconductor device having an over-driving function, the controller comprising: a load means supplied with an internal voltage; a plurality of switching means, each of which has a first terminal connected to an external voltage and a second terminal connected to the...

20060132196 - Current mirror circuit, driving circuit using the same, and method of driving the circuit: A current mirror circuit is disclosed that is capable of supplying a desired second current regardless of whether the threshold voltages of the current mirror circuit's transistors are the same or different. The current mirror circuit includes a first transistor whose first terminal is electrically connected to a voltage source...

20060132197 - Output driver circuit and a method of transmitting an electrical signal via an output driver circuit: In an output driver circuit, the signal propagation time of an electrical signal which is to be transmitted between two selected driver stages is ascertained. If the ascertained signal propagation time is at least equal to half the period duration of the signal which is to be transmitted, the signal...

20060132194 - Power mosfet driver and method therefor: In one embodiment, a power MOSFET driver uses two different voltages for the operating voltage of the two output drivers of the power MOSFET driver....

20060132198 - Above rail writer driver: The present invention achieves technical advantages as a write driver preamplifier circuit providing a higher output voltage than that of the supply voltage, and utilizing smaller capacitors. The circuit generates a differential voltage across the writer output larger than the supply voltage. Advantageously, during the DC portion of the write...

20060132199 - Supply voltage switching circuit: A supply voltage switching circuit for a computer includes a chipset, a first transistor, a second transistor, and a third transistor. The chipset includes a first MOSFET and a second MOSFET. A 5V system voltage and a 5V standby voltage are respectively inputted to sources of the first MOSFET and...

20060132200 - Fractional-n divider, fractional-n phase locked loop and method of dividing a frequency f of an output signal by n, wherein n is a non-integer: A fractional-N divider for dividing a frequency f of an output signal by N, where N is a non-integer. The fractional-N divider includes an oscillator 209 adapted to provide K output signals I,I=I1, . . . , IK. Each output signal I has the same frequency f and period T....

20060132201 - Low power, power on reset circuit with accurate supply voltage detection: The power on reset circuit includes: a comparator; a resistor string having a first end coupled to a first supply node of the comparator, a first tap point node coupled to a first input of the comparator, and a second end coupled to a second input of the comparator; and...

20060132202 - System and method for synthesizing a clock at digital wrapper (fec) and base frequencies using one precision resonator: A precision PLL based transceiver having a single precision SAW or crystal resonator is configured to lock onto multiple different input frequencies and output generated clocks at the multiple different frequencies. The input reference frequency may be higher or lower than the resonator frequency. A fraction of two whole numbers...

20060132203 - Delay locked loop for use in semiconductor memory device and method thereof: A delay locked loop (DLL) for generating a delay locked clock signal includes a delay line unit for delaying an external clock signal according to a delay amount control signal to thereby generate the delay locked clock signal; a divider for dividing the delay locked clock signal by a predetermined...

20060132204 - Delay stabilization circuit and semiconductor integrated circuit: A delay stabilization circuit capable of suppressing a drop in stability of delay or frequency and a cost increase and also able to shorten a design time, and a semiconductor integrated circuit are provided. The delay stabilization circuit includes a passive noise filter configured by a capacitor and a resistor,...

20060132205 - Reset-free delay-locked loop: A delay locked loop (DLL) includes a delay unit configured to delay an input clock signal by a specified amount to produce a delayed clock signal. A phase detector receives as input the input clock signal and the delayed clock signal and outputs a signal proportional to the phase difference...

20060132206 - Trimming method and apparatus for voltage controlled delay loop with central interpolator: Methods and apparatus are provided for trimming a desired delay element in a voltage controlled delay loop. The disclosed trimming process comprises the steps of obtaining a first phase signal of a reference clock; applying the first phase signal along a first path to the desired delay element and a...

20060132207 - Differential clock correction: A method, system, and apparatus are disclosed that correct a differential clock signal. A clock correction circuit may determine a DC correction for a first clock signal of a differential clock signal and a DC correction for a second clock signal of a differential clock signal based upon a DC...

20060132208 - Controllable idle time current mirror circuit for switching regulators, phase-locked loops, and delay-locked loops: The four types of the controllable idle time current mirror circuits are presented with an improvement in productivity, performance, cost, chip area, power consumption, and design time. The controllable idle time current mirror circuits basically include a sensing block, triggering transistors, current mirror, current source, a n-bit control circuit array,...

20060132209 - Cmos master/slave flip-flop with integrated multiplexor: A CML master-slave latch incorporates logic into its master latching circuitry to incorporate a multiplexing function into the flip-flop. The multiplexing logic makes use of the pull-up loads and current source of the master latching circuitry. In this manner the pull-up loads and current source typically required for a stand-alone...

20060132210 - Wide-range programmable delay line: An apparatus comprising an input section, a first delay circuit and a second delay circuit. The input section may be configured to present a first intermediate signal by selecting either (i) an input clock signal or (ii) a feedback of an output signal. The first delay circuit may be configured...

20060132211 - Control adjustable device configurations to induce parameter variations to control parameter skews: A method is used for configuring an electronic device to reduce a skew of a parameter. The method includes a step of incorporating a plurality of controllable built-in parameter variation adjusting circuits for effecting a small step-change in the parameter at different points of the electronic device for reducing said...

20060132212 - Semiconductor circuit, operating method for the same, and delay time control system circuit: A semiconductor circuit allows a timing adjustment after detailed routing without rearrangement and rerouting, an adjustment of delay variance due to process variation, and a delay adjustment even after chip formation using a primitive cell with a built-in means for adjusting delay time. The circuit connected between an input pad...

20060132213 - Clock generator circuit, signal multiplexing circuit, optical transmitter, and clock generation method: For the purpose of achieving multiplexing of data signals for the channels of more than four in number in the generating of a frequency-divided clock signal using toggle flip-flop circuits (TFF), while avoiding any possible phase shift relationship between generated frequency-divided clock signals attributed to the indefinite initial state posing...

20060132214 - Level shifter: A level shifter comprises first/second/third/fourth transistors and an inverter. The first nodes of the first transistor and the third transistor couple to a first voltage. The first node of the second transistor couples to the third node of the first transistor. The second node of the second transistor receives input...

20060132215 - Signal converting circuit: A signal converting circuit includes a voltage level converter circuit, a power circuit, a signal separation circuit, a signal modifying circuit, and a clamping circuit. The power circuit provides voltage to the signal modifying circuit and the voltage level converter circuit. The voltage level converter circuit converts signals from the...

20060132216 - Compensation for detectors: The intercept of a logarithmic amplifier is temperature stabilized by generating a signal having the form H log H where H is a function of temperature such as T/T0. The first H factor is cancelled, thereby generating a correction signal having the form Y log H. The cancellation may be...

20060132217 - Bias generator that automatically adjusts its slew rate: A bias generator that automatically adjusts its slew rate is disclosed to generate an output bias current and adjust the output bias current according to the frequency of a clock signal. The slew rate of the amplifier is thus controlled to save power. It includes: a current mirror for receiving...

20060132218 - Body biasing methods and circuits: In some embodiments, a chip is provided that comprises a group of transistors and a body bias generator. The group of transistors is coupled to the body bias generator. The body bias generator is configured to body bias the transistors at a level based on one or more measured parameters...

20060132219 - Charge pump circuit: In an embodiment, a charge pump circuit comprises a first pump stage, including a first sub-pump coupled to a first pre-charge MOSFET transistor, wherein the first sub-pump is used to pump down a gate of the first pre-charge MOSFET transistor to thereby increase the pre-charge efficiency of the first pre-charge...

20060132220 - Charge pump circuits and methods for the same: A charge pump circuit may include a plurality of charge pump cells. Each charge pump cell may further include an output node for supplying charge, a pumping node for receiving a clock signal and a pumping capacitor, which may be connected between the output node and the pumping node, for...

20060132222 - Method of forming a floating charge pump and structure therefor: In one embodiment, a capacitor of a charge pump circuit is referenced to a high side voltage or top voltage rail....

20060132221 - Very high frequency transponder, in particular a uhf transponder, including a protection against electrostatic discharges: The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfills two functions: its first response signal modulation function and an additional ESD protection function....

20060132224 - Circuit for generating reference current: Disclosed herein is a circuit for generating reference current. The circuit for generating reference current comprises a current providing unit for generate a PTAT current, mirroring the PTAT current to generate an analogous PTAT current and generate an analogous BGR current, a current ratio control unit for generating an analogous...

20060132225 - Standard voltage generation circuit: A standard voltage generation circuit is provided with a function of automatically stopping charging when a standard voltage reaches a stable voltage point by rapidly charging a standard voltage stabilization capacitor during transition from a standby state to a normal operation state. The standard voltage generation circuit is also provided...

20060132223 - Temperature-stable voltage reference circuit: A voltage reference circuit is disclosed. The circuit comprises a PTAT bias generator circuit and a band gap transistor voltage system coupled to the operational amplifier system. The band gap voltage system includes at least one diode-connected CMOS transistor. The advantage of this configuration is that the diode-connected CMOS device...

20060132226 - Switching circuit for producing an adjustable output characteristic: The invention relates to a circuit to generate an output characteristic, having a constant voltage control circuit which receives a voltage supply and generates a constant output voltage; a current reduction section, which receives a control voltage and, depending on this, generates a control current which produces a change in...

20060132227 - Mos type semiconductor integrated circuit device: A plurality of MOS type circuits is provided, and are connected in a multistage manner. A first transistor is inserted between a power source voltage VDD and a power supply node of each of MOS type circuits at an odd numbered stage. A second transistor is inserted between the power...

20060132228 - Multiple circuit blocks with interblock control and power conservation: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a...

20060125528 - Sensor signal detection device: The present invention provides a sensor signal detection device which allows the improvement of reliability. This sensor signal detection device comprises an internal power supply voltage generation circuit, a buffer amplifier for receiving signals from a sensor, a first pull-up element and pull-down element which are connected to an input...

20060125529 - Comparator for input voltages higher than supply voltage: A comparator has first and second current paths, each passing from an input through a transistor, through a current source to ground, the second current path also having a reference voltage drop element coupled in series with the second input. The gates of the transistors are coupled to form a...

20060125530 - Track-and-hold peak detector circuit: A track-and-hold peak detector circuit, which can operate at low input signal frequencies, includes a capacitor to hold a peak voltage of the input signal and logic circuitry that reduces an effect of leakage current into or out of the capacitor, and therefore, provides protection against self-switching of an output...

20060125531 - Track-and-hold peak detector circuit: A track-and-hold peak detector circuit, which can operate at low input signal frequencies, includes a capacitor to hold a peak voltage of the input signal and logic circuitry that reduces an effect of leakage current into or out of the capacitor, and therefore, provides protection against self-switching of an output...

20060125532 - A low voltage differential signal driver with high power supply rejection ration: A LVDS (Low Voltage Differential Signal) driver with a high PSRR (Power Supply Rejection Ration) includes a first current source for providing a working current, a switch unit for receiving the working current and determining the current directions of an output current at first and second signal nodes according to...

20060125533 - Low voltage differential signal driver circuit and method for controlling the same: Provided are a low voltage differential signal driver circuit and a method for controlling the same. The differential signal driver circuit includes: a differential amplification signal generator disposed between a power supply voltage terminal and a ground terminal, and outputting first and second differential amplification signals to first and second...

20060125534 - Zero idle time z-state circuit for phase-locked loops, delay-locked loops, and switching regulators: The four types of the zero idle time Z-state circuits are presented with an improvement in productivity, cost, chip area, power consumption, and design time. The zero idle time Z-state circuits basically include a sensing gate, two stacked PMOS transistors, and a feedback line. The sensing gate senses a voltage...

20060125537 - Phase lock loop device: A phase lock loop device further includes a probability shaping device provided between a phase detection device and charge pump and loop filter (CPLF) device. The probability shaping device operates to reduce the frequency of outputting up-index or down-index; thereby shaping probability distribution to reduce degradation due to mismatching of...

20060125536 - Phase locked loop circuit having deadlock protection circuit and methods of operating same: A phase locked loop (PLL) circuit having a deadlock protection circuit and a deadlock protection method of the PLL circuit are provided. The PLL circuit includes: a phase frequency detector, which receives an input clock signal and a divided clock signal and compares the phase and frequency of the input...

20060125535 - Phase-locked loop circuitry using charge pumps with current mirror circuitry: A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down...

20060125538 - Differential charge pump: A charge pump may incorporate complementary NMOS and PMOS switches to charge and discharge an output capacitor. As a result, the UP and DOWN current paths may be symmetric in that each path incorporates PMOS and NMOS switches (e.g., transistors). The charge pump may incorporate “dummy” current paths for each...

20060125539 - Pulse-width modulation signal generating device and method for generating pulse-width modulation signals: The present invention provides a pulse-width modulation signal generating device and method for the same that can generate multiple pulse-width modulation signals with different overall lengths wherein only a small amount of data is stored in storage means and duty cycles are varied between individual unit pulse signals. Multiple settings...

20060125540 - Mixing prevention circuit for preventing mixing of semiconductor chips and semiconductor chip discrimination method: First, second, and third inverters are connected in series. An output of the third inverter is supplied to the gates of first pMOS and nMOS. An output of the first inverter is supplied to the gate of the second nMOS and the drain of the second nMOS is connected to...

20060125541 - Semiconductor device: Input circuits 10, 11, 12, 13 connected to an external input terminal PAD via resistor elements R1, R2, R3, R4, respectively, are activated in response to the level transition of the clock signals CK10, CK11, CK12, CK13 supplied thereto for accepting input signals. In order to input signals applied to...

20060125542 - Point diffusion signal distribution with minimized power consumption and signal skew: For distributing a signal to loads in an area, the area is divided into a plurality of regions. A respective signal point is disposed in each region for providing the signal to a load in the region. A respective diffusion point is disposed between any two neighboring signal points. The...

20060125543 - Device for dc offset cancellation: A DC offset cancellation device is provided, including a baseband circuit, a common mode feedback (CMFB) circuit, a low-pass filter (LPF), and an amplifier. The CMFB circuit is used to set a specific common mode DC voltage in a differential circuit; thus, the CMFB circuit can be used for detecting...

20060125544 - Integrating capacitance circuitry for an integrating amplifier and related method: An integrating capacitor circuit for an integrating amplifier and related methods are disclosed that allow for efficient detection of currents or charges, particularly those produced by pixel cells in a detector image array. By placing a capacitor-connected field-effect-transistor (FET) in parallel with an integration capacitor and setting its gate voltage...

20060125545 - Analog multiplexing: A multiplexer circuit includes a plurality of switched differential amplifier circuits, one of which can be selected at a time. Each switched differential amplifier includes a pair of differential inputs and a pair of differential outputs, with each pair of differential inputs accepting a corresponding pair of input signals. Each...

20060125546 - Commutatiing phase selector: A phase selector for selecting a differential output is provided. The phase selector can include two matched transistor circuits. A first transistor circuit can receive a first differential input signal whereas a second transistor circuit can receive a second differential input signal. One of the transistor circuits can be used...

20060125547 - Adjustable and programmable temperature coefficient-proportional to absolute temperature (aptc-ptat) circuit: An adjustable PTAT provides a load current comprising at least a first and second current. The load current has a desired temperature coefficient and the PTAT comprises at least two transistor groups. The first transistor group provides the first current having a negative temperature coefficient. Modification to the first transistor...

20060125548 - Semiconductor device employing fuse circuit and method for selecting fuse circuit system: Disclosed are a semiconductor device capable of reducing the number of program fuses used therein, and a fuse circuit selection method. The semiconductor device includes at least one first fuse circuit including: a storage circuit group which stores a desired address based on a cutting pattern of the plural program...

20060125549 - Semiconductor device employing fuse circuit and method for selecting fuse circuit system: Disclosed are a semiconductor device capable of reducing the number of program fuses used therein, and a fuse circuit selection method capable of reducing the number of program fuses. The semiconductor device includes: a fuse circuit (11) and an entire inversion fuse circuit (12), each of which includes plural program...

20060125550 - Semiconductor integrated circuit apparatus: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor...

20060125551 - Semiconductor integrated circuit apparatus: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor...

20060125552 - Voltage-multiplier circuit: The invention provides a voltage-multiplier circuit, and comprises a voltage-pumping block and a functional generator. The voltage-pumping block is composed of a first diode, a second diode, a first couple capacitor, a second couple capacitor to pump an input voltage. The invention can form the multi-level voltage-pumping blocks, and the...

20060114031 - Fractional-integer phase-locked loop system with a fractional-frequency-interval phase frequency detector: A phase-locked loop circuit has a fractional-frequency-interval phase frequency detector, a charge pump, an oscillator, and a divider. The fractional-frequency-interval phase frequency detector has a phase frequency detector unit that is utilized as or comprises a plurality of phase frequency detector units. The divider is responsive to the oscillator and...

20060114032 - Clock frequency detect with programmable jitter tolerance: An apparatus and method is disclosed for programmable determination of frequency, phase, and jitter relationship of a first clock and a second clock in an electronic system. In a first, initialization, mode, a first register and a second register are initialized with a first bit pattern and a second bit...

20060114033 - Sample -hold circuit: A sample-hold circuit, which reduces droop and feed through and is suitable for high-speed operation while maintaining a wider freedom of design parameters, comprising a preamplifier to which an input analog signal is applied, a core section which outputs a voltage corresponding to the variation of an output from the...

20060114034 - Pulse polarity modulation circuit: In order to provide a high-speed-pulse polarity modulation circuit for realizing low power consumption and miniaturization and reducing noise occurring at a middle level which is a baseline for a bipolar pulse, a modulation circuit for converting a unipolar pulse into a bipolar pulse in accordance with a value of...

20060114035 - Start signal outputting circuit: A start signal outputting circuit according to the invention has a differential RF/DC convertor part 100 for converting a high frequency power (RF) into a d.c. potential (DC). The RF/DC convertor part 100 is formed by two transistors QRD,QDD working as a diode, and transistors QR1˜R3,QD1˜D3 and resistances RR1˜R3 for...

20060114036 - Driver circuit with automatic offset compensation of an amplifier and method for offset compensation of an amplifier of a driver circuit: A driver circuit is provided, which in an operating mode drives a component that only supplies output power when a driving input signal exceeds a first threshold value. The driver circuit includes a differential amplifier whose output signal controls the driving input signal, a reference signal generator that supplies a...

20060114037 - System and method for compensating for the effects of process, voltage, and temperature variations in a circuit: A system and method for compensating for process, voltage, and temperature variations in a circuit is provided. A system includes an inverter having an input port, and an output port, and is configured to (i) receive an input signal, (ii) delay the received input signal, and (iii) provide the delayed...

20060114038 - Measuring the 3db frequency bandwidth of a phase-locked loop: The 3 dB frequency bandwidth of a phase-locked loop (PLL) is determined by measuring the frequency of a voltage controlled oscillator (VCO) signal when an up charging current is applied, measuring the frequency of the VCO signal when a down charging current is applied, and then using the two frequency...

20060114040 - Phase synchronization circuit and semiconductor integrated circuit: A phase synchronization circuit comprises: a measurement delay line which includes a plurality of delay elements having different delay times and to which a first clock signal is inputted; a phase comparator line which includes a plurality of phase comparators in accordance with the measurement delay line and to which...

20060114039 - Voltage controlled delay loop and method with injection point control: A voltage controlled delay loop and method are disclosed for clock and data recovery applications. The voltage controlled delay loop generates clock signals having similar frequency and different phases. The voltage controlled delay loop comprises a plurality of delay elements; and an input that selectively injects a reference clock into...

20060114042 - Duty cycle correction circuit: There is provided a compact duty cycle correction circuit including minimal components for generating a signal with a 50% duty cycle. The duty cycle correction circuit includes a storage element and a correction circuit. The storage element generates an output signal in response to a clock signal and a feedback...

20060114041 - Duty cycle corrector of delay locked loop: Provided is a digital duty cycle corrector capable of generating a clock signal with the rate of duty 50:50, by means of three or more duty cycle correction circuits assigning different weight values to first and second clock signals that are different in duty cycle each other in order to...

20060114043 - Memory device having a duty ratio corrector: A memory device having a duty ratio corrector which can reduce power consumption by blocking current paths between output terminals and a ground terminal by applying input signals for turning off switching devices for generating an auxiliary voltage for correcting a duty ratio at an initial stage, and which can...

20060114044 - Differential delay cell having controllable amplitude output: A differential delay cell includes a current source for establishing an operating current and a differentially coupled transistor pair having a common node, two input nodes, and two output nodes. The common node is coupled to the current source, and the two output nodes are coupled to an impedance load....

20060114046 - Differential clock transmission apparatus, differential clock sending apparatus, differential clock receiving apparatus and differential clock transmission method: A differential clock transmission apparatus is adapted to convert an outgoing clock signal into a pair of differential clock signals for transmission and also convert a pair of differential clock signals into a single incoming clock signal and comprises a sending control section 11 that specifies an electric potential correction...

20060114045 - Voltage controlled delay loop with central interpolator: A voltage controlled delay loop and method are disclosed for clock and data recovery applications. The voltage controlled delay loop generates clock signals having similar frequency and different phases. The voltage controlled delay loop comprises at least one delay element to generate at least two phases of a reference clock;...

20060114047 - Semiconductor unit: To improve the ESD protection of a circuit receiving a signal. An inverter circuit INV1 is connected to ground wiring GND1 for supplying power, and is connected to power supply wiring VDD1 via a PMOS transistor MP5. An inverter circuit INV2 is connected to ground wiring GND2 and power supply...

20060114048 - Semiconductor device having plurality of circuits belonging to different voltage domains: A first inverter circuit comprises a first transistor in which one end of a current path is grounded, and a second transistor in which one end of a current path is connected to the other end of the current path of the first transistor. A first signal is supplied to...

20060114049 - Switched capacitor mutual charging system and method: A system and method for mutually charging switched capacitors in a switched capacitor system includes operating first and second sets of output switches during separate phases; operating first and second sets of input switches during separate phases but after the output switches are operated; and connecting the switched capacitors together...

20060114050 - Minimizing i/f noise configuration for zif mixer: A Gilbert cell (Q3-Q8) of a mixer (11) controls a differential output voltage between a pair of output terminals (OUT1, OUT2) of the mixer (11). A polysilicon resistor (R7) of the mixer (11) applies a differential loading to the differential output voltage. A pair of current sources (Q11, Q12) of...

20060114051 - High-frequency switch circuit arrangement: A high-frequency switch circuit arrangement. A plurality of stages (for example, two stages) of capacitative elements connected in series (C11 and C12, C21 and C22) are used in a shunt path of a high-frequency component. If a surge voltage is applied, the voltage that each capacitative element should bear decreases...

20060114052 - Semiconductor integrated circuit: There is here disclosed a semiconductor integrated circuit comprising a laser beam irradiation object having one end portion at which a first potential is applied, a first transistor has a source and a drain wherein one of the source and the drain to which the other end portion of the...

20060114053 - Charge-pump-type power supply circuit: Two charge pump circuits are connected in a cascade manner. Each of the charge pump circuits includes two charging switches and two voltage-boosting switches. A voltage-boosting switch, provided on a side for adding a boosting voltage to a charging voltage in a second-stage charge pump circuit, includes a plurality of...

20060114055 - Cascode current mirror circuit operable at high speed: A current mirror circuit includes a first transistor having a source node connected to a reference potential, a second transistor having a source node coupled to a drain node of the first transistor and a gate node connected to a first predetermined potential, an inverted amplification circuit having a non-inverted...

20060114054 - Voltage reference apparatus, method, and system: A trimmable voltage reference uses a flash cell with a variable threshold voltage and a feedback loop to trim a reference voltage. The threshold voltage of the flash cell can be programmed to affect the reference voltage....