Miscellaneous active electrical nonlinear devices, circuits, and systems inventions 04/06

20060087346 - Phase difference detecting apparatus: There is provided a phase difference detecting apparatus operable to detect the phase difference between a first input signal and a second input signal. The phase detecting apparatus includes: a first divider operable to generate a first divided signal, which is the first input signal divided by two, so that...

20060087347 - Input circuit and semiconductor device: An input circuit according to an embodiment of the present invention includes: a comparator circuit comparing a reference voltage with an input voltage; a resistor element provided between a power supply line supplying a power supply voltage of the comparator circuit and an input line applied with the input voltage;...

20060087349 - Circuit with high power density applicability: A power control circuit is presented. The circuit includes a pair of parallel optocoupler/logic stages and a pair of parallel voltage-to-current driver stages electrically coupled to a halfbridge stage in the order described. An input signal is communicated to the optocoupler/logic stage and processed therein to produce two distinctly separate...

20060087348 - Semiconductor device for driving a load: A semiconductor device for driving a load includes a first semiconductor switching element interposed between a power supply terminal and a load, a second semiconductor switching element interposed between the load and a ground terminal, a high-side driver, a low-side driver, and a voltage regulator. The voltage regulator reduces a...

20060087350 - Frequency divider with variable division rate: A frequency divider is provided that comprises a plurality of chain-connected cells, the output of the last cell of the chain being fed back to the input of the first cell. Each cell has an inverter, the transition of which can be enabled or inhibited by control transistors connected in...

20060087351 - Signal synchronizer system and method: A signal synchronizer according to embodiments herein uses a delay register that receives a feedback signal. The delay register has many delay circuits, each of which are adapted to delay the feedback signal at different time intervals. A storage register made up of many binary storage devices receives a reference...

20060087352 - Frequency lock detector: Provided is a frequency lock detector which includes one counter and a clock number difference detector for detecting a clock number difference while not increasing complexity according to the counting number N to compare the frequencies of two clock signals whose phases are not synchronous to each other and determine...

20060087354 - Circuit having delay locked loop for correcting off chip driver duty distortion: A circuit comprises an off chip driver and a delay locked loop. The delay locked loop is configured to receive a clock signal and provide a first signal for compensating for a rising edge propagation delay through the off chip driver and a second signal for compensating for a falling...

20060087353 - Method and apparatus compensating for frequency drift in a delay locked loop: A delay locked loop (DLL) according to the present invention includes a cycle time detector to determine the quantity of delay elements within a clock cycle and adjust a DLL counter controlling a DLL variable delay line to enable operation or locking in response to DLL overflow and underflow conditions....

20060087355 - Soft-error rate improvement in a latch: In a preferred embodiment, the invention provides a circuit and method for reducing soft error events in latches. The input of a first inverter is connected to the output of a second inverter. The input of a second inverter is connected to the output of the first inverter. When the...

20060087356 - Variable delay line using two blender delays: A variable delay line comprises a first blender delay configured to provide a first signal, a second blender delay configured to provide a second signal complementary to the first signal, and a coarse delay configured to delay the first signal if an even number of coarse delay elements are selected...

20060087357 - Dual-edge shaping latch/synchronizer for re-aligning edges: Integrated circuit and process for aligning a first signal with a second signal. The integrated circuit includes a single latch, a switch control circuit coupled to an input of the single latch to align an edge of the first signal with an edge of the second signal, and a second...

20060087358 - Level shift circuits and related methods: A level shifting circuit functions by taking an input signal, producing a complement of the input signal, applying the input signal and its complement to comparable voltage divider pairs to set up a differential input signal that is applied to a comparator that produces a shifted output signal....

20060087359 - Level shifting circuit: A circuit for level shifting comprises a first and second transistor (A, B), to each of which a signal can be applied, and a third and fourth transistor (C, D). The first and third transistors (C, D) are connected between a fundamental voltage (XUSS) and a supply voltage (XUDD) and...

20060087360 - Semiconductor device: A semiconductor device includes an input terminal, a first aging device whose source is connected to the input terminal to turn on at τ1 and turn off at τ2 (>τ1), a second aging device whose source is connected to the input terminal, whose gate is connected to the drain of...

20060087362 - Analog storage cell with low leakage: An analog storage cell circuit includes a switch that minimizes subthreshold conduction and diode leakage, as well as an accumulation-mode coupling mechanism to minimize overall switch leakage to minimize accumulation-mode leakage. In one embodiment, an analog storage circuit includes a sample and hold circuit including an amplifier having first and...

20060087361 - Methods and apparatus to bias the backgate of a power switch: Methods and apparatus to bias a backgate of a power switch while preventing latchup are disclosed. A disclosed method of biasing a backgate of a power switch comprises: if a voltage of a first power supply rises before a voltage of a second power supply, initially biasing the backgate with...

20060087363 - Apparatus for driving an electromagnetic load: The present invention refers to an apparatus for driving an electromagnetic load. The apparatus comprises a power stage comprising at least one first and one second transistor half-bridge and the electromagnetic load is arranged between the first and the second half-bridge. The apparatus comprises a first and a second device...

20060087364 - Input biasing system for bracketing a floating power supply about an input signal: An input biasing system for accommodating a floating power supply to the range of an input signal includes input terminals for receiving a input signal and a biasing circuit including a first impedance connected between one of the input terminals and a floating power supply and a second impedance connected...

20060087365 - Voltage charge pump and method of operating the same: A voltage pump comprising a charging transistor responsive to a first control signal, the charging transistor operable to connect a node to a first voltage, a pumping capacitor responsive to a second control signal, the pumping capacitor operable to pump additional charge the node, and a pumping transistor responsive to...

20060087366 - Semiconductor integrated circuit which generates different voltages based on an external power supply voltage and a generating method of the different voltages: A semiconductor integrated circuit includes a first voltage generating circuit which generates a boosted voltage based on a first external power supply voltage. The boosted voltage is greater than the first external power supply voltage. The semiconductor integrated circuit further includes a second voltage generating circuit which generates first and...

20060087367 - Current source circuit: According to the present invention, after a bias circuit (20) starts, a startup circuit (10) is isolated from the bias circuit (20) according to a bias voltage generated on an isolating voltage node (V2) from the bias circuit (20) to the startup circuit (10), and steady current consumption can be...

20060087368 - Highly selective filtering device and corresponding filtering method: The invention proposes a filtering device having a frequency response which is symmetrical, using asymmetrical filters coupled by transposition means. The advantageous characteristics of the asymmetrical filters are retained and the faults associated with the asymmetry are eliminated. The asymmetrical filters are, for example, quartz filters. The invention also proposes...

20060082390 - Process for obtaining a thin, insulating, soft magnetic film of high magnetization: A thin soft magnetic film combines a high magnetization with an insulating character. The film is formed by nitriding Fe-rich ferromagnetic nanograins immersed in an amorphous substrate. A selective oxidation of the amorphous substrate is then performed. The result is a thin, insulating, soft magnetic film of high magnetization. Many...

20060082391 - Set-reset (s-r) latch based deglitch circuit: Methods and systems that use a simple hardware circuit and/or digital logic solution to identify and remove both positive and negative glitches from a signal. For this hardware circuit and/or digital logic solution, a glitch is referred to as an unwanted pulse with a width less than a specified duration,...

20060082392 - Comparator with hysteresis and method of comparing using the same: A comparator includes a differential amplifier, and a hysteresis circuit. The differential amplifier amplifies a difference signal corresponding to a difference between input signals. The hysteresis circuit sets up a first transition threshold voltage and a second transition threshold voltage where the second transition threshold is different from the first...

20060082394 - Timer circuit with adaptive reference: A timer circuit includes a current mirror, a capacitor, a first switch, a resistor and a comparator. The current mirror receives a reference current and provides first and second currents with a predefined current ratio. The first switch, controlled by a control signal, allows the capacitor to be charged by...

20060082395 - Voltage detection circuit: A voltage detection circuit, comprises a constant-current circuit, a current mirror circuit operated by the constant-current circuit, at least one diode-connected first transistor disposed between an output of the current mirror circuit and a detected voltage, and an output circuit outputting one logic voltage in response to a turn-on of...

20060082393 - Voltage detection circuit with hysteresis for low power, portable products: A supply voltage level detection circuit makes use of an additional supply already provided for power. A voltage detection circuit defines a first threshold, and a differencing circuit defines a second threshold. The output state of the differencing circuit is saved in a latch. The latch may be cross coupled...

20060082396 - Circuit arrangement: A circuit arrangement (1) has a first circuit block (2) operating at a first supply voltage and a second circuit block (3) operating at a second supply voltage. The first circuit block (2) is coupled to the second circuit block (3) by a voltage level shifting unit (4) in order...

20060082397 - Pwm led regulator with sample and hold: Improved stability in a regulator having a sample-and-hold. Coupling an input voltage to an input node of the sample-and-hold circuit is provided. Activating the sample- and hold circuit in response to the input voltage and sensing an output voltage at an output node coupled to the sample and hold circuit...

20060082398 - Noise reduction in digital systems: A digital system and a method for operating the same. The digital system includes (a) a first logic circuit and a second logic circuit, (b) a first register, (c) a second register, (d) a third register, (e) a clock generator circuit, and (f) a controller circuit. The first logic circuit...

20060082399 - Combined phase comparator and charge pump circuit: A phase comparison of timing signals is made by combinational circuitry which receives the timing signals and a window signal, the window signal identifying edges of the timing signals to be compared. The comparison may result in a charge pumped output which can be fed back to control the phase...

20060082400 - Register circuit, and synchronous integrated circuit that includes a register circuit: A register circuit includes a passage control circuit and a holding circuit. The passage control circuit includes a first transistor having a gate to which a clock signal is input, a second transistor having a gate to which a data signal is input, and a third transistor having a gate...

20060082401 - Measure-controlled delay circuits with reduced phase error: Measure-controlled delay (MCD) circuits are provided for synchronizing an output clock to an input clock. In response to triggering of a measure circuit, sample circuits sample outputs of a measure delay array. Sample reset logic prevents output of the output clock when any of a predetermined one or more of...

20060082402 - Reducing metastable-induced errors from a frequency detector that is used in a phase-locked loop: A technique for reducing the likelihood that a frequency detector will incorrectly assert control over a VCO because of metastable-induced errors involves qualifying frequency detector control signals by requiring multiple consecutive control signals that indicate the frequency detector should assert control over the VCO before the frequency detector is allowed...

20060082403 - Circuit and method for interpolative delay: A circuit and a method for interpolative delay is provided. The circuit includes a delay locked loop with interpolation delay. The delay locked loop includes a differential inverter, an interpolation circuit, and a differential compare circuit. The differential inverter is coupled to receive a differential clock signal and coupled to...

20060082404 - Semiconductor integrated circuit with a logic circuit including a data holding circuit: A semiconductor integrated circuit includes a first data holding section, a first pull-up circuit, a first pull-down circuit, a first feedback circuit, and a second feedback circuit. The first data holding section holds first output data. The first pull-up circuit takes in input data as a pull-up control signal and,...

20060082405 - Pseudo true single phase clock latch: A pseudo true single phase clock latch (pseudo “TSPC” latch) includes additional circuitry coupled to three previously floating nodes that can lose data depending upon the amount of leakage current associated with these nodes. The additional circuitry, including a positive feedback circuit, improves the performance of a true single phase...

20060082406 - Constrained coefficient adaptation for continuous-time equalizers: A low-voltage constrained coefficient adaptation and multiplication is provided. To provide the constrained coefficient adaptation, an adder adds an adaptive differential control voltage to a forcing differential control voltage to provide an effective coefficient. The adder is configured such that the forcing differential control voltage can prevent the adaptive differential...

20060082407 - Inrush current slew control circuit and method: Circuitry and methodology for controlling a FET or another transistor device provided to supply power to a circuit board insertable into a live backplane to provide inrush current slew rate control. The FET control circuit is responsive to an input signal variable in a preset manner to produce a FET...

20060082408 - Semiconductor switching circuit: According to the present invention, there is provided a semiconductor switching circuit having: a common terminal; first, second, and third terminals; first, second, and third ground terminals; first, second, and third control terminals; a first through FET having a source and drain connected in series between the common terminal and...

20060082409 - Step-down voltage output circuit: A step-down voltage output circuit preventing: latch-up phenomenon in a load circuit for a period between a power-supply activation and complete start of a charge pump circuit; and rapid change of a substrate potential when a step-down voltage output is changed from ON to OFF. The step-down voltage output circuit...

20060082410 - Band-gap reference circuit: A band-gap reference circuit for generation of voltages and currents independent of process, voltage, and temperature includes three inversely proportional to absolute temperature (IPTAT) current generators. The IPTAT current generators generate three currents that are added to generate a current independent of the absolute temperature. The generated current is passed...

20060082411 - Voltage regulator for semiconductor memory device: Disclosed is a voltage regulator capable of reducing a set-up time. A driver is connected between a power supply terminal and the output terminal, and supplies a power supply voltage to the output terminal in response to a signal of a control node. A first signal generator provides a first...

20060082412 - Single, multiplexed operational amplifier to improve current matching between channels: A multi-channel current regulator includes two or more channels, each channel acting as a current source or sink for a respective load. Each channel regulates its load current so that the load current is proportional to an input voltage supplied to the channel. Each channel also generates a feedback voltage...

20060076981 - Phase detector with selection of differences between input signals: Known phase detectors have feedbackloops and do not function properly under severe conditions. By providing said phase detectors with difference establishers (1) for establishing differences between input signals and with selectors (2) for selecting one of said differences to be used as an output signal for phase locking purposes, the...

20060076982 - Phase difference detection circuit, phase difference detecting method, optical disk drive, and optical disk drive controlling method: An embodiment of the present invention provides a phase difference detection circuit for detecting a phase difference between input data and an input clock generated based on the input data, including: an input data edge position detecting part detecting an edge position of the input data based on an N-phase...

20060076983 - Method and apparatus for reliable pulse event detection: A circuit for detecting asynchronous events includes a first event detection latch; and a second event detection latch coupled to the first event detection latch, wherein the first event detection latch is ready to detect an event when the second event detection latch is being reset and wherein the second...

20060076984 - Balanced debounce circuit with noise filter for digital system: A circuit and method for debouncing an electrical signal are disclosed. A representative embodiment of the present invention may be set to remove (i.e., filter) noise or glitches in the low and high portions of an input signal, where the width of the noise or glitches while in the high...

20060076985 - Systems and methods for detection of dielectric change in material and structure: Methods and systems are described for efficiently detecting an object. The system includes at least one electrode for measuring a displacement current. The at least one electrode is coupled to a floating ground configuration provided by an op-amp, where the inverting node of the op-amp is coupled to electrode and...

20060076986 - Half-bridge inverter of dual n-mos with a push/pull control chip: A circuit making use of a push/pull-type control chip to drive a half-bridge inverter of dual N-MOS connects a drive circuit to a conventional half-bridge inverter circuit, and has a push/pull-type control chip having two output terminals, a drive circuit having two input terminals and two output terminals, and a...

20060076987 - Multi-threshold cmos system having short-circuit current prevention circuit: Disclosed is a multi-threshold complementary metal-oxide semiconductor (MTCMOS) circuit system. The MTCMOS circuit system includes a single control transistor that it uses to switch a MTCMOS circuit between a sleep mode and an active mode. The MTCMOS circuit also includes a short-circuit current prevention circuit controlled by a MTCMOS control...

20060076988 - Pipeline synchronisation device: Pipeline synchronisation device for transferring data between clocked devices having different clock frequencies. The Pipeline synchronisation device comprises a mousetrap buffer for exchanging data with one of said external devices said mousetrap buffer having a signalling output for coordinating the data exchange with the external device. The pipeline synchronisation device...

20060076989 - Enhanced phase and frequency detector that improves performance in the presence of a failing clock: A system and method of reducing the pulse width differential in a phase frequency detector (PFD) is provided. In a first embodiment, a PFD is construed using a plurality of flip-flops (or clocking devices) and a plurality of logic gates. A first set of flip-flops are adapted to receive a...

20060076990 - Phase locked loop and method for trimming a loop filter: The invention includes a phase locked loop which has a voltage-controlled oscillator, a phase comparator and a charge pump. The charge pump is coupled to a setting input of the voltage-controlled oscillator via a loop filter. A feedback input of the phase comparator is connected to the output of the...

20060076992 - Delay locked loops and methods using ring oscillators: Delay locked loops include a ring oscillator having serially connected inverters and a feedback path around the serially connected converters. The ring oscillator is configured to generate an output clock signal that is a delayed version of an input clock signal, in response to the input clock signal and to...

20060076991 - Low power high frequency phase detector: A phase detector employs a modified logic gate in conjunction with a set/reset latch to make a phase detector that generates control outputs for use in increasing and decreasing the delay in a delay circuit in the path of a feedback clock generated by delaying a reference clock. The delay...

20060076993 - High speed clock and data recovery system: A clock and data recovery system for detecting and resolving meta-stability conditions is provided. The clock and data recovery system includes a phase detector having logic configured to detect a meta-stability condition and to generate an output signal to mitigate the condition. The system can also include a time varying...

20060076994 - Pulse generator: Without shortening clock pulse duration serving as a unit time of a pulse generator, a pulse-width control is possible in which pulse duration varies in increments of a time length shorter than the unit time. A time width Ton_s of a pulse width finely dividing signal Vs from a DSP...

20060076995 - Adjustable switchpoint receiver: A signal detector circuit and digital signal receiver implementing the same. In one embodiment the digital signal receiver includes a switch point detector having a detector output and including a transistor array comprising one or more pull-up branches and one or more pull-down branches. A switch point control circuit is...

20060076996 - Delay circuit with accurate time to frequency conversion: A delay circuit comprises a signal generator and a delay component. The signal generator comprises a terminal for receiving a trigger signal and an output for outputting a signal when receiving a trigger signal with a pre-determined characteristic. The delay mean comprises an input for receiving the signal outputted by...

20060076997 - Spread spectrum clock generating apparatus: Disclosed is a spread spectrum clock generator comprising a phase interpolator, which receives a clock signal from a clock input terminal and a control signal (an up signal and/or down signal), for adjusting the phase of an output clock signal in accordance with said control signal and outputting the resultant...

20060076998 - Muting circuit for audio amplifier: The present invention is to provide a muting circuit design for audio amplifier by duplicating a differential pair in a differential amplifier, and use two sets of MOS transistor switch to control the differential pairs respectively. Both of the two differential pairs are connected with a current mirror circuit. The...

20060076999 - Radiation tolerant solid-state relay: The present invention provides a radiation-tolerant-solid-state-relay without radiation-hardened parts. A p-channel MOSFET provides power-switching functionality. In further detail, the solid-state-relay comprises a bias section, a control section, and a power-switch section. The bias section provides a voltage bias to the control section, the control section provides a control voltage to...

20060077000 - Semiconductor device: A gate discharge resistor part is connected to the gate of an IGBT (Insulated Gate Bipolar Transistor). A timer circuit has its output connected to the input of the gate discharge resistor part and the input of a gate driving circuit. When an ON signal for driving the IGBT into...

20060077001 - Temperature-compensated bias circuit for power amplifier: Provided is a temperature-compensated bias circuit for a power amplifier, in which a first resistor (Rref) connected to a reference voltage is connected to a base terminal of a third transistor (Q3) and an emitter terminal of the third transistor is connected to a first diode (D1). The temperature-compensated bias...

20060077002 - Apparatus and methods for saving power and reducing noise in integrated circuits: The power saving and noise reducing circuit includes a first impedance disposed between a positive voltage supply and a positive voltage terminal of the electronic circuitry, a second impedance disposed between a negative voltage supply and a negative voltage terminal of the electronic circuitry, and a capacitor disposed between the...

20060071692 - System and method for clock detection with glitch rejection: A system and a method are presented for detecting the presence of at least one clock signal of a defined clock frequency applied to at least one input port of an integrated circuit system, wherein the a first number M of clock pulses related to the at least one clock...

20060071693 - Semiconductor integrated circuit having differential amplifier circuit and method of controlling the same: A semiconductor integrated circuit has: a differential amplifier circuit including a first MOS transistor connected between a first node and a common node and a second MOS transistor connected between a second node and the common node; a first current supply circuit configured to supply current to the first node;...

20060071695 - Signal driving circuits including inverters: An input signal driving circuit includes first and second inverters that are connected in parallel between first and second reference voltages. The first and second inverters include first and second input terminals that are electrically connected together to define a common input terminal for the input signal. The first and...

20060071694 - Versatile system for output energy limiting circuitry: The present invention provides a system for limiting energy levels across the output of a driver circuitry segment (100). The system provides an output structure (102) adapted to drive an output load (104). A transconductance component (106) is communicatively coupled to the output structure, and adapted to output a transconductance...

20060071696 - Digital delay-locked loop circuits with hierarchical delay adjustment: Fine tuned signal phase adjustments are provided by multiple cascaded phase mixers. Each phase mixer outputs a signal having a phase between the phases of its two input signals. With each subsequent stage of phase mixers, the signals generated by the phase mixers have a smaller phase difference, thereby providing...

20060071697 - Pwm generator: A PWM generator (100; 200; 300; 400) is described, which does not require a separate saw-tooth generator and a separator for generating a modulated pulsed signal. According to the invention, the input signal (Sin) is supplied to one input terminal (111) of a comparator (110), which receives at its other...

20060071698 - Digital phase shift circuits: Techniques are presented for creating a second clock signal by using a first clock signal. For instance, an output is determined that corresponds to a phase relationship between the first and second clock signals. A value, corresponding to a given one of a plurality of delays, is selected based at...

20060071699 - Flexible blender: A blender circuit configured to receive a first signal having a first signal phase and a second signal having a second signal phase. The first and second signals have a similar frequency and the first and second signal phases are separated by a time delay. The blender circuit includes a...

20060071700 - Semiconductor device with temperature sensor: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor...

20060071701 - Defect tolerant redundancy: Circuits, methods, and apparatus for using redundant circuitry on integrated circuits in order to increase manufacturing yields. One exemplary embodiment of the present invention provides a circuit configuration wherein functional circuit blocks in a group of circuit blocks are selected by multiplexers. Multiplexers at the input and output of the...

20060071702 - Well bias voltage generator: A well bias module outputs a voltage used to bias the wells of transistors or other semiconductor components. The well bias module includes a feedback loop having a voltage generation module and a subthreshold leakage sense module that is operable to model the transistors or other semiconductor components so as...

20060071703 - On-chip voltage regulator: An improved on-chip voltage regulator providing improved reliability by eliminating voltage stresses on critical components, comprising, a reference-signal generating block providing a first-order temperature-compensated voltage-reference signal and a first-order temperature-compensated current-reference signal, an operational-amplifier block providing a regulated voltage, connected to the outputs of said reference signal generating block; a...

20060071704 - Amplifying circuit: The invention provides an amplifying circuit for reducing electric power consumption at a standby mode time. Therefore, in DMOS and NMOS transistors constituting a cascode amplifier, the gate of the DMOS transistor of an initial stage is biased to a grounding voltage through a resistor, and the source of the...

20060071705 - Bandgap reference circuit for ultra-low current applications: A bandgap reference circuit as may be used in ultra-low current applications is provided. An exemplary bandgap circuit can be configured to generate a positive temperature coefficient without the need for a resistor to offset a negative temperature coefficient. In accordance with an exemplary embodiment of the present invention, a...

20060071706 - Device and method for voltage regulator with low standby current: An apparatus and method for providing a reference voltage for regulating voltage levels. The apparatus includes a first voltage generation system configured to receive a first control signal and output a calibration voltage, a voltage adjustment system configured to receive the calibration voltage and a reference voltage and output a...

20060071707 - Analog filter with passive components for discrete time signals: A filter intended to receive a discrete time signal at a sampling dock frequency, comprising a determined number, greater than 2, of filtering units, each filtering unit comprising head capacitors in a number equal to the determined number, assembled in parallel between an input terminal and the terminal of an...