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Micron Technology, Inc. patents

The following is a sampling of recent Micron Technology, Inc. patent applications (USPTO Patent Application #, Patent Title) sorted by month.

August 2012 - Micron Technology, Inc. patents

20120217652 - Semiconductor devices and methods of manufacturing semiconductor devices
20120218008 - Tri-state driver circuits having automatic high-impedance enabling
20120218015 - Duty cycle correction systems and methods
20120218810 - Methods of reading and using memory cells
20120218807 - Resistive memory sensing methods and devices
20120218806 - Memory cells, methods of forming memory cells, and methods of programming memory cells
20120218822 - Content addressable memory
20120218824 - Independent well bias management in a memory device
20120218823 - Voltage generation and adjustment in a memory device
20120218833 - Leakage measurement systems
20120218847 - Techniques for reducing disturbance in a semiconductor memory device
20120220064 - Epitaxial formation support structures and associated methods
20120220098 - Methods of forming dielectric material-containing structures
20120220126 - Selective metal deposition over dielectric layers
20120221916 - Memory array error correction apparatus, systems, and methods
20120211896 - Interconnects for packaged semiconductor devices and methods for manufacturing such devices
20120214306 - Method for obtaining extreme selectivity of metal nitrides and metal oxides
20120214323 - Systems and methods for modular projection
20120215972 - Logical address offset in response to detecting a memory formatting operation
20120205713 - Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor
20120205719 - Double gated 4f2 dram chc cell and methods of fabricating the same
20120205736 - Memory arrays and methods of forming electrical contacts
20120206159 - Interface
20120206500 - Video data dependent adjustment of display drive
20120206964 - Programming rate identification and control in a solid state memory
20120206974 - Sensing for all bit line architecture in a memory device
20120208345 - Method for forming a self-aligned isolation structure utilizing sidewall spacers as an etch mask and remaining as a portion of the isolation structure
20120210025 - Device to device flow control
20120199807 - Semiconductor structure and semiconductor device including a diode structure and methods of forming same
20120199908 - Capacitorless dram on bulk silicon
20120199939 - Localized biasing for silicon on insulator structures
20120199944 - Capacitors including a rutile titanium dioxide material, semiconductor devices incorporating same and related methods
20120199987 - Methods for forming three-dimensional memory devices, and related structures
20120200341 - Locked loops, bias generators, charge pumps and methods for generating control voltages
20120201076 - Spintronic devices with integrated transistors
20120201090 - Power savings mode for memory systems
20120201273 - Dram temperature measurement system
20120202350 - Method for positioning spacers in pitch multiplication
20120202356 - Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures
20120203945 - System and method for initializing a memory system, and memory device and processor-based system using same
20120203952 - Protecting groups of memory cells in a memory device
20120204018 - Intelligent controller system and method for smart card memory modules
20120204192 - Image rescue
20120193703 - Cross-point diode arrays and methods of manufacturing cross-point diode arrays
20120193777 - Integrated circuit fabrication
20120194103 - Solid state lighting devices with reduced dimensions and methods of manufacturing
20120194160 - Voltage generators having reduced or eliminated cross current
20120195126 - Cell operation monitoring
20120195149 - Circuits and methods for providing refresh addresses and alternate refresh addresses to be refreshed
20120198201 - Memory module with configurable input/output ports
20120198205 - Transactional memory

July 2012 - Micron Technology, Inc. patents

20120187335 - Wet etchants including at least one etch blocker
20120187533 - Capacitors and methods of forming capacitors
20120187567 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
20120188829 - Circuits, devices, systems, and methods of operation for capturing data signals
20120188828 - Data capture system and method, and memory controllers and devices
20120191924 - Preparation of memory device for access using memory access type indicator signal
20120191923 - Outputting a particular data quantization from memory
20120191975 - Critical security parameter generation and exchange system and method for smart-card memory modules
20120180716 - Methods for epitaxial silicon growth
20120181596 - Strings of memory cells having string select gates, memory devices incorporating such strings, and methods of accessing and forming the same
20120181605 - Methods of providing electrical isolation and semiconductor structures including same
20120181662 - Lanthanide dielectric with controlled interfaces
20120182059 - Seamless coarse and fine delay structure for high performance dll
20120182787 - Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a plurality of memory cells in a cross-point memory array
20120182799 - Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
20120182797 - Sense operation in a memory device
20120182805 - Strings of memory cells having string select gates, memory devices incorporating such strings, and methods of accessing and forming the same
20120182810 - Methods, devices, and systems for adjusting sensing voltages in devices
20120182817 - Redundant memory array for replacing memory sections of main memory
20120182820 - Local power domains for memory sections of an array of memory
20120184106 - Method and algorithm for random half pitched interconnect layout with constant spacing
20120184781 - Methods of forming a tellurium alkoxide and methods of forming a mixed halide-alkoxide of tellurium
20120185738 - Determining location of error detection data
20120185754 - Flash memory architecture with separate storage of overhead and user data
20120174943 - Megasonic cleaning with controlled boundary layer thickness and associated systems and methods
20120175341 - Methods for forming conductive elements and vias on substrates
20120175748 - Semiconductor structures including dual fins and methods of fabrication
20120176152 - Circuitry and method minimizing output switching noise through split-level signaling and bus division enabled by a third power supply
20120176192 - Self-identifying stacked die semiconductor components
20120176837 - Memory cell sensing using negative voltage
20120176845 - Techniques for controlling a direct injection semiconductor memory device
20120176847 - Methods and apparatus for voltage sensing and reporting
20120177891 - Methods of forming a patterned, silicon-enriched developable antireflective material and semiconductor device structures including the same
20120178026 - Imaging devices, methods of forming same, and methods of forming semiconductor device structures
20120178209 - Methods of forming metal-containing structures, and methods of forming germanium-containing structures
20120178221 - Methods of forming memory arrays
20120178257 - Solutions for cleaning semiconductor structures and related methods
20120179434 - Recursive summation algorithms useful for statistical signal analysis of transmission of signals in a computer system
20120179853 - Memory address translation
20120179854 - Systems, methods, and devices for configuring a device
20120168708 - Memory device constructions, memory cell forming methods, and semiconductor construction forming methods
20120168705 - Bipolar switching memory cell with built-in on state rectifying current-voltage characteristics
20120168898 - Methods of forming single crystal silicon structures and semiconductor device structures including single crystal silicon structures
20120168903 - Semiconductor constructions containing tubular capacitor storage nodes, and retaining structures along portions of the tubular capacitor storage nodes
20120169381 - Output slew rate control
20120169388 - Method and apparatus for reducing oscillation in synchronous circuits
20120170372 - Memory device biasing method and apparatus
20120171389 - Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces
20120171812 - Methods of forming germanium-antimony-tellurium materials and methods of forming a semiconductor device structure including the same
20120173808 - Memory, computing system and method for checkpointing
20120173835 - Selective register reset
20120174188 - Removable devices

June 2012 - Micron Technology, Inc. patents

20120161151 - Solid state lighting devices and associated methods of manufacturing
20120161161 - Array assemblies with high voltage solid state lighting dies
20120161223 - Discrete trap non-volatile multi-functional memory device
20120164804 - Methods of forming reverse mode non-volatile memory cell structures
20120166720 - Processors for programming multilevel-cell nand memory devices
20120166759 - Robust index storage for non-volatile memory
20120153304 - Solid state lighting devices with accessible electrodes and methods of manufacturing
20120153468 - Elimination of rdl using tape base flip chip on flex for die stacking
20120154919 - Apparatuses and devices for absorbing electromagnetic radiation, and methods of forming the apparatuses and devices
20120155142 - Phase interpolators and push-pull buffers
20120155201 - System and method for hidden refresh rate modification
20120156871 - Methods for forming conductive vias in semiconductor device components
20120159277 - Methods for segmented programming and memory devices
20120146049 - Jfet devices with increased barrier height and methods of making the same
20120146132 - Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
20120146239 - Packaged microelectronic devices recessed in support member cavities, and associated methods
20120146695 - Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuit
20120146702 - Phase mixer with adjustable load-to-drive ratio
20120146718 - High performance input receiver circuit for reduced-swing inputs
20120147672 - Fractional bits in memory cells
20120147677 - Biasing system and method
20120147681 - Methods, devices, and systems relating to a memory cell having a floating body
20120149146 - Confined resistance variable memory cell structures and methods
20120151129 - Boot block features in synchronous serial interface nand
20120138850 - Etchant gas
20120139039 - Semiconductor device comprising a transistor gate having multiple vertically oriented sidewalls
20120140421 - Assemblies including heat sink elements and methods of assembling
20120140555 - Multilevel phase change memory operation
20120140569 - Memory cell operation
20120140567 - Nand step up voltage switching method
20120140580 - Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
20120141943 - Methods of forming patterns
20120142152 - Methods of forming memory cells
20120144101 - Programming memory cells with additional data for increased threshold voltage resolution
20120144152 - Transaction log recovery
20120144155 - System of rotating data in a plurality of processing elements
20120144263 - Methods of data handling
20120144269 - Error detection for multi-bit memory
20120144276 - Memory system and method using a memory device die stacked with a logic die using data encoding, and system using the memory system

May 2012 - Micron Technology, Inc. patents

20120132979 - Memory devices and methods of forming memory devices
20120133017 - Semiconductor structures including polymer material permeated with metal oxide
20120134202 - Verify or read pulse for phase change memory and switch
20120134216 - Integrated circuit having memory array including ecc and column redundancy, and method of operating same
20120135560 - Methods of packaging imager devices and optics modules, and resulting assemblies
20120135567 - Methods and apparatuses for transferring heat from stacked microfeature devices
20120135569 - Stacked microelectronic dies and methods for stacking microelectronic dies
20120135581 - Memory devices and methods of forming the same
20120137056 - Methods and apparatus reading erase block management data
20120137049 - Code patching for non-volatile memory
20120137093 - Reliable write for non-volatile memory
20120126338 - Cross-hair cell devices and methods for manufacturing the same
20120126386 - Electronic devices
20120126885 - Double gated 4f2 dram chc cell and methods of fabricating the same
20120126884 - Double gated fin transistors and methods of fabricating and operating the same
20120127674 - Semiconductor device assemblies including elongated fasteners
20120127685 - Stacked packaged integrated circuit devices, and methods of making same
20120127793 - Memory arrays
20120127794 - Program verify operation in a memory device
20120127807 - Memory instruction including parameter to affect operating condition of memory
20120131267 - Memory device distributed controller system
20120131261 - Sub-block accessible nonvolatile memory cache
20120131419 - Memory apparatus and method using erasure error correction to reduce power consumption
20120119321 - Topography based patterning
20120119344 - Microelectronic devices and methods for manufacturing microelectronic devices
20120119804 - Multi-phase duty-cycle corrected clock signal generator and memory having same
20120119929 - Integrators for delta-sigma modulators
20120120721 - Unidirectional spin torque transfer magnetic memory cell structure
20120120749 - Jtag controlled self-repair after packaging
20120124279 - System and method for setting access and modification for synchronous serial interface nand
20120124304 - Memory block management
20120124313 - Multi-channel memory with embedded channel selection
20120124317 - Concurrent read and write memory operations in a serial interface memory
20120124446 - System and method for data read of a synchronous serial interface nand
20120124449 - Method and apparatus to perform concurrent read and write memory operations
20120112151 - Methods of forming a crystalline pr1-xcaxmno3 (pcmo) material and methods of forming semiconductor device structures comprising crystalline pcmo
20120112185 - High-performance diode device structure and materials used for the same
20120112272 - Semiconductor device comprising transistor structures and methods for forming same
20120113722 - Selecting programming voltages in response to at least a data latch in communication with a sense amplifier
20120113723 - Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device
20120113727 - Configuration finalization on first valid nand command
20120113739 - Memory devices having redundant arrays for repair
20120114087 - Explicit skew interface for reducing crosstalk and simultaneous switching noise
20120117314 - Memory devices operated within a communication protocol standard timeout requirement
20120117313 - Memory device program window adjustment
20120117306 - Sense operation flags in a memory device
20120117319 - Low power, hash-content addressable memory architecture
20120117336 - Circuits and methods for providing data to and from arrays of memory cells
20120104347 - Method of forming a chalcogenide material, methods of forming a resistive random access memory device including a chalcogenide material, and random access memory devices including a chalcogenide material
20120104488 - Data cells and connections to data cells
20120104550 - High aspect ratio contacts
20120106248 - Non-volatile multilevel memory cells
20120106249 - Programming error correction code into a solid state memory device with varying bits per cell
20120106261 - Systems and methods for erasing a memory
20120108010 - Stacked microelectronic devices and methods for manufacturing stacked microelectronic devices
20120108033 - Method of manufacturing devices having vertical junction edge
20120108037 - Methods of forming a phase change material
20120108042 - Methods of forming doped regions in semiconductor substrates
20120108069 - Methods of forming an integrated circuit with self-aligned trench formation
20120109896 - Data signal mirroring
20120110246 - Execute-in-place mode configuration for serial non-volatile memory
20120110244 - Copyback operations
20120110368 - Data paths using a first signal to capture data and a second signal to output data and methods for providing data
20120110375 - Macro and command execution from memory array

April 2012 - Micron Technology, Inc. patents

20120097911 - Phase change memory cell structures and methods
20120098047 - Gettering agents in memory charge storage structures
20120098691 - Quantizing circuits with variable parameters
20120100283 - Methods of forming capacitors
20120100672 - Methods and apparatus for a stacked-die interposer
20120102275 - Memories and methods for performing atomic memory operations in accordance with configuration information
20120091521 - Memory arrays where a distance between adjacent memory cells at one end of a substantially vertical portion is greater than a distance between adjacent memory cells at an opposing end of the substantially vertical portion and formation thereof
20120092932 - Programming methods and memories
20120092933 - Memory erase methods and devices
20120092941 - Memory cell
20120092942 - Techniques for reading a memory cell with electrically floating body transistor
20120092945 - Command latency systems and methods
20120094443 - Pass-through 3d interconnect for microelectronic dies and associated systems and methods
20120094449 - Vertical transistors
20120094482 - Microelectronic devices and methods for filing vias in microelectronic devices
20120086104 - Atomic layer deposition of crystalline prcamno (pcmo) and related structures and methods
20120086488 - Differential amplifiers, clock generator circuits, delay lines and methods
20120088349 - Methods of fabricating fin structures
20120089826 - Methods of operating memory devices and electronic systems having memory devices
20120081968 - N well implants to separate blocks in a flash memory device
20120081967 - Method and system for programming non-volatile memory cells based on programming of proximate memory cells
20120081972 - Memory arrays and methods of operating memory
20120081974 - Input-output line sense amplifier having adjustable output drive capability
20120084493 - Non-volatile memory device having assignable network identification
20120084494 - Memory for accessing multiple sectors of information substantially concurrently
20120084612 - Method of controlling a test mode of a circuit

March 2012 - Micron Technology, Inc. patents

20120074370 - Phase change memory structures and methods
20120074500 - Method for forming transistor with high breakdown voltage
20120075320 - Defect mapping for a digital display
20120075932 - Charge loss compensation during programming of a memory device
20120075929 - Sensing of memory cells in nand flash
20120075933 - Programming a memory device to increase data reliability
20120075934 - Access line management in a memory device
20120075935 - Voltage discharge circuits and methods
20120077127 - Methods of forming patterns
20120079219 - Methods, systems, and devices for management of a memory system
20120079358 - Method and apparatus for detecting communication errors on a bus
20120079455 - Direct secondary device interface by a host
20120067283 - Systems and methods for forming metal oxide layers
20120068187 - Solid state lighting devices with improved color uniformity and methods of manufacturing
20120068366 - Selective etch chemistries for forming high aspect ratio features and associated structures
20120068750 - Switching circuits, latches and methods
20120068753 - Analog delay lines and adaptive biasing
20120068758 - Reference current sources
20120068872 - Methods of quantizing signals using variable reference signals
20120069060 - Nor-based grayscale for a digital display
20120069624 - Reactive metal implated oxide based memory
20120069648 - Spin torque transfer memory cell structures and methods
20120069647 - Spin torque transfer memory cell structures and methods
20120069646 - Spin torque transfer memory cell structures and methods
20120069659 - Memory with interleaved read and redundant columns
20120069658 - Methods, devices, and systems for dealing with threshold voltage change in memory devices
20120069675 - Reducing noise in semiconductor devices
20120069680 - Nand with back biased operation
20120069691 - Block repair scheme
20120070768 - Reticles with subdivided blocking regions and methods of fabrication
20120070955 - Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
20120070959 - Microelectronic device wafers and methods of manufacturing
20120070973 - Methods of forming diodes
20120070988 - Methods and apparatuses facilitating fluid flow into via holes, vents, and other openings communicating with surfaces of substrates of semiconductor device components
20120072653 - Memory device with user configurable density/performance
20120072682 - Detection circuit for mixed asynchronous and synchronous memory operation
20120061477 - Systems and methods to selectively connect antennas to receive and backscatter radio frequency signals
20120061685 - Memory devices and memory cells
20120061740 - Subresolution silicon features and methods for forming the same
20120061751 - Recessed memory cell access devices and gate electrodes
20120061807 - Pitch multiplied mask patterns for isolated features
20120062295 - Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay
20120063226 - Small unit internal verify read in a memory device
20120063225 - Reading data from memory cells including storing charges to analog storage devices
20120063256 - Memory device word line drivers and methods
20120064674 - Methods of forming semiconductor structures including a movable switching element
20120064685 - Methods of making random access memory devices, transistors, and memory cells
20120066461 - Memory arbitration system and method having an arbitration packet protocol
20120066570 - Apparatus and methods having majority bit detection
20120056146 - Resistive memory architectures with multiple memory cells per access device
20120056206 - Solid state lighting dies with quantum emitters and associated methods of manufacturing
20120056219 - Back-to-back solid state lighting devices and associated methods
20120056762 - Data bus inversion apparatus, systems, and methods
20120057404 - Memory device and method having charge level assignments selected to minimize signal coupling
20120057408 - Analog read and write paths in a solid state memory device
20120057418 - Memories and methods for sharing a signal node for the receipt and provision of non-data signals
20120057421 - Devices and system providing reduced quantity of interconnections
20120059980 - Solid state storage device controller with expansion mode
20120059992 - Hybrid memory management
20120048085 - Methods and systems for imaging and cutting semiconductor wafers and other semiconductor workpieces
20120048831 - Methods and apparatuses for energetic neutral flux generation for processing a substrate
20120049154 - Solid state lighting devices with point contacts and associated methods of manufacturing
20120049153 - Solid state lighting devices with current routing and associated methods of manufacturing
20120049152 - Solid state lighting devices with low contact resistance and methods of manufacturing
20120049203 - Multi-dimensional solid state lighting device array system and associated methods and structures
20120049245 - Memory array with an air gap between memory cells and the formation thereof
20120049246 - Vertical gated access transistor
20120049248 - Transistors having a control gate and one or more conductive structures
20120049272 - Vertically-oriented semiconductor selection device for cross-point array memory
20120049715 - Solid state lights with thermosiphon liquid cooling structures and methods
20120049756 - Solid state lighting devices with improved contacts and associated methods of manufacturing
20120049817 - Current generator circuit
20120051123 - Phase change memory structures and methods
20120051124 - Phase change memory structures and methods
20120051132 - Memory cell structures and methods
20120051139 - Reducing read failure in a memory device
20120051161 - Memory devices and methods of operating memory
20120051171 - Channel skewing
20120052650 - Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative to conductive material
20120052678 - Methods of removing a metal nitride material
20120052681 - Methods of selectively forming a material
20120054413 - Stripe-based non-volatile multilevel memory operation

February 2012 - Micron Technology, Inc. patents

20120043596 - Semiconductor devices and structures including at least partially formed container capacitors
20120043611 - Methods of forming memory cells, memory cells, and semiconductor devices
20120043661 - Integrated circuits and methods of forming conductive lines and conductive pads therefor
20120044688 - Array solid state lighting device package
20120044742 - Variable resistance memory array architecture
20120044765 - Word line activation in memory devices
20120044768 - Programming to mitigate memory cell performance differences
20120044769 - Multi-pass programming in a memory device
20120045891 - Methods of forming patterns, and methods of forming integrated circuits
20120046415 - Methods of forming block copolymers, methods of forming a self-assembled block copolymer structure and related compositions
20120047388 - Adjustable byte lane offset for memory module to reduce skew
20120037878 - Encapsulated phase change cell structures and methods
20120037926 - Solid state lights with cooling structures
20120038005 - Disposable pillars for contact formation
20120038404 - Duty cycle based phase interpolators and methods for use
20120038405 - Delay lines, amplifier systems, transconductance compensating systems and methods of compensating
20120038422 - Symmetrically operating single-ended input buffer devices and methods
20120039790 - Nanotube separation methods
20120040162 - High-k dielectric material and methods of forming the high-k dielectric material
20120040534 - Gap processing
20120042148 - Line termination methods and apparatus
20120042225 - Data storage with an outer block code and a stream-based inner code
20120032137 - Solid state lighting devices with dielectric insulation and methods of manufacturing
20120032182 - Solid state lights with thermal control elements
20120032252 - Thickened sidewall dielectric for memory cell
20120032257 - Dual work function recessed access device and methods of forming
20120033477 - Memory modules having daisy chain wiring configurations and filters
20120033493 - Erase completion recognition
20120033504 - Erase voltage reduction in a non-volatile memory device
20120034740 - Pre-encapsulated cavity interposer
20120034753 - Methods of forming a plurality of capacitors
20120036411 - Method, system, and apparatus for distributed decoding during prolonged refresh
20120025402 - Methods of forming semiconductor device structures and semiconductor device structures including a uniform pattern of conductive lines
20120026792 - Erase cycle counter usage in a memory device
20120026816 - Defective memory block identification in a memory device
20120028410 - Methods of forming germanium-antimony-tellurium materials and a method of forming a semiconductor device structure including the same
20120030452 - Modifying commands
20120030529 - Refresh of non-volatile memory cells based on fatigue conditions
20120030545 - Error recovery storage along a nand-flash string
20120030638 - Methods for defining evaluation points for optical proximity correction and optical proximity correction methods including same

January 2012 - Micron Technology, Inc. patents

20120018693 - Confined resistance variable memory cell structures and methods
20120018789 - Systems and devices including multi-gate transistors and methods of using, making, and operating the same
20120018887 - Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices
20120019293 - Delay lock loop phase glitch error filter
20120019349 - Confined resistance variable memory cells and methods
20120021573 - Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
20120021587 - Systems and methods for forming metal oxide layers
20120021594 - Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates having at least two different work functions
20120021601 - Methods of forming through substrate interconnects
20120021610 - Methods of forming material on a substrate, and a method of forming a field effect transistor gate oxide on a substrate
20120023294 - Memory device and method having on-board processing logic for facilitating interface with multiple processors, and computer system using same
20120012812 - Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing
20120012855 - Solid-state light emitters having substrates with thermal and electrical conductivity enhancements and method of manufacture
20120012921 - Memory arrays having substantially vertical, adjacent semiconductor structures and the formation thereof
20120013273 - Solid state lighting devices without converter materials and associated methods of manufacturing
20120013314 - Voltage regulator system
20120013368 - Method and system for electrically coupling a chip to chip package
20120014166 - Resistive memory
20120014185 - Circuits, systems and methods for driving high and low voltages on bit lines in non-volatile memory
20120015524 - Process for enhancing solubility and reaction rates in supercritical fluids
20120015526 - Silicon dioxide deposition methods using at least ozone and teos as deposition precursors
20120016651 - Simulating the transmission of asymmetric signals in a computer system
20120016650 - Simulating the transmission and simultaneous switching output noise of signals in a computer system
20120007037 - Cross-point memory utilizing ru/si diode
20120007209 - Semiconductor device structures including damascene trenches with conductive structures and related method
20120007256 - Redistribution layers for microfeature workpieces, and associated systems and methods
20120008399 - Methods of operating memories including characterizing memory cell signal lines
20120008404 - System and method for reducing pin-count of memory devices, and memory device testers for same
20120008409 - Reduction of quick charge loss effect in a memory device
20120008440 - Data retention kill function
20120009776 - Semiconductor substrates with unitary vias and via terminals, and associated systems and methods
20120009779 - Contact formation
20120009793 - Method for selectively modifying spacing between pitch multiplied structures
20120011335 - Memory controllers, memory systems, solid state drives and methods for processing a number of commands
20120011409 - Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory
20120001147 - Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
20120001144 - Resistive ram devices and methods
20120001245 - Recessed access device for a memory
20120001248 - Methods of forming nanoscale floating gate
20120001253 - Flatband voltage adjustment in a semiconductor device
20120001299 - Semiconductor constructions
20120001539 - Plasma-generating structures, display devices, and methods of forming plasma-generating structures
20120001680 - Isolation circuit
20120001682 - Apparatuses and methods to reduce power consumption in digital circuits
20120002465 - Methods, structures, and devices for reducing operational energy in phase change memory
20120002467 - Single transistor memory cell
20120002477 - Memories and their formation
20120002468 - Cell deterioration warning apparatus and method
20120002489 - Signal driver circuit having adjustable output voltage for a high logic level output signal
20120003573 - Photomasks
20120003810 - Semiconductor device having reduced sub-threshold leakage
20120005411 - Non-volatile configuration for serial non-volatile memory

August 2011 - Micron Technology, Inc. patents

20110199405 - Digital gray scale methods and devices
20110199826 - Charge loss compensation methods and apparatus
20110199824 - Storing operational information in an array of memory cells
20110199827 - Memory array having memory cells coupled between a programmable drain select gate and a non-programmable source select gate
20110199831 - Coarse and fine programming in a solid state memory
20110201200 - Diodes, and methods of forming diodes
20110193044 - Resistive memory and methods of processing resistive memory
20110193115 - Light emitting diodes and associated methods of manufacturing
20110193157 - Cross-hair cell based floating body device
20110193165 - Floating body field-effect transistors, and methods of forming floating body field-effect transistors
20110193172 - Cross-hair cell wordline formation
20110193226 - Microelectronic devices with through-substrate interconnects and associated methods of manufacturing
20110193603 - Fast measurement initialization for memory
20110193620 - Reference voltage generator for single-ended communication systems
20110194112 - Semiconductor wafer alignment markers, and associated systems and methods
20110194350 - Compensation of back pattern effect in a memory device
20110194352 - Programming methods and memories
20110194363 - Semiconductor memory cell and array using punch-through to program and read same
20110194367 - Systems, memories, and methods for refreshing memory arrays
20110195547 - Methods for forming interconnect structures for integration of multi layered integrated circuit devices
20110185970 - Semiconductor processing
20110188312 - Method for memory cell erasure with a programming monitor of reference cells
20110188320 - Memory devices and methods of their operation including selective compaction verify operations
20110191655 - Memory array error correction apparatus, systems, and methods

July 2011 - Micron Technology, Inc. patents

20110180828 - Solid state lighting devices and associated methods of manufacturing
20110180863 - Dram unit cells, capacitors, methods of forming dram unit cells, and methods of forming capacitors
20110180865 - Charge storage nodes with conductive nanodots
20110180936 - Semiconductor device structures and electronic devices including same hybrid conductive vias
20110182103 - Gcib-treated resistive device
20110182122 - Dynamic soft program trims
20110182128 - Asynchronous/synchronous interface
20110182129 - Sense amplifier having loop gain control
20110185254 - Error detection and correction scheme for a memory device
20110175206 - Semiconductor assemblies and methods of manufacturing such assemblies
20110175655 - Digital locked loops and methods with configurable operating parameters
20110175675 - Band-gap reference voltage detection circuit
20110179218 - Method for reading a multilevel cell in a non-volatile memory device
20110179296 - Systems, methods and devices for limiting current consumption upon power-up
20110169063 - Integrated circuits and transistor design therefor
20110169086 - Methods of forming field effect transistors, pluralities of field effect transistors, and dram circuitry comprising a plurality of individual memory cells
20110169122 - Semiconductor device having backside redistribution layers and method for fabricating the same
20110169154 - Microelectronic devices and methods for manufacturing microelectronic devices
20110169529 - Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals
20110169534 - Memory bank signal coupling buffer and method
20110169537 - Multi-phase signal generator and method
20110169882 - Adjustment of display illumination timing
20110170345 - Methods, devices, and systems relating to memory cells having a floating body
20110170353 - Access line dependent biasing schemes
20110170359 - Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same
20110170364 - Capacitor-less memory cell, device, system and method of making same
20110170365 - Row addressing
20110171802 - Methods of making a semiconductor memory device
20110171825 - Method of fabricating integrated circuitry
20110173368 - Bus translator
20110173382 - Nand interface
20110173459 - Bios lock encode/decode driver
20110163321 - Nrom flash memory devices on ultrathin silicon
20110163354 - Epitaxial silicon growth
20110163416 - Methods for forming small-scale capacitor structures
20110163427 - Method and apparatus for directing molding compound flow and resulting semiconductor device packages
20110163786 - Multi-phase signal generator and method
20110164446 - Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
20110164449 - Programming based on controller performance requirements
20110164456 - Methods for programming a memory device and memory devices using inhibit voltages that are less than a supply voltage
20110164455 - Memory cell operation
20110165506 - Photomasks and methods of forming photomasks
20110165505 - Photomasks, methods of forming photomasks, and methods of photolithographically-patterning substrates
20110167193 - Sharing physical memory locations in memory devices
20110167206 - Configuration of a multilevel flash memory device
20110167207 - Memory system and method having volatile and non-volatile memory devices at same hierarchical level
20110167240 - Method of rotating data in a plurality of processing elements
20110167318 - Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code

June 2011 - Micron Technology, Inc. patents

20110155994 - Structures for resistance random access memory and methods of forming the same
20110156116 - Relaxed-pitch method of aligning active area to digit line
20110156792 - System and method for initializing a memory system, and memory device and processor-based system using same
20110157953 - Memory device having data paths
20110157962 - Bias sensing in dram sense amplifiers through voltage-coupling/decoupling device
20110158003 - Method of erasing memory cell
20110159645 - Methods of forming a memory array with a pair of memory-cell strings to a single conductive pillar
20110159685 - Methods of forming electrically insulative materials, methods of forming low k dielectric regions, and methods of forming semiconductor constructions
20110159688 - Selective metal deposition over dielectric layers
20110159698 - Photoresist processing methods
20110161577 - Data storage system, electronic system, and telecommunications system
20110161613 - Memory device, electronic system, and methods associated with modifying data and a file of a memory device
20110147772 - Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods
20110147826 - Methods of forming memory cells
20110147910 - Method for stacking die in thin, small-outline package
20110147935 - Method and system for binding halide-based contaminants
20110148474 - Circuitry and methods for improving differential signals that cross power domains
20110148493 - Output slew rate control
20110149637 - Method and apparatus providing high density chalcogenide-based data storage
20110149646 - Transient heat assisted sttram cell for lower programming current
20110149660 - Sensing for memory read and program verify operations in a non-volatile memory device
20110149659 - Erase operations and apparatus for a memory device
20110151621 - Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
20110151629 - Recessed channel negative differential resistance-based memory cell
20110153922 - Non-volatile memory device having assignable network identification
20110140187 - Methods of forming vertical field effect transistors, vertical field effect transistors, and dram cells
20110140195 - Cross-point diode arrays and methods of manufacturing cross-point diode arrays
20110140204 - Transistors with an extension region having strips of differing conductivity type and methods of forming the same
20110140218 - Memory constructions comprising magnetic materials
20110140759 - Phase mixer with adjustable load-to-drive ratio
20110143528 - Devices with cavity-defined gates and methods of making the same
20110143538 - Semiconductor processing methods
20110144275 - Zwitterionic block copolymers and methods
20110145182 - Adaptive content inspection
20110145271 - Methods and apparatuses for reducing power consumption in a pattern recognition processor
20110145544 - Multi-level hierarchical routing matrices for pattern-recognition processors
20110133263 - Semiconductor device having reduced sub-threshold leakage
20110133265 - Memory cell
20110133268 - Memory cells
20110133270 - Memory device with recessed construction between memory constructions
20110133302 - Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
20110133774 - Method and apparatus for high resolution zq calibration
20110134691 - Scalable multi-function and multi-level nano-crystal non-volatile memory device
20110134697 - Dynamic pass voltage for sense operation in a memory device
20110134701 - Memory kink compensation
20110134702 - Programming methods and memories
20110134708 - Method and system for controlling refresh to avoid memory cell data losses
20110136281 - Epitaxial formation support structures and associated methods
20110136336 - Methods of forming conductive vias
20110127596 - Memory structure having volatile and non-volatile memory portions
20110127598 - Flash memory device having a graded composition, high dielectric constant gate insulator
20110128782 - Reducing effects of erase disturb in a memory device
20110128790 - Analog sensing of memory cells in a solid-state memory device
20110129985 - Methods for forming isolation structures for semiconductor devices
20110130006 - Mask material conversion

May 2011 - Micron Technology, Inc. patents

20110121310 - Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods
20110121376 - Dielectric layers and memory cells including metal-doped alumina
20110121383 - Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
20110122689 - Reducing effects of program disturb in a memory device
20110122699 - Controlling a memory device responsive to degradation
20110122713 - Read strobe feedback in a memory system
20110122717 - Replacing defective columns of memory cells in response to external addresses
20110122720 - Circuits, systems, and methods for reducing simultaneous switching output noise, power noise, or combinations thereof
20110124168 - Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuit
20110124201 - Chemical vaporizer for material deposition systems and associated methods
20110116301 - State machine sensing of memory cells
20110116304 - Spin current generator for stt-mram or other spintronics applications
20110116311 - Reduction of punch-through disturb during programming of a memory device
20110116313 - Read method for mlc
20110117716 - Programmable capacitor associated with an input/output pad
20110117725 - Methods of forming recessed access devices associated with semiconductor constructions
20110117739 - Methods for forming semiconductor device structures
20110119759 - System and method for controlling user access to an electronic device
20110108791 - Phase change material, a phase change random access memory device including the phase change material, and a semiconductor structure including the phase change material
20110109358 - Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay
20110109367 - Multi-phase duty-cycle corrected clock signal generator and memory having same
20110110148 - Memory arrays and associated methods of manufacturing
20110110152 - Non-volatile multilevel memory cells with data read of reference cells
20110110163 - Word line drivers in non-volatile memory device and method having a shared power bank and processor-based systems using same
20110111561 - Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods
20110111597 - Methods of utilizing silicon dioxide-containing masking structures
20110113163 - Bus width negotiation
20110101298 - Methods, structures and devices for increasing memory density
20110101429 - Semiconductor device structures with dual fin structures and electronic device
20110101441 - Select gates for memory
20110102029 - Delay lines, methods for delaying a signal, and delay lock loops
20110103125 - Memory cells having a folded digit line architecture
20110103145 - M+n bit programming and m+l bit read for m bit memory cells
20110104857 - Packaged microdevices and methods for manufacturing packaged microdevices

April 2011 - Micron Technology, Inc. patents

20110095256 - Memory cells
20110095357 - Semiconductor constructions, methods of forming transistor gates, and methods of forming nand cell units
20110095407 - Stackable semiconductor assemblies and methods of manufacturing such assemblies
20110095429 - Methods for fabricating and filling conductive vias and conductive vias so formed
20110095427 - Low-resistance interconnects and methods of making same
20110096597 - Programming a flash memory device
20110096599 - Multi level inhibit scheme
20110096607 - Programming a memory device to increase data reliability
20110096608 - Mitigation of runaway programming of a memory device
20110096615 - Memory devices having redundant arrays for repair
20110096825 - Fractional-rate decision feedback equalization useful in a data transmission system
20110097847 - Microelectronic devices and methods for manufacturing microelectronic devices
20110099341 - System, apparatus, and method for modifying the order of memory accesses
20110099458 - Error detection/correction based memory management
20110089088 - Method for sorting integrated circuit devices
20110090735 - Expanded programming window for non-volatile multilevel memory cells
20110090739 - Independent well bias management in a memory device
20110092062 - Transistor gate forming methods and transistor structures
20110093662 - Memory having internal processors and data communication methods in memory
20110093665 - Memory having internal processors and methods of controlling memory access
20110084402 - Packaged semiconductor assemblies and methods for manufacturing such assemblies
20110085375 - Methods for determining resistance of phase change memory elements
20110086470 - Additional metal routing in semiconductor devices
20110086476 - Methods of forming field effect transistors on substrates
20110086481 - Methods of forming non-volatile memory structure with crested barrier tunnel layer
20110086489 - Methods of manufacturing a hybrid electrical contact
20110079900 - Microfeature workpieces and methods for forming interconnects in microfeature workpieces
20110080783 - Semiconductor magnetic memory integrating a magnetic tunneling junction above a floating-gate memory cell
20110080786 - Dynamically configurable mlc state assignment
20110080787 - Non-volatile memory apparatus and methods
20110080789 - Automatic selective slow program convergence
20110081755 - Methods of fabricating an access transistor having a polysilicon-comprising plug on individual of opposing sides of gate material
20110081786 - Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ald) processes
20110082963 - Power interrupt management
20110083050 - Memory cell programming

March 2011 - Micron Technology, Inc. patents

20110073929 - High coupling memory cell
20110074043 - Method of forming vias in semiconductor substrates and resulting structures
20110074463 - On-die system and method for controlling termination impedance of memory device data bus terminals
20110074510 - Symmetrically operating single-ended input buffer devices and methods
20110075492 - Memory device bit line sensing system and method that compensates for bit line resistance variations
20110075497 - Memory system and method using stacked memory device dice, and system using the memory system
20110076827 - Memory devices having electrodes comprising nanowires, systems including same and methods of forming same
20110078336 - State change in systems having devices coupled in a chained configuration
20110078496 - Stripe based memory operation
20110068313 - Memory devices with enhanced isolation of memory cells, systems including same and methods of forming same
20110068325 - Diodes, and methods of forming diodes
20110068378 - Semiconductor devices and methods of forming semiconductor devices having diffusion regions of reduced width
20110068454 - Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods
20110069547 - Sensing against a reference cell
20110069548 - Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
20110069559 - Methods of forming and operating back-side trap non-volatile memory cells
20110069561 - System and method for controlling timing of output signals
20110069560 - Data capture system and method, and memory controllers and devices
20110069926 - Communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures, circuits, and data apparatuses
20110070679 - Semiconductor processing methods
20110071316 - Unsymmetrical ligand sources, reduced symmetry metal-containing compounds, and systems and methods including same
20110062406 - Memory devices and formation methods
20110062511 - Device having complex oxide nanodots
20110062583 - Stacked die package for peripheral and center device pad layout device
20110063023 - Structure and method for coupling signals to and/or from stacked semiconductor dies
20110063907 - Fractional bits in memory cells
20110063906 - Memory adapted to program a number of bits to a memory cell and read a different number of bits from the memory cell
20110063919 - Memory kink checking
20110063920 - Sensing for all bit line architecture in a memory device
20110063923 - Trench memory structure operation
20110063930 - Subtraction circuits and digital-to-analog converters for semiconductor devices
20110065050 - Methods of forming intermediate semiconductor device structures using spin on, photopatternable, interlayer dielectric materials
20110066816 - Non-volatile memory device adapted to identify itself as a boot memory
20110057165 - Epitaxial formation structures and associated methods of manufacturing solid state lighting devices
20110057269 - Semiconductor structures including dual fins
20110057292 - Capacitors and interconnects including at least two portions of a metal nitride material, methods of forming such structures, and semiconductor devices including such structures
20110057698 - Method and apparatus for synchronizing with a clock signal
20110057820 - Data serializer apparatus and methods
20110058406 - Resistive memory
20110058413 - Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device
20110058417 - Sensing memory cells
20110048475 - Megasonic cleaning with controlled boundary layer thickness and associated systems and methods
20110049606 - Charge-trap based memory
20110050303 - Die location compensation
20110050307 - Circuits and methods for clock signal duty-cycle correction
20110050343 - Bias circuit and amplifier providing constant output current for a range of common mode inputs
20110051511 - Digital filters with memory
20110051512 - 3d memory devices decoding and routing systems and methods
20110051513 - Methods, devices, and systems for dealing with threshold voltage change in memory devices
20110051523 - Small unit internal verify read in a memory device
20110051538 - Methods and memory devices for repairing memory cells
20110052883 - Methods of forming reversed patterns in a substrate and semiconductor structures formed during same
20110055436 - Device to device flow control

November 2010 - Micron Technology, Inc. patents

20100296380 - Spatial light modulators with changeable phase masks for use in holographic data storage



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