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Micro-c-4 semiconductor die and method for depositing connection sites thereonRelated Patent Categories: Metal Fusion Bonding, ProcessMicro-c-4 semiconductor die and method for depositing connection sites thereon description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060124699, Micro-c-4 semiconductor die and method for depositing connection sites thereon. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This is a continuation-in-part of U.S. patent application Ser. No. 09/546,084, the disclosure of which is herein incorporated by reference in its entirety. FIELD OF THE INVENTION [0002] This invention relates generally to semiconductor dies and more particularly to forming connection sites on flip chip semiconductor dies. BACKGROUND [0003] The formation of connection sites on integrated circuits is well known. Conventional methods of forming connection sites are described, for example, in U.S. Pat. No. 6,117,299 (Rinne et al.) and U.S. Pat. No. 6,074,895 (Dery et al.). [0004] With the growing complexity and increased numbers of transistors which can be placed on a single ULSI chip or die has come additional demands on the wiring and connection site processes. The number of internal metal layers required to interconnect the newer, more complex microprocessors has dramatically increased, as have the number of external connection sites. Due to the increased complexity, lower yield and added cost associated with the metallurgy, it is desirable to fabricate smaller semiconductor dies and place more wiring levels in the packaging. To accomplish this without degrading performance, a large number of exterior die connection sites are required. [0005] One of the most efficient and compact ways for providing external die connection sites uses solder bumps in the so-called flip chip or C-4 (i.e., the Controlled Collapse Chip Connection) process. This technology eliminates the need to wire bond connections from the die bond pads to a packaging lead frame, and offers more connection sites, higher speeds, improved heat transfer, and can be used with smaller die sizes. Although C-4 technology is somewhat costly in terms of time, materials, and equipment, and although it presents certain environmental issues, the use of solder bumped integrated circuits is growing at a significant rate. At present, conventional large flip chip semiconductor dies may provide hundreds of connection sites. [0006] The importance of this technology is underscored by the formation of the "MicroFab Consortium" (MicroFab) of private and governmental entities for the purpose of exploring and developing new methods for applying solder bumps and other materials to integrated circuit dies, optical circuits, hybrids, chip carriers and other devices. The literature suggests that MicroFab has successfully developed manufacturing prototypes of piezoelectrically actuated print heads for ejecting low-melting point solder balls of well-defined sizes at rates approaching several kilohertz (kHz). Although piezoelectric-based solder ball printers have several attractive characteristics, they are limited by the fact that piezoelectric device strength decreases rapidly with rising temperatures and vanishes at their Curie temperatures. The Curie temperatures of useful ceramics are well under 300.degree. C. Thus, the ability to manipulate solder viscosity and surface tension by raising temperature is limited in such print heads. Other significant limitations to using piezoelectric-based print heads includes their complexity and the great difficulty in mass producing them in large, inexpensive, relatively light weight arrays. [0007] Thus, a need exists for a method of forming a micro flip chip which contains a very high density of solder bumps, and to do so in a way which is not restricted by the Curie temperatures of the print head materials. SUMMARY [0008] The invention provides a flip chip semiconductor die which includes a substrate, a plurality of bond pads located on the substrate, and a plurality of solder bumps deposited on the bond pads. Each of the solder bumps is less than about 100 microns in diameter and the solder bumps are aligned in rows such that the pitch between solder bumps within the same row is less than about 100 microns. In a preferred embodiment, one or both of the solder bump diameter and pitch may be less than or equal to 10 microns. [0009] The invention further provides a semiconductor device that includes a die having one or more a metallurgy layers positioned over a substrate, an insulating layer deposited on the uppermost metallurgy layer, and a plurality of exterior connection sites. A solder bump is deposited on each connection site and is less than about 100 microns in diameter, and may be less than or equal to 10 microns. [0010] The invention also provides a system for depositing solder on a plurality of bond pads located on semiconductor dies. The system includes a movable substrate adapted to move at least one semiconductor die back and forth in a first plane, a movable drive including at least one print head, and a controller for controlling the movements of the movable drive and the movable substrate. The movable drive is adapted to move the print head back and forth in a second plane and the print head is adapted to deposit a solder bump at the connection sites of the semiconductor die. [0011] The invention further provides a print head adapted to deposit solder bumps having a diameter of less than 100 microns, and preferably 10 or less microns, and a pitch of less than 100 microns, and preferably 10 or less microns. The print head includes pockets of a metallic hydride, preferably titanium hydride, within one or more chambers. The print head further includes a solder reservoir, a solder conduit, a gas conduit and an ejection port. By passing a current through a heating element, the solder in the solder reservoir is melted, allowing it to flow to the ejection port. The metallic hydride pockets are heated to a temperature sufficient to generate hydrogen, which increases the pressure of the hydrogen gas within each chamber and allows ejection of the solder from the ejection port. [0012] These and other advantages and features of the invention will be more readily understood from the following detailed description of the invention which is provided in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0013] FIG. 1 is a partial top view of a flip chip semiconductor die constructed in accordance with an embodiment of the invention. [0014] FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1. [0015] FIG. 3 is a partial cross-sectional view through a channel of a solder-ejecting print head used in forming the semiconductor die of FIG. 1. [0016] FIG. 4 is a partial top-view perspective of the print head of FIG. 2. [0017] FIG. 5 is a cross-sectional view through the print head taken along line V-V of FIG. 3. [0018] FIG. 6 is a perspective view of a thermal solder jet system in accordance with an embodiment of the invention. [0019] FIG. 7 is a flow diagram of the steps involved in fabricating a semiconductor die in accordance with an embodiment of the invention. [0020] FIGS. 8-13 illustrate various stages of a semiconductor die being constructed in accordance with an embodiment of the invention. Continue reading about Micro-c-4 semiconductor die and method for depositing connection sites thereon... Full patent description for Micro-c-4 semiconductor die and method for depositing connection sites thereon Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Micro-c-4 semiconductor die and method for depositing connection sites thereon patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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