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  Methods of base formation in a bicmos processUSPTO Application #: 20060017066Title: Methods of base formation in a bicmos process Abstract: Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer. (end of abstract) Agent: Scully Scott Murphy & Presser, PC - Garden City, NY, US Inventors: Peter J. Geiss, Marwan H. Khater, Qizhi Liu, Randy W. Mann, Robert J. Purtell, BethAnn Rainey, Jae-Sung Rieh, Andreas D. Stricker USPTO Applicaton #: 20060017066 - Class: 257197000 (USPTO) Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Heterojunction Device, Bipolar Transistor The Patent Description & Claims data below is from USPTO Patent Application 20060017066. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF INVENTION [0001] 1. Field of the Invention [0002] The present invention relates generally to a bipolar transistor and, more particularly to methods for forming a bipolar transistor with a raised extrinsic base in an integrated bipolar and complementary metal oxide semiconductor (BiCMOS) transistor circuit in which the base resistance is lowered by extending the raised extrinsic base silicide to the emitter region in a self-aligned manner. [0003] 2. Background of the Invention [0004] Bipolar transistors are electronic devices with two p-n junctions that are in close proximity to each other. A typical bipolar transistor has three device regions: an emitter, a collector, and a base disposed between the emitter and the collector. Ideally, the two p-n junctions, i.e., the emitter-base and collector-base junctions, are in a single layer of semiconductor material separated by a specific distance. Modulation of the current flow in one p-n junction by changing the bias of the nearby junction is called "bipolar-transistor action." [0005] If the emitter and collector are doped n-type and the base is doped p-type, the device is an "npn" transistor. Alternatively, if the opposite doping configuration is used, the device is a "pnp" transistor. Because the mobility of minority carriers, i.e., electrons, in the base region of npn transistors is higher than that of holes in the base of pnp transistors, higher-frequency operation and higher-speed performances can be obtained with npn transistor devices. Therefore, npn transistors comprise the majority of bipolar transistors used to build integrated circuits. [0006] As the vertical dimensions of the bipolar transistor are scaled more and more, serious device operational limitations have been encountered. One actively studied approach to overcome these limitations is to build transistors with emitter materials whose band gaps are larger than the band gaps of the material used in the base. Such structures are called heterojunction transistors. [0007] Heterostructures comprising heterojunctions can be used for both majority carrier and minority carrier devices. Among majority carrier devices, heterojunction bipolar transistors (HBTs) in which the emitter is formed of silicon (Si) and the base of a silicon-germanium (SiGe) alloy have recently been developed. The SiGe alloy (often expressed simply as silicon-germanium) is narrower in band gap than silicon. [0008] The advanced silicon-germanium bipolar and complementary metal oxide semiconductor (BiCMOS) technology uses a SiGe base in the heterojunction bipolar transistor. In the high-frequency (such as multi-GHz ) regime, conventional compound semiconductors such as GaAs and InP currently dominate the market for high-speed wired and wireless communications. SiGe BiCMOS promises not only a comparable performance to GaAs in devices such as power amplifiers, but also a substantial cost reduction due to the integration of heterojunction bipolar transistors with standard CMOS, yielding the so-called "system on a chip." [0009] In addition to high unity current gain frequency fT, state-of-the-art npn HBTs also require a high unity unilateral power gain frequency fmax. Base resistance, Rb, is an important factor that must be lowered in order to obtain a high-performance HBT. [0010] For high-performance HBT fabrication, yielding SiGe/Si HBTs, a conventional way to lower the base resistance is through ion implantation into the extrinsic base. The ion implantation will cause damage, however, to the base region. Such damage may ultimately lead to degradation in device performance. [0011] To avoid the implantation damage, a raised extrinsic base (Rext) is formed by depositing an extra layer of polycrystalline silicon (or SiGe) atop the conventional SiGe extrinsic base layer. [0012] There are essentially two processes that may be utilized to achieve such a raised extrinsic base. The first process involves selective epitaxy; the other involves chemical-mechanical polishing (CMP). [0013] Despite being capable of somewhat lowering the base resistance of prior art HBTs, resistance due to a raised extrinsic base is still a large portion of the overall base resistance. In view of the drawbacks mentioned above with prior art HBTs, there is still a need for developing a method of forming a HBT having a raised extrinsic base in which further lowering of the base resistance is achieved. SUMMARY OF INVENTION [0014] An object of the present invention is to provide simple, yet practical methods of fabricating a high-performance HBT in an integrated BiCMOS process. [0015] A further object of the present invention is to provide methods of forming a HBT having a raised extrinsic base in which base resistance is further lowered as compared to a conventional HBT having a raised extrinsic base. [0016] A still further object of the present invention is to provide methods of fabricating a high-speed HBT having a raised extrinsic base in which unity current gain frequency fT and unity unilateral power gain frequency fmax can be 200 GHz or greater. [0017] A yet further object of the present invention is to provide methods of fabricating a npn or pnp bipolar transistor in a BiCMOS process flow. [0018] These and other objects and advantages are achieved in the present invention by forming a silicide region over the raised extrinsic base prior to, or after, formation of the emitter. In particular, the methods of the present invention provide means for extending the raised extrinsic base silicide to the emitter region in a self-aligned manner. In the present invention, the polysilicon is emitter is spaced apart from the raised extrinsic base silicide by a spacer. The silicide is self-aligned to the emitter and it exhibits improved, i.e., lowered, resistivity characteristics. Moreover, the silicide region is produced in such a manner so that substantially little or no agglomeration occurs. Agglomeration is defined herein as the action or process of collecting the silicide in a ball, mass or cluster. [0019] One aspect of the present invention is directed to methods of fabricating a high-performance HBT having a raised extrinsic base and a silicide region located on top of the raised extrinsic base. In a first embodiment of the present invention, the method includes the steps of: [0020] forming a base region atop a Si substrate having trench isolation regions located therein, said base region including a monocrystalline region atop the Si substrate and a polycrystalline region atop the trench isolation regions; [0021] forming an oxide layer atop the base region; [0022] forming an emitter pedestal region atop the oxide layer located atop the monocrystalline region; Continue reading... Full patent description for Methods of base formation in a bicmos process Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Methods of base formation in a bicmos process patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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