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  Methods of and apparatus for forming three-dimensional structures integral with semiconductor based circuitryUSPTO Application #: 20080105557Title: Methods of and apparatus for forming three-dimensional structures integral with semiconductor based circuitry Abstract: Enhanced Electrochemical fabrication processes are provided that can form three-dimensional multi-layer structures using semiconductor based circuitry as a substrate. Electrically functional portions of the structure are formed from structural material (e.g. nickel) that adheres to contact pads of the circuit. Aluminum contact pads and silicon structures are protected from copper diffusion damage by application of appropriate barrier layers. In some embodiments, nickel is applied to the aluminum contact pads via solder bump formation techniques using electroless nickel plating. In other embodiments, selective electroless copper plating or direct metallization is used to plate sacrificial material directly onto dielectric passivation layers. In still other embodiments, structural material deposition locations are shielded, then sacrificial material is deposited, the shielding is removed, and then structural material is deposited. In still other embodiments structural material is made to attach to non-contact pad regions. (end of abstract) Agent: Microfabrica Inc. Att: Dennis R. Smalley - Van Nuys, CA, US Inventors: Adam L. Cohen, Gang Zhang USPTO Applicaton #: 20080105557 - Class: 205157000 (USPTO) Related Patent Categories: Electrolysis: Processes, Compositions Used Therein, And Methods Of Preparing The Compositions, Electrolytic Coating (process, Composition And Method Of Preparing Composition), Coating Predominantly Semiconductor Substrate (e.g., Silicon, Compound Semiconductor, Etc.)
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