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Method of testing a multi-processor unit microprocessorRelated Patent Categories: Data Processing: Database And File Management Or Data Structures, Database Or File Accessing, SortingMethod of testing a multi-processor unit microprocessor description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060089930, Method of testing a multi-processor unit microprocessor. Brief Patent Description - Full Patent Description - Patent Application Claims FIELD OF THE INVENTION [0001] The present invention relates to the field of multi-processor unit microprocessors; more specifically, it relates to a method of testing and sorting multi-processor unit microprocessors and specifying performance and resource requirements for each processing unit of multi-processor unit microprocessors. BACKGROUND OF THE INVENTION [0002] Microprocessors are tested and sorted to specific operating specifications such as frequency and power. Large multi-processor unit microprocessors often can not meet a common optimal specification due to, for example, process variations across the integrated circuit chip. In one example, process variations cause one portion of the microprocessor to run slow, but to consume less power than an another portion which runs faster but consumes more power. This leads to a specification on the entire microprocessor of the speed of the slower region, but at the cost of a faster region consuming more power than is desirable in a speed/power optimized microprocessor. In such a case, the microprocessor has less market value. Further, regions running different power levels generate non-uniform heating for which it is more difficult to provide a cooling solution. [0003] Therefore, there is a need for a method to guarantee that a microprocessor's performance and heating are as uniform as possible across the integrated circuit chip. SUMMARY OF THE INVENTION [0004] A first aspect of the present invention is a method, comprising: (a) selecting and testing, with a selected parameter set of a group of parameter sets, a processor unit of a microprocessor having two or more processor units; (b) comparing the operation of the selected processor unit to a selected specification of a set of operational specifications of the microprocessor; (c) if the testing indicates that the operation of the selected processor unit does not meet the selected specification, repeating (a) and (b) with a different parameter set of the group of parameter sets until either the selected processor unit meets the selected specification or all parameter sets of the group of parameter sets have been selected; and (d) if the operation of the selected processor unit does meet the selected specification, repeating (a), (b) and (c) until all processor units of the two or more processor units of the microprocessor have been selected. [0005] A second aspect of the present invention is a computer program product, comprising a computer usable medium having a computer readable program code embodied therein, the computer readable program code comprising an algorithm adapted to implement a method for testing and sorting a microprocessor having two or more processor units, the method comprising the steps of: (a) selecting and testing, with a selected parameter set of a group of parameter sets, a processor unit of a microprocessor having two or more processor units; (b) comparing the operation of the selected processor unit to a selected specification of a set of operational specifications of the microprocessor; (c) if the testing indicates that the operation of the selected processor unit does not meet the selected specification, repeating (a) and (b) with a different parameter set of the group of parameter sets until either the selected processor unit meets the selected specification or all parameter sets of the group of parameter sets have been selected; and (d) if the operation of the selected processor unit does meet the selected specification, repeating (a), (b) and (c) until all processor units of the two or more processor units of the microprocessor have been selected. [0006] A third aspect of the present invention is a microprocessor, comprising: two or more processor units, each processor unit comprising a voltage island; and a fuse bank in the microprocessor, the fuse bank encoding, independently for each processor unit of the two or more processor units, at least one operating parameter for each of the processor units of the two or more processor units. BRIEF DESCRIPTION OF DRAWINGS [0007] The features of the invention are set forth in the appended claims. The invention itself, however, will be best understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein: [0008] FIG. 1A is a plan view of a microprocessor having two processor units according embodiments of the present invention; [0009] FIG. 1B is a plan view of a microprocessor having four processor units according embodiments of the present invention; [0010] FIG. 2 is a schematic diagram of a power distribution network 250 for a dual-processor unit microprocessor where each processor unit is a voltage island according to embodiments of the present invention; [0011] FIG. 3A is a flow diagram of a first method of testing an multi-processor unit microprocessor; [0012] FIG. 3B is a flow diagram of a second method of testing a multi-processor unit microprocessor; [0013] FIGS. 4A and 4B are a flow diagram of a third method of testing a multi-processor unit microprocessor; [0014] FIG. 5 is a flow diagram of a fourth method of testing a multi-processor unit microprocessor; and [0015] FIG. 6 is a schematic block diagram of a general-purpose computer portion of a tester for practicing the present invention. DETAILED DESCRIPTION OF THE INVENTION [0016] For the purposes of the present invention the term processor unit denotes a completely functional microprocessor. Processor units are also known as processor cores or microprocessor cores. To avoid confusion, though processor units are microprocessors two conventions may be used. In the first convention the term microprocessor is used to describe an electronic device implemented as an integrated circuit chip and having multiple processor units in different regions of the same integrated circuit chip. In the second convention the term microprocessor is used to describe an electronic device implemented as a multi-chip module (MCM) and having multiple processor units, each processor unit on different integrated circuit chips of the MCM. The embodiments of the present invention are described in terms of the first convention (a single integrated circuit chip), but may be applied to the second convention as well (an MCM). [0017] For the purposes of the present invention the term voltage island denotes a bounded region of an integrated circuit chip having an internal power distribution network that is supplied from a power source external to that region. Different voltage islands may be supplied from a same power supply or from different power supplies. Voltage islands may include fencing circuits for communication across voltage island boundaries. Voltage islands are also known as voltage domains. [0018] FIG. 1A is a plan view of a microprocessor 100 having two processor units according embodiments of the present invention. In FIG. 1A, microprocessor 100 includes a first processor unit (PU) 105 and a second processor unit 110. Processor units 105 and 110 are separated from each other by a boundary 115. In one embodiment, processor units 105 and 110 are also voltage islands which are separated from each other by boundary 115. Processor unit 105 includes a multiplicity of I/O pads 120A, a multiplicity of power pads 125 and a multiplicity of ground pads 130A. Processor unit 110 includes a multiplicity of I/O pads 120B, a multiplicity of power pads 135 and a multiplicity of ground pads 130B. [0019] Power pads 125 and 135 supply power to respective processor units 105 and 110 from one or two external power supplies. In the event of two external power supplies, then all power pads 125 are supplied from a first external power supply and all power pads 135 are supplied from a second external power supply. In the event of two external power supplies, the external power supplies may have the same VDD level or different VDD levels as described infra. Though, generally ground (GND or VSS) of both power supplies are connected externally and all ground pads 130A and 130B are connected to the common ground, it is possible to have separate grounds from each power supply, (which may have the same or different voltage levels), the ground of the first external power supply connected to all grounds pads 130A and the ground of the second external power supply connected to all ground pads 130B. Continue reading about Method of testing a multi-processor unit microprocessor... Full patent description for Method of testing a multi-processor unit microprocessor Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method of testing a multi-processor unit microprocessor patent application. ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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