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07/05/07 | 1 views | #20070157146 | Prev - Next | USPTO Class 716 | About this Page  716 rss/xml feed  monitor keywords

Method of packing-based macro placement and semiconductor chip using the same

USPTO Application #: 20070157146
Title: Method of packing-based macro placement and semiconductor chip using the same
Abstract: A multi-packing tree (MPT) macro placer. The MPT macro placer comprises reading input files in a LEF/DEF format, creating a k-level binary multi-packing tree comprising k branch nodes each corresponding to one level and k+1 packing sub-trees each corresponding to one of the nodes and comprising a group of macros, optimizing the multi-packing tree according to a packing result thereof, and generating output files in a DEF format. (end of abstract)
USPTO Applicaton #: 20070157146 - Class: 716 10 (USPTO)


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