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  Method of manufacturing semiconductor deviceUSPTO Application #: 20050196914Title: Method of manufacturing semiconductor device Abstract: A method of manufacturing a semiconductor device, which comprises forming a first semiconductor film on a surface of a semiconductor substrate, adsorbing a first impurity on a surface of the first semiconductor film, adsorbing a second impurity on the surface of the first semiconductor film, forming a second semiconductor film on the surface of the first semiconductor film, and solid-phase-diffusing the first impurity and the second impurity into a region of the semiconductor substrate which is located adjacent to the first and second semiconductor films to thereby form a first diffusion region containing the first impurity and a second diffusion region containing the second impurity, a concentration of the first impurity in the first diffusion region being higher than that of the second impurity in the second diffusion region, and the first diffusion region having the bottom thereof covered by the second diffusion region. (end of abstract)
Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP - Washington, DC, US Inventors: Yoshio Kasai, Miki Kawase, Takashi Suzuki, Motoya Kishida USPTO Applicaton #: 20050196914 - Class: 438238000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions, Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.), Including Passive Device (e.g., Resistor, Capacitor, Etc.) The Patent Description & Claims data below is from USPTO Patent Application 20050196914. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2004-048167, filed Feb. 24, 2004, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention relates to a method of manufacturing a semiconductor device, in particular, to the formation of an electric conductive region through the solid phase diffusion of impurities. [0004] 2. Description of the Related Art [0005] As for the memory cell structure of DRAM which is constituted by one MOS transistor and one capacitor, there is known a trench type cell wherein a trench is formed in a semiconductor substrate and the inner wall portion of the trench is employed as a capacitor. In this trench type DRAM cell, the source/drain of MOS transistor is required to be electrically connected with one of the electrodes of the capacitor. [0006] As for the technique for connecting the source/drain of MOS transistor to one of the electrodes of the capacitor, there is known a method wherein As(arsenic)-doped polycrystalline silicon is buried in a deep trench formed in a semiconductor substrate and As in the As-doped polycrystalline silicon is caused to diffuse through solid phase diffusion from the side-wall of upper portion of the trench, thereby forming an As diffusion region in the semiconductor substrate (see, for example, U.S. Pat. No. 5,360,758 and U.S. Pat. No. 6,110,792). [0007] As for the method to minimize the junction leak current from a high-concentration As diffusion region which is formed by making use of the aforementioned method, it is conceivable to fabricate a structure where the high-concentration As diffusion region is enclosed by a low concentration P (phosphorus) diffusion region. [0008] This structure can be fabricated by a method wherein P is introduced, through ion-implantation, into the As-doped polycrystalline silicon buried in the trench, thereby effecting the solid phase diffusion of As and P from the polycrystalline silicon. However, the doping of P by means of ion-plantation is accompanied with a problem that the introduction of P into a predetermined depth in the vertical direction is limited, thereby raising various problems. For example, when it is desired to introduce P into a deep region of the trench by means of ion-implantation using a high accelerating voltage of several tens KeV, a long period of heat treatment is required due to a long distance required for achieving the solid phase diffusion, thereby making it impossible to suitably control the diffusion region. As a result, the P thus diffused may badly affect the neighboring transistor which is spaced away by a distance of 500 angstroms from the edge of the trench, thereby raising problems such as the punch-through of transistor. [0009] When P is introduced into a shallow region of the trench through ion-implantation using, for example, a low accelerating voltage of 5 KeV or less in order to inhibit the generation of the aforementioned phenomenon, it may be possible to form a diffusion region of P at a surface region of the As-doped polycrystalline silicon layer, thus making it possible to cover the top surface of As-doped polycrystalline silicon layer with a P diffusion region. However, it is difficult to cover the bottom of the As-doped polycrystalline silicon layer with a P diffusion region by diffusing P into a depth of 1000 angstroms or so. Therefore, it has been impossible to sufficiently enclose the As diffusion region with a low concentration P diffusion region, thus making it difficult to minimize the junction leak current at the As diffusion region. BRIEF SUMMARY OF THE INVENTION [0010] According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises forming a first semiconductor film including polycrystalline silicon or amorphous silicon on a surface of a semiconductor substrate; adsorbing a first impurity on a surface of the first semiconductor film; adsorbing a second impurity on the surface of the first semiconductor film having the first impurity adsorbed thereon; forming a second semiconductor film made of polycrystalline silicon or amorphous silicon on the surface of the first semiconductor film having the first and second impurities adsorbed thereon; and solid-phase-diffusing the first impurity and the second impurity into a region of the semiconductor substrate which is located adjacent to the first and second semiconductor films to thereby form a first diffusion region containing the first impurity and a second diffusion region containing the second impurity, a concentration of the first impurity in the first diffusion region being higher than that of the second impurity in the second diffusion region, and the first diffusion region having the bottom thereof covered by the second diffusion region. [0011] Additionally, according to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of forming a first semiconductor film including polycrystalline silicon or amorphous silicon on a surface of a semiconductor substrate; adsorbing a first impurity on a surface of the first semiconductor film; adsorbing a second impurity on the surface of the first semiconductor film in the middle of the previous step of applying the first impurity to the surface of the first semiconductor film; forming a second semiconductor film including polycrystalline silicon or amorphous silicon on the surface of the first semiconductor film having the first and second impurities adsorbed thereon; and solid-phase-diffusing the first impurity and the second impurity into a region of the semiconductor substrate which is located adjacent to the first and second semiconductor films to thereby form a first diffusion region containing the first impurity and a second diffusion region containing the second impurity, a concentration of the first impurity in the first diffusion region being higher than that of the second impurity in the second diffusion region, and the first diffusion region having the bottom thereof covered by the second diffusion region. BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING [0012] FIGS. 1A to 1D are cross-sectional views illustrating, in the order of steps, the method of manufacturing the DRAM trench cell according to one embodiment of the present invention; [0013] FIG. 2 is a graph illustrating, as one example, a sequence of each of gases to be employed in the formation of polycrystalline silicon containing both As and P; [0014] FIG. 3 is a graph illustrating, as another example, a sequence of each of gases to be employed in the formation of polycrystalline silicon containing both As and P; [0015] FIG. 4 is a graph illustrating one example of the concentration distribution of the As diffusion region and of the P diffusion region in the DRAM trench cell according to one embodiment of the present invention; and [0016] FIG. 5 is a graph illustrating the results measured of cell-P well current of the DRAM trench cell according to one example of the present invention. DETAILED DESCRIPTION OF THE INVENTION [0017] Embodiments of the present invention will now be explained with reference to drawings. [0018] In the method of manufacturing a semiconductor device according to one embodiment of the present invention, a first impurity and a second impurity are successively adsorbed onto the surface of a first semiconductor film. Whereas, in the method of manufacturing a semiconductor device according to another embodiment of the present invention, the first impurity is adsorbed onto the surface of the first semiconductor film and then, in the middle of this first impurity adsorption step, the second impurity is adsorbed, together with the first impurity, onto the surface of the first semiconductor film. According to these manufacturing methods of semiconductor device, since the second impurity is adsorbed onto the surface of the first semiconductor film which has been adsorbed, in advance, with the first impurity, the quantity of the first impurity and the second impurity can be easily controlled so as to enable the first impurity to be adsorbed at a higher concentration while enabling the second impurity to be adsorbed at a lower concentration. [0019] These adsorption steps may preferably be repeated a plurality of times with a step of forming a semiconductor film being interposed between these adsorption steps. The number of this repetition of steps may be suitably determined by taking into consideration the quantity of impurities required to be adsorbed and the thickness of the film. In this case, in order to adjust the magnitude of difference in quantity of adsorption between the quantity of the adsorbed first impurity and the quantity of the adsorbed second impurity, at least one of the repetitions of abovementioned sequential steps may be performed without including the step of adsorbing the second impurity. Continue reading... Full patent description for Method of manufacturing semiconductor device Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method of manufacturing semiconductor device patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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