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08/24/06 - USPTO Class 438 |  24 views | #20060189145 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed

USPTO Application #: 20060189145
Title: Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed
Abstract: An insulating film formed on a conducting layer is dry-etched so as to make a connection hole in the insulating film to expose the conducting layer. Plasma is supplied onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole. A product produced in the connection hole as a result of the dry cleaning is removed by a wet process. An oxide film formed in the connection hole as a result of the wet process is etched by a chemical dry process using a gas including either NF3 or HF. A thermally decomposable reaction product produced as a result of the etching is removed by heat treatment. (end of abstract)



Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP - Washington, DC, US
Inventors: Makoto Honda, Kaori Yomogihara, Kazuhiro Murakami, Masanori Numano, Takahito Nagamatsu, Hideaki Harakawa, Hideto Matsuyama, Hirokazu Ezawa, Hisashi Kaneko
USPTO Applicaton #: 20060189145 - Class: 438710000 (USPTO)

Related Patent Categories: Semiconductor Device Manufacturing: Process, Chemical Etching, Vapor Phase Etching (i.e., Dry Etching), Utilizing Electromagnetic Or Wave Energy, By Creating Electric Field (e.g., Plasma, Glow Discharge, Etc.)

Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20060189145, Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed.

Brief Patent Description - Full Patent Description - Patent Application Claims
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CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2005-029454, filed Feb. 4, 2005, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This invention relates to a semiconductor device manufacturing method, and more particularly to a method of making connection holes, such as contact holes.

[0004] 2. Description of the Related Art

[0005] In a semiconductor device, plugs made of conducting material have been used. Each of the plugs electrically connects a transistor to a wiring layer above the transistor or a lower wiring layer to an upper wiring layer. To do this, a connection hole, such as a contact hole or a via hole, is made in the insulating film covering the transistor or in the insulating film between the lower wiring layer and upper wiring layer and then is filled with conducting material, thereby forming a plug.

[0006] For instance, when a contact hole is made, an insulating film is etched using, for example, RIE (Reactive Ion Etching) techniques. In this etching, a damage layer is formed on the sidewall and at the bottom of the contact hole. The damage layer is removed by, for example, a wet process. However, the surface of the conducting layer, such as a metal silicide layer, exposed at the bottom of the contact hole after the damage layer has been removed is non-uniform. Moreover, during the removal of the damage layer, another damage layer and a native oxide film are formed. When a barrier metal is formed in the contact hole with the damage layer and native oxide film being left as described above, the contact resistance increases and the characteristic of the transistor deteriorates. Therefore, it is necessary to remove the damage layer and native oxide film completely.

[0007] To remove a damage layer formed in a contact hole, techniques using only dry cleaning have been developed (refer to, for example, Jpn. Pat. Appln. KOKAI Publication No. 2000-236021).

[0008] In the conventional cleaning method, however, it was difficult to sufficiently remove the damage layer and native oxide film in the contact hole. Therefore, a semiconductor device manufacturing method capable of sufficiently removing the damage layer and native oxide film in the contact hole has been desired. Furthermore, when a contact hole is made in a plurality of insulating films stacked one on top of another, steps might develop in the contact hole. Therefore, the development of the technique for removing the steps has been desired.

BRIEF SUMMARY OF THE INVENTION

[0009] According to a first aspect of the invention, there is provided a semiconductor device manufacturing method comprising: dry-etching an insulating film formed on a conducting layer so as to make a connection hole in the insulating film to expose the conducting layer; supplying plasma excited from an oxidized gas onto the exposed conducting layer to dry-clean a damage layer produced in the connection hole; removing a product produced in the connection hole as a result of the dry cleaning by a wet process; etching an oxide film formed in the connection hole as a result of the wet process by a chemical dry process using a gas including either NF.sub.3 or HF; and removing a thermally decomposable reaction product as a result of the etching by heat treatment.

[0010] According to a second aspect of the invention, there is provided a semiconductor device manufacturing method comprising: dry-etching a silicon nitride film and a silicon oxide film stacked on a conducting layer so as to make a connection hole in the silicon nitride film and silicon oxide film to expose the conducting layer; etching steps in the silicon nitride film and silicon oxide film formed in the connection hole by chemical dry process using a gas including either HF.sub.3 or HF; and removing a thermally decomposable reaction product as a result of the etching by heat treatment.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

[0011] FIGS. 1A to 1E are sectional views to explain a semiconductor device manufacturing method according to a first embodiment of the present invention;

[0012] FIG. 2 shows the result of analyzing a semiconductor device processed by the method of the first embodiment and a conventional manufacturing method by use of X-ray photoelectron spectroscopy;

[0013] FIG. 3 shows the result of analyzing a semiconductor device processed by the method of the first embodiment and the conventional manufacturing method by use of X-ray photoelectron spectroscopy;

[0014] FIGS. 4A and 4B relate to the first embodiment, showing transmission electron microscope (TEM) photographs illustrating the states of the semiconductor device before and after a wet process;

[0015] FIG. 5 shows variations in the contact resistance caused by a dry process and a wet process;

[0016] FIG. 6 shows the result of analyzing a semiconductor device processed by the method of the first embodiment by use of X-ray photoelectron spectroscopy;

[0017] FIG. 7 shows variations in the contact resistance of the first embodiment and in a conventional contact resistance; and

[0018] FIGS. 8A, 8B, and 8C are sectional views to help explain a semiconductor device manufacturing method according to a second embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, referring to the accompanying drawings, embodiments of the present invention will be explained.

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Metal structure with sidewall passivation and method
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Semiconductor device manufacturing: process

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