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Method of making printed wiring board and method of forming plating filmUSPTO Application #: 20060169591Title: Method of making printed wiring board and method of forming plating film Abstract: A current is supplied to first and second electrically-conductive resistances located away from each other on a straight line defined on an electrically-insulating substrate in a method of making a printed wiring board. A contour of the substrate is formed along the straight line based on the detected resistance values. The method allows an increase in the resistance values of the first and second electrically-conductive resistances in response to reduction of the first and second electrically-conductive resistances, respectively. The resistance values are thus utilized to determine the contour of the electrically-insulating substrate. Any process of defining the contour can be finished based on the determination of the contour. This enables establishment of the contour as designed with a higher accuracy. (end of abstract) Agent: Arent Fox PLLC - Washington, DC, US Inventors: Manabu Watanabe, Naoaki Nakamura USPTO Applicaton #: 20060169591 - Class: 205125000 (USPTO) Related Patent Categories: Electrolysis: Processes, Compositions Used Therein, And Methods Of Preparing The Compositions, Electrolytic Coating (process, Composition And Method Of Preparing Composition), Coating Selected Area, Specified Product Produced, Product Is Circuit Board Or Printed Circuit The Patent Description & Claims data below is from USPTO Patent Application 20060169591. Brief Patent Description - Full Patent Description - Patent Application Claims BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a method of making a printed wiring board such as a small-sized printed wiring board for a chip package. [0003] 2. Description of the Prior Art [0004] A printed wiring board is positioned relative to a chip when the chip is mounted on the printed circuit board in a chip package. In general, a camera is utilized for positioning the printed wiring board. Given marks are inscribed on the chip and the printed wiring board. The printed wiring board can be positioned relative to the chip based on the marks in images captured with the camera. [0005] The marks cannot always be positioned with high accuracy. For example, electrically-conductive pads for receiving bumps of the chip sometimes shift relative to the mark on the printed wiring board. A larger shift of the mark causes the electrically-conductive pads on the printed wiring board to receive wrong bumps of the chip. The density of the bumps or connecting terminals cannot further be improved. A mounting efficiency cannot be enhanced. SUMMARY OF THE INVENTION [0006] It is accordingly an object of the present invention to provide a method of making a printed wiring board greatly contributing to improvement in the mounting efficiency. It is an object of the present invention to provide a method of forming a plating film greatly contributing to realization of such a method. [0007] According to a first aspect of the present invention, there is provided a method of making a printed wiring board, comprising: supplying a current to first and second electrically-conductive resistances located away from each other on a straight line defined on an electrically-insulating substrate; detecting the resistance values of the first and second electrically-conductive resistances based on the supplied current; and forming a contour of the substrate along the straight line based on the detected resistance values. [0008] The method allows an increase in the resistance values of the first and second electrically-conductive resistances in response to reduction of the first and second electrically-conductive resistances, respectively. The resistance values are thus utilized to determine the contour of the electrically-insulating substrate. Any process of defining the contour can be finished based on the determination of the contour. This enables establishment of the contour as designed with a higher accuracy. [0009] The first and second electrically-conductive resistances are preferably contoured in an identical shape prior to the formation of the contour. The identical shape of the first and second electrically-conductive resistances leads to an easier establishment of conformance of the resistance values. The contour of the substrate can be determined in a relatively facilitated manner based on the conformance of the resistance values. [0010] For example, the resistance value of the first electrically-conductive resistance may be compared with a predetermined reference value in the determination of the contour. If the resistance value is set equal to the reference value, the contour can reliably be set as designed in the substrate. [0011] According to a second aspect of the present invention, there is provided a method of making a printed wiring board, comprising: supplying a current to first and second electrically-conductive resistances located away from each other on a first straight line defined on an electrically-insulating substrate; detecting the resistance values of the first and second electrically-conductive resistances based on the supplied current; forming a first contour of the substrate along the first straight line based on the resistance values from the first and second electrically-conductive resistances; supplying a current to third and fourth electrically-conductive resistances located away from each other on a second straight line orthogonal to the first straight line defined on the electrically-insulating substrate; detecting the resistance values of the third and fourth electrically-conductive resistances based on the supplied current; and forming a second contour of the substrate along the second straight line based on the resistance values from the third and fourth electrically-conductive resistances. [0012] The method allows an increase in the resistance values of the first and second electrically-conductive resistances or the third and fourth electrically-conductive resistances in response to reduction of the first and second electrically-conductive resistances or the third and fourth electrically-conductive resistances, respectively. The resistance values are thus utilized to determine the first and second contours of the electrically-insulating substrate. Any process of defining the first and second contours can be finished based on the determination of the contours. This enables establishment of the first and second contours as designed with a higher accuracy. [0013] The first and second electrically-conductive resistances are preferably contoured in an identical shape prior to the formation of the first contour. The identical shape of the first and second electrically-conductive resistances leads to an easier establishment of conformance of the resistance values. The contour of the substrate can be determined in a relatively facilitated manner based on the conformance of the resistance values. Similarly, The third and fourth electrically-conductive resistances are preferably contoured in an identical shape. All the first to fourth electrically-conductive resistances may have an identical shape. [0014] For example, the resistance values of the first and third electrically-conductive resistances are compared with predetermined reference values, respectively, in the determination of the first and second contours. If the resistance values are set equal to the reference values, respectively, the first and second contours can reliably be set as designed in the substrate. [0015] The above-described method serves to provide a specific printed wiring board. The printed wiring board may include: an electrically-insulating substrate having first and second contours defined along imaginary planes orthogonal to each other: an electrically-conductive terminal pad formed on the substrate; a first electrically-conductive resistance formed on the substrate along the first contour; a pair of first electrically-conductive pad formed on the substrate, the first electrically-conductive pads connected to the first electrically-conductive resistance; a second electrically-conductive resistance formed on the substrate along the first contour away from the first electrically-conductive resistance; a pair of second electrically-conductive pad formed on the substrate, the second electrically-conductive pads connected to the second electrically-conductive resistance; a third electrically-conductive resistance formed on the substrate along a second contour; a pair of third electrically-conductive pad formed on the substrate, the third electrically-conductive pads connected to the third electrically-conductive resistance; a fourth electrically-conductive resistance formed along the second contour away from the third electrically-conductive resistance on the substrate; and a pair of fourth electrically-conductive pad formed on the substrate, the fourth electrically-conductive pads connected to the fourth electrically-conductive resistance. Here, the resistance value of the first electrically-conductive resistance detected out of the first electrically-conductive pads is set equal to the resistance value of the second electrically-conductive resistance detected out of the second electrically-conductive pads. The resistance value of the third electrically-conductive resistance detected out of the second electrically-conductive pads is set equal to the resistance value of the fourth electrically-conductive resistance detected out of the fourth electrically-conductive pads. [0016] Any positions can be set on the electrically-insulating substrate relative to a first plane determined based on the first and second electrically-conductive resistances and a second plane determined based on the third and fourth electrically-conductive resistances with a higher accuracy. If electrically-conductive pads are positioned based on the set positions, a chip can reliably be mounted on the printed wiring board with a higher positional accuracy. This contributes to a closed-packed arrangement or higher density of the electrically-conductive pads. Mounting efficiency can be improved. [0017] The terminal pad may comprise: a first electrically-conductive layer extending over the substrate; a substitution layer extending over the surface of the first electrically-conductive layer, the substitution layer made of a material inducing substitution reaction to a given metal; and a plating film received on the surface of the substitution layer, the plating film made of the given metal. In this case, the first to fourth electrically-conductive resistances may comprise: a substitution layer extending over the substrate, the substitution layer made of said material; and a plating film received on the surface of the substitution layer, the plating film made of the given metal. [0018] A specific method of forming a plating film may be provided to realize the aforementioned method of making the printed wiring board. The method of making a plating film, may comprise: forming a resist film of a first pattern on an electrically-insulating plate; forming a plating film of a metal material on the electrically-insulating plate based on the first pattern after formation of the resist film; removing the resist film of the first pattern; and forming a plating film of the metal material based on the first pattern and a second pattern different from the first pattern after removal of the resist film. [0019] The method enables establishment of the electrically-conductive resistance thinner than the terminals. Reduction of the electrically-conductive resistance reliably induces a larger increase in the resistance value. Accordingly, the contour can be defined with a higher accuracy. To the contrary, if the thickness of the electrically-conductive resistance is set larger, only a smaller increment of the resistance value can be achieved for the reduction of the substrate. It is difficult to detect the resistance value with high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS [0020] The above and other objects, features and advantages of the present invention will become apparent from the following description of the preferred embodiment in conjunction with the accompanying drawings, wherein: [0021] FIG. 1 is a side view of an electronic component package according to an embodiment of the present invention; Continue reading... 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