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  Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effectsUSPTO Application #: 20060277520Title: Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effects Abstract: Images such as mask layouts, signatures, and photographs are compared to identify similarities or dissimilarities in the images. Descriptions of the images use geometric shapes including lines, rectangles, and triangles to facilitate the comparisons and decrease comparison time and decrease stored data describing the shapes. Data for pixels in the shapes are pre-integrated to reduce arithmetic operations in the comparisons. (end of abstract) Agent: Beyer Weaver & Thomas, LLP - Oakland, CA, US Inventor: Frank E. Gennari Related Keywords: USPTO Applicaton #: 20060277520 - Class: 716021000 (USPTO) Related Patent Categories: Data Processing: Design And Analysis Of Circuit Or Semiconductor Mask, Design Of Semiconductor Mask, Pattern Exposure The Patent Description & Claims data below is from USPTO Patent Application 20060277520. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCES TO RELATED APPLICATIONS [0001] This application claims priority from provisional application Ser. No. 60/322,381, filed Sep. 11, 2001, and as a continuation-in-part of co-pending patent application Ser. No. 10/241,242, filed Sep. 10, 2002, which are incorporated herein for all purposes. BACKGROUND OF THE INVENTION [0003] This invention relates generally to imaging lens systems and photo masks for optically defining patterns, and more particularly the invention relates to integrated circuit mask analysis and locating areas in a mask that are sensitive to residual processing effects. The invention has applicability in other image analysis, including signature analysis, for example. [0004] In the fabrication of electronic integrated circuits, line patterns of less than a tenth of a micron are now being developed. This is less than 1/500 the width of a human hair. At these dimensions, the projection printing of mask patterns in integrated circuit layout can be adversely impacted by small residual aberrations in the lens system. While the quality metric (Strehl ratio) of today's projection printers is within a few percent of unity, residual aberrations still contribute significant spillover of signals from one mask opening to another. These spillover effects degrade the image quality with position within the field of the die. Good correlation of measured aberrations with the difference in horizontal and vertical linewidth along the slit in a scanning system has been observed. Such aberration-based linewidth variations are themselves partially mitigated by higher image slopes created through optical proximity correction (OPC). Yet residual cross-chip linewidth variations suggest that residual aberrations continue to contribute a level of degradation that is about half as large as the level of improvement gained through applying OPC. The impact of these aberration-based spillover effects will clearly become more important with phase shifting masks due to the inherent use of more coherent illumination as well as the presence of both phases to more efficiently direct energy to a broader set of locations in the lens pupil. Since lithography at low kl and high NA is adversely affected by small residual aberrations in lenses even though Strehl ratios exceed 0.98, test targets are needed to act as `canaries` that are more sensitive than product features as well as to quantify individual aberrations to 0.01 .lamda.rms. [0005] Co-pending application Ser. No. 10/241,242, supra, is concerned with characterizing a lens and lens system as to aberrations through the use of a probe and surrounding pattern by illuminating a mask having a small opening (probe) and a surrounding adjacent open geometry (pattern). The combined intensity pattern at the probe position near an image plane of the lens is then observed for spillover from the surrounding pattern that occurs as light passes through the lens. For this application, patterns corresponding to the inverse Fourier transform (IFT) of aberration representations used in characterizing lenses can be utilized. This gives an indication of the presence and level of lens aberrations, such as coma, astigmatism, spherical, and trifoil or even multiple terms in the Zernike representation. Measurements of the combined image compared to the individual image of the probe and pattern thus contain quantitative information on the level of aberrations. This intensity change can be observed directly by signal detection or indirectly by, for example in lithography, performing wafer exposures at various doses and comparing the dose at which the various parts of the image print in photoresist with the dose required to clear large areas or isolated probes. [0006] The application also discloses a pattern-matching method for predicting worst case locations of residual aberration induced feature changes in the projection printing of large layouts including chip layouts used in integrated circuit manufacturing. A CAD system can rapidly determine locations in large layouts that are most impacted by aberrations in projection printing. For this application, aberrations are accurately modeled as producing spillover between mask openings with a localized pattern that is the inverse Fourier transform (IFT) of the optical path difference (OPD) function in the lens. The novel function in the CAD system then quickly rank orders all pattern edges and corners of interest according to the degree of similarity of their surrounding layout to the IFT function. [0007] In carrying out the pattern matching the application discloses a bitmap matrix algorithm in which a bitmap of the layout is multiplied with the test pattern bitmap to compute the final match factor at each layout pixel of interest. The entire mask layout is represented as one huge bitmap of layers, similar to images on a computer screen. At every match location of interest (e.g., edge, corner) each pattern pixel is multiplied by the layout pixel at that coordinate and summed. However, the bitmap algorithm is too slow and too data intensive. [0008] The present invention is directed to proving new algorithms based on edges, rectangles and triangles, which more efficiently compute match factors for a large number of test points. BRIEF SUMMARY OF INVENTION [0009] In accordance with the invention, new algorithms have been created to replace the inefficient bitmap-based algorithms in pattern matching. One new algorithm is based on extracting edges from the geometry, pre-integrating the pattern in one dimension, and adding contributions from each pixel wide strip between two edges of each shape overlapping the pattern. Another new algorithm takes the method one step further to the rectangles themselves, pre-integrating the pattern in two dimensions and adding contributions from each rectangle in the input geometry that overlaps the pattern. Performance analysis shows that both algorithms reduce the computational complexity of pattern matching, thus dramatically reducing both runtime and memory usage. The rectangle algorithm is the most efficient for typical layouts, so additional features such as layer Booleans, overlap removal, match filtering, and several speedup methods have been adapted to work with the rectangle data structure. The invention can be extrapolated to triangle primitives for polygons with diagonal lines. [0010] The two new algorithms based on edges and on rectangles efficiently compute the match factor (MF) for a large number of test points. The edge algorithm comprises first extracting either horizontal, vertical, or both orientations of edges from each polygon, path, or rectangle in the input layout. Diagonal edges are split into horizontal and vertical segments on fixed grid spacing, leading to a stair step of orthogonal segments. The edges are then split into segments of length one grid unit, sorted, and stored in an array for each grid scanline of the layout. The pattern is pre-integrated in one dimension so that in one embodiment, each new pixel is equal to the sum of the pixels to the right of it (for vertical edges). Then, for each grid line in the pattern (row of pixels), the edge segments along that line are iterated through, multiplied by the integrated pixel value, and summed to compute the match factor at that point. [0011] The rectangle-based algorithm extracts rectangles from the geometry and sorts them by location. Polygons and other non-rectangular shapes are split into a near minimum number of rectangles and snapped to the nearest grid coordinates. The layout is partitioned and polygons are extracted one partition at a time prior to splitting. Each partition is further divided into regions equal in size to the largest pattern used for matching. When the pattern is laid over the geometry, it can thus overlap at most a 2.times.2 group of regions. Each region is associated with an array containing the indices of each rectangle overlapping that region, and another data structure is built to contain a unique list of the rectangles overlapping any group of 2.times.2 regions. This final data structure can be used to iterate through all the rectangles overlapping the pattern by looking into the array representing the group of four regions that the pattern overlaps. In this algorithm the pattern is integrated in two dimensions so that the integrated value of a pixel P(x,y) equals the sum of all pixels both above and to the left of the point, including the point itself. The weight of the pattern pixels under a rectangle at (x1,y1), (x2,y2) is PW(r)=P(x1,y1)+P(x2,y2)-P(x1,y2)-P(x2,y1). Using this equation, each rectangle contributes a value of weight(r)*PW(r) to the match factor at that point. For layouts containing diagonal edges, a triangular algorithm can be used with the rectangular algorithm to further improve the speed and accuracy of pattern matching. [0012] These algorithms have been analyzed on the basis of speed, memory requirements, and the ability to add in special features that improve the efficiency, functionality, or usability of the tool. It has been determined that the rectangle algorithm performs much better than the original bitmap algorithm and usually better than the edge algorithm on typical input layouts. [0013] The features from the bitmap algorithm that have been successfully integrated into the rectangle code include layer Booleans, overlap removal, match filtering, match requirements, and extraction of geometry for SPLAT aerial image simulation. Layer Booleans and overlap removal are implemented efficiently using the same regions (working sets) from the rectangle algorithm described above. All pairs of rectangles within a region having identical layers are checked for Boolean operations and overlap. Since the regions are small, the rectangle count is usually low and these operations are relatively fast compared to the match factor computation time. [0014] Match filtering is used to reduce the set of locations of interest to only inside corners, outside corners, edges, line ends, centers of line ends, and alternating edge points. The matching time is also reduced by a factor of two to five by using an adaptive match factor prediction and error bounds estimation. This allows the software to skip the computation of the match factor of points that are close to other locations of low value. Results employing the latest version of the rectangle algorithm show that all edges and line ends on a single layer mask of several square centimeters can be processed in less than an hour on a 1 GHz desktop PC. [0015] The invention and objects and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0016] FIG. 1 illustrates pattern matcher test patterns for various applications of the invention. [0017] FIG. 2A is a functional block diagram of pattern matcher software in accordance with an embodiment of the invention, and FIG. 2B is a flow diagram of steps in the mask pattern comparison. [0018] FIG. 3 illustrates trifoil and coma patterns matched on a 0.degree./180.degree. FPGA interconnect layout. [0019] FIG. 4 illustrates a coma pattern matched on a mask layout with 45-degree edges. [0020] FIG. 5 is a graph illustrating simulated intensity change vs. match factor prediction for various aberration patterns and layouts. [0021] FIG. 6 illustrates generic pattern matching code. Continue reading... Full patent description for Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effects Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effects patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effects or other areas of interest. ### Previous Patent Application: Method of identifying an extreme interaction pitch region, methods of designing mask patterns and manufacturing masks, device manufacturing methods and computer programs Next Patent Application: Method, program product and apparatus for performing double exposure lithography Industry Class: Data processing: design and analysis of circuit or semiconductor mask ### FreshPatents.com Support Thank you for viewing the Method of locating areas in an image such as a photo mask layout that are sensitive to residual processing effects patent info. IP-related news and info Results in 6.57614 seconds Other interesting Feshpatents.com categories: Computers: Graphics , I/O , Processors , Dyn. Storage , Static Storage , Printers |
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