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12/20/07 - USPTO Class 257 |  27 views | #20070290239 | Prev - Next | About this Page  257 rss/xml feed  monitor keywords

Method of fabricating semiconductor device

USPTO Application #: 20070290239
Title: Method of fabricating semiconductor device
Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region. (end of abstract)



Agent: Mattingly, Stanger, Malur & Brundidge, P.C. - Alexandria, VA, US
Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
USPTO Applicaton #: 20070290239 - Class: 257288000 (USPTO)

Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode)

Method of fabricating semiconductor device description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20070290239, Method of fabricating semiconductor device.

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Semiconductor device and method of manufacturing the semiconductor device
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