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08/31/06 - USPTO Class 216 |  112 views | #20060191863 | Prev - Next | About this Page  216 rss/xml feed  monitor keywords

Method for fabricating etch mask and patterning process using the same

USPTO Application #: 20060191863
Title: Method for fabricating etch mask and patterning process using the same
Abstract: A method for fabricating a mask is provided. A patterned sacrificial layer is formed over a mask material layer, and the patterned sacrificial layer has an etch selectivity different from that of the mask material layer. An isotropic etch process is performed to the mask material layer by using the patterned sacrificial layer as an etch mask to form a mask layer, wherein the dimension of the mask layer is smaller than that of the patterned sacrificial layer. (end of abstract)



Agent: J C Patents, Inc. - Irvine, CA, US
Inventor: Benjamin Szu-Min Lin
USPTO Applicaton #: 20060191863 - Class: 216041000 (USPTO)

Related Patent Categories: Etching A Substrate: Processes, Masking Of A Substrate Using Material Resistant To An Etchant (i.e., Etch Resist)

Method for fabricating etch mask and patterning process using the same description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20060191863, Method for fabricating etch mask and patterning process using the same.

Brief Patent Description - Full Patent Description - Patent Application Claims
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BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor process, and more particularly to a method for fabricating a mask and a patterning process using the mask.

[0003] 2. Description of the Related Art

[0004] As the integration of circuits continues to increase, the dimensions of circuit devices must shrink to meet the requirement. One of the most important processes in the semiconductor technology is the photolithographic process. Patterns of different film layers and areas with dopants of Metal-Oxide-Semiconductor (MOS) devices are defined by the photolithographic process. In detail, dimensions of a photoresist layer formed by the photolithographic process or dimensions of a mask formed by using the patterned photoresist layer are closely related to the photolithographic process. Whether the device integration of the semiconductor technology can progress to smaller dimensions is depended upon the development of the photolithographic technology.

[0005] In order to shrink the dimensions of a device and improve exposure resolution, various improved designs of masks or light sources with shorter wavelengths have been used to obtain devices with smaller dimensions. Regardless of the improvement methods, the improvement of the device dimensions is restricted by the limitation of the exposure equipment. For example, the exposure equipment itself has an ultimate resolution. The dimension of the defined photoresist layer can only be reduced to a specific dimension, i.e., the critical dimension (CD), and cannot be further reduced. Accordingly, to further decrease the dimension of a film layer defined by using the photoresist layer is also limited.

[0006] The issue described above can be solved by treating the patterned photoresist layer with the trim technology to reduce the dimension of the patterned photoresist layer. However, the dimension of a trimmed photoresist layer is so small that photoresist layer may collapse because the trimmed photoresist layer cannot withstand stand the stress induced in the subsequent etch process. As a result, the accuracy of the dimension of the film layer defined by the trimmed photoresist layer is affected.

SUMMARY OF THE INVENTION

[0007] Accordingly, the present invention is directed to a method for fabricating a mask with a dimension smaller than the critical dimension (CD) of the photolithographic process.

[0008] The present invention is also directed to a patterning process to overcome the restraint on size reduction of devices due to the limitation of the traditional exposure equipment.

[0009] The present invention provides a method for fabricating a mask. The method includes forming a patterned sacrificial layer over a mask material layer. The patterned sacrificial layer has an etch selectivity different from that of the mask material layer. An isotropic etch process is performed to the mask material layer to form a mask layer by using the patterned sacrificial layer as an etch mask. A dimension of the mask layer is smaller than a dimension of the patterned sacrificial layer.

[0010] The present invention provides a patterning process. The process includes forming a mask material layer over a material layer. The mask material layer has an etch selectivity different from that of the material layer. A patterned sacrificial layer is formed over the mask material layer. The patterned sacrificial layer has an etch selectivity different from that of the mask material layer. The patterned sacrificial layer has an etch selectivity the same as, or different from, that of the material layer. An isotropic etch process is performed to the mask material layer to form a mask layer by using the patterned sacrificial layer as an etch mask. A dimension of the mask layer is smaller than a dimension of the patterned sacrificial layer. The material layer is then etched by using the mask layer as an etch mask.

[0011] According to the method for fabricating a mask or the patterning process of embodiments of the present invention, the method for forming the patterned sacrificial layer forms a sacrificial layer over the mask material layer. A patterned photoresist layer is then formed over the sacrificial layer. The sacrificial layer is etched by using the patterned photoresist layer as an etch mask, wherein, the patterned photoresist layer has a critical dimension (CD), and the dimension of the mask layer is smaller than the CD.

[0012] According to the method for fabricating a mask or the patterning process of embodiments of the present invention, the isotropic etch process comprises a wet etch process, for example.

[0013] According to the method for fabricating a mask or the patterning process of the embodiments of the present invention, the material of the mask material layer comprises, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material.

[0014] According to the method for fabricating a mask or the patterning process of the embodiments of the present invention, the material of the patterned sacrificial layer comprises, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material.

[0015] According to the patterning process of an embodiment of the present invention, the material of the material layer comprises silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material.

[0016] The present invention uses the patterned sacrificial layer to define the film as the actual mask. By using the isotropic etch process, the dimension of the film can be further reduced. Accordingly, the dimension of the mask layer is smaller than that of the sacrificial layer. In other words, if the dimension of the patterned sacrificial layer is the smallest dimension (critical dimension) that can be produced by the photolithographic equipment, the dimension of the mask layer is smaller than the critical dimension. Accordingly, the mask layer can be used to fabricate devices with smaller dimensions. The integration of devices is thus improved.

[0017] The above and other features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention that is provided in communication with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] FIGS. 1A-1D are schematic cross sectional views showing the progression of a patterning process according to an embodiment of the present invention.

DESCRIPTION OF SOME EMBODIMENTS

[0019] FIGS. 1A-1D are schematic cross sectional views showing the progression of a patterning process according to an embodiment of the present invention.

[0020] Referring to FIG. 1A, a mask material layer 104 is formed over a material layer 102. The mask material layer 104 has an etch selectivity different from that of the material layer 102, wherein, the material layer 102 is formed over a substrate 100, for example. The material of the material layer 102 can be, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material. If the material layer 102 serves as a gate after subsequent patterning processes, a gate dielectric layer 106 can further be formed between the material layer 102 and the substrate 100. In addition, the material of the mask material layer 104 can be, for example, silicon oxide, silicon nitride, silicon oxynitride, polysilicon, doped polysilicon or a metal material. The material of the mask material layer 104 is not specific as long as the mask material layer 104 has an etch selectivity different from that of the material layer 102.

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Method of processing substrate, method of manufacturing solid-state imaging device, method of manufacturing thin film device, and programs for implementing the methods
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