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09/21/06 | 74 views | #20060208786 | Prev - Next | USPTO Class 327 | About this Page  327 rss/xml feed  monitor keywords

Method and device for clock synchronisation with a vestigial-sideband-modulated transmitted signal

USPTO Application #: 20060208786
Title: Method and device for clock synchronisation with a vestigial-sideband-modulated transmitted signal
Abstract: A method for clock synchronisation between an amplitude-modulated or phase-modulated received signal (r(t)) and a transmitted signal (s(t)) estimates the timing offset (ε) between the received signal (r(t)) and the transmitted signal (s(t)) by means of a maximum-likelihood method. The maximum-likelihood method in this context is realised by an estimation filtering (S40; S140) dependent upon the transmission characteristic, a subsequent nonlinear signal-processing function (S50; S150) and an averaging filtering (S60, S100; S180, S200). The received signal (r(t)) is especially a modified vestigial-sideband-modulated received signal (rVSB′(t)). The nonlinear signal-processing function (S50; S150) maintains the alternating component in the spectrum of the pre-filtered vestigial-sideband-modulated received signal (vVSB′(t)).
(end of abstract)
Agent: Ditthavong & Carlson, P.C. - Fairfax, VA, US
Inventors: Jochen Pliquett, Thomas Reichert
USPTO Applicaton #: 20060208786 - Class: 327354000 (USPTO)

The Patent Description & Claims data below is from USPTO Patent Application 20060208786.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords



[0001] The invention relates to a method and a device for clock synchronisation with a vestigial-sideband-modulated transmitted signal (VSB).

[0002] When transmitters and receivers are synchronised with one another within a transmission system, a transmitter-end and receiver-end adaptation of the clock signal and the carrier signal is implemented respectively with regard to the phase position and frequency. The clock synchronisation considered in the following paragraphs requires a clock recovery in the receiver, which can be realised with or without feedback.

[0003] In the case of a clock recovery with feedback, the clock phase and clock frequency is estimated on the basis of the received signal, and a frequency oscillator is re-tuned for phase-synchronous and frequency-synchronous sampling of the received signal at the correct inter-symbol, interference-free decision timings.

[0004] By contrast, in the case of clock recovery without feedback, the clock phase and clock frequency are estimated on the basis of the received signal sampled at a fixed sampling frequency, and the symbol value of the received signal, which is correct at the respective decision timing, is determined via an interpolator from the sampled values, which are adjacent at the respective inter-symbol-interference-free decision timings.

[0005] Regarding a clock recovery without feedback with a clock frequency, which is fixed and known to the receiver, a method based on the maximum-likelihood estimation for pulse-amplitude-modulated (PAM), quadrature-phase-modulated (QPSK) and .pi./4-quadrature-phase-modulated (.pi./4-QPSK) signals is already known from [1]: K. Schmidt: "Digital clock recovery for bandwidth-efficient mobile telephone systems" [Digitale Taktruckgewinnung fur bandbreiteneffiziente Mobilfunksysteme], 1994, ISBN 3-18-14 7510-6.

[0006] The maximum-likelihood estimation in this context is based on maximising the likelihood function, which minimises the square of the modulus error between a measured, noise-laden received signal and a modelled, ideally noise-free transmitted signal containing the sought timing offset over an observation period via an inverse exponential function. The sought timing offset is derived, when the modelled, transmitted signal approximates the measured, received signal with minimum modulus error squared.

[0007] As described in [1] and shown in greater detail below, the likelihood function is obtained from the received signal convoluted with the impulse response of a signal-adapted pre-filter, which is subjected, after pre-filtering, to a nonlinear function and then averaged over a limited number of symbols. As also demonstrated in [1], the nonlinear function can also be approximated by a modulus squaring. If the timing offset is determined in the time domain, the sought timing offset is derived from a maximum detection of the pre-filtered, modulus-squared and averaged received signal according to the maximum-likelihood function.

[0008] The disadvantage of an inaccurate and/or ambiguous maximum detection in the time domain, which results from inadequate removal of interference in the useful signal, can be avoided by an observation in the frequency domain. In the case of a determination of the timing offset in the frequency domain, the fact is exploited that the pre-filtered, modulus-squared received signal averaged over a limited number of symbols provides a basic periodicity over the symbol length and, respectively, with multiples of the symbol length, provides a maximum. Accordingly, after a discrete Fourier transformation of the pre-filtered, modulus-squared received signal averaged over a given number of symbols, the timing offset can be determined from the phase of the spectral line at the basic spectral frequency determined by the symbol frequency.

[0009] As will be shown in detail below, the frequency-domain-orientated determination of the timing offset outlined above fails with a vestigial-sideband-modulated received signal, because the VSB received signal provides no periodicity and no corresponding spectral lines, which are necessary for determining the timing offset in the frequency domain.

[0010] The invention is therefore based on the object of providing a method and a device for determining the timing offset in the frequency domain for the clock synchronisation of a vestigial-sideband-modulated (VSB) signal.

[0011] The object of the invention is achieved by a method for clock synchronisation with a vestigial-sideband-modulated (VSB) signal with the features of claim 1 and by a device for clock synchronisation with a vestigial-sideband-modulated (VSB) signal with the features according to claim 16. Advantageous further developments of the invention are specified in the dependent claims.

[0012] According to the invention, the symbol duration of the VSB signal is designed with one half of the symbol duration of a PAM, QPSK or .pi./4-QPSK signal. The invention also provides a down mixing of a VSB baseband received signal of this kind in order to form a modified VSB baseband received signal, which has identical signal behaviour to an offset QPSK signal.

[0013] Finally, instead of a modulus squaring, as in the case of a PAM, QPSK or .pi./4-QPSK signal, a squaring without modulus formation is implemented according to the invention as a nonlinear signal-processing function. The alternating components of the in-phase and the quadrature components of the pre-filtered, vestigial-sideband-modulated (VSB) baseband received signal are therefore constructively superimposed and lead to spectral lines, which can be identified by the subsequent, discrete Fourier transformation and supplied for subsequent spectral processing in order to determine the timing offset.

[0014] According to the invention, the discrete Fourier transformation of the pre-filtered, squared VSB baseband received signal, which has been averaged over a given number of symbols, is evaluated only at the positive and negative symbol frequency. Spectral lines of a higher value occurring periodically at the symbol frequency need not be taken into consideration, because no other harmonics are present in a Nyquist system with nonlinearity.

[0015] The carrier-frequency synchronisation, which is to be implemented on the received signal alongside the clock synchronisation, can be provided in cascade before or after the clock synchronisation. If the carrier frequency synchronisation according to the invention is carried out after the clock synchronisation, the pre-filtered, squared received signal, averaged over a given number of symbols, must be compensated by comparison with any carrier frequency offset and carrier phase offset, which may occur in the received signal, in order to achieve a correct determination of the timing offset of the clock pulse. With a positive symbol frequency, the Fourier transform of the received signal is therefore conjugated and then multiplied by the Fourier transform of the negative symbol frequency.

[0016] In an operational case affected by a carrier-frequency offset, since the spectral lines for a received signal free from a carrier-frequency offset coming to be disposed at the positive and negative symbol frequency are frequency-displaced at the positive or respectively negative symbol frequency by the carrier-frequency offset, the averaging filtering must be divided into a first averaging filtering with a second averaging filtering following the first averaging filtering. The throughput range of the first averaging filtering in this context should be designed so that the spectral line, frequency-displaced by the carrier-frequency offset relative to the positive or respectively negative symbol frequency, is registered by the first averaging filtering. The mid-frequencies of the first averaging filtering, realised as a Dirac comb in the time domain and correspondingly in the frequency domain as periodically-repeated Si functions, are therefore disposed respectively at multiples of the symbol frequency and provide a bandwidth, which corresponds to the maximum carrier-frequency offset to be anticipated. The large averaging length required for an optimum averaging of the pre-filtered and squared VSB baseband received signal, which accordingly determines a narrow-band averaging filtering and is therefore opposed to the bandwidth-expanded, first averaging filtering, is realised by the second averaging filtering, of which the averaging length is a multiple of the averaging length of the first averaging filtering and is therefore designed to have a substantially narrower band than the first averaging filtering.

[0017] In a first embodiment of the method according to the invention for clock synchronisation with a vestigial-sideband-modulated (VSB) signal and of the device according to the invention for clock synchronisation with a vestigial-sideband-modulated (VSB) signal, the first averaging filtering is implemented after the squaring, while the second averaging filtering takes place after the discrete Fourier transformation and conjugation or respectively multiplication of the Fourier transforms localised at the positive and negative symbol frequency, which follow the first averaging filtering.

[0018] In a second embodiment of the method according to the invention for clock synchronisation with a vestigial-sideband-modulated (VSB) signal and of the device according to the invention for clock synchronisation with a vestigial-sideband-modulated (VSB) signal, the first averaging filtering is implemented in each case following the discrete Fourier transformation or respectively conjugation and the second averaging filtering, after the multiplication of the two Fourier transforms averaged respectively with the first averaging filtering and localised at the positive or respectively negative symbol frequency.

[0019] The estimation filtering achieves a minimising of the data-dependent jitter in the VSB baseband received signal.

[0020] Finally, if the sideband of the VSB baseband received signal is disposed in the inverted position, the down mixing of the VSB baseband received signal is preceded by a mirroring of the sideband of the VSB baseband received signal from its inverted position into its normal position.

[0021] The two embodiments of the method according to the invention for clock synchronisation of the vestigial-sideband-modulated (VSB) signal and the device according to the invention for clock synchronisation of the vestigial-sideband-modulated (VSB) signal, are explained in greater detail below with reference to the drawings. The drawings are as follows:

[0022] FIG. 1 shows an expanded block circuit diagram of the transmission system;

[0023] FIG. 2 shows a reduced block circuit diagram of the transmission system;

[0024] FIG. 3 shows a circuit diagram of the device for clock synchronisation according to the prior art;

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