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Method and apparatus to confine plasma and to enhance flow conductanceRelated Patent Categories: Semiconductor Device Manufacturing: Process, Chemical Etching, Vapor Phase Etching (i.e., Dry Etching)Method and apparatus to confine plasma and to enhance flow conductance description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060172542, Method and apparatus to confine plasma and to enhance flow conductance. Brief Patent Description - Full Patent Description - Patent Application Claims
FIELD OF THE INVENTION [0001] The embodiments of the present invention generally relate to method and apparatus to confine plasma and to enhance flow conductance in plasma processing reactors. BACKGROUND OF THE INVENTION [0002] Plasma processing of semiconductor wafers in the manufacture of microelectronic integrated circuits is used in dielectric etching, metal etching, chemical vapor deposition and other processes. In semiconductor substrate processing, the trend towards increasingly smaller feature sizes and line-widths has placed a premium on the ability to mask, etch, and deposit material on a semiconductor substrate, with greater precision. [0003] Typically, etching is accomplished by applying radio frequency (RF) power to a working gas supplied to a low pressure processing region over a substrate supported by a support member. The resulting electric field creates a reaction zone in the processing region that excites the working gas into a plasma. The support member is biased to attract ions within the plasma towards the substrate supported thereon. Ions migrate towards a boundary layer of the plasma adjacent to the substrate and accelerate upon leaving the boundary layer. The accelerated ions produce the energy required to remove, or etch, the material from the surface of the substrate. As the accelerated ions can etch other components within the processing chamber, it is important that the plasma be confined to the processing region above the substrate. [0004] Unconfined plasmas cause etch-byproduct (typically polymer) deposition on the chamber walls and could also etch the chamber walls. Etch-byproduct deposition on the chamber walls could cause the process to drift. The etched materials from the chamber walls could contaminate the substrate by re-deposition and/or could create particles for the chamber. In addition, unconfined plasmas could also cause etch-byproduct deposition in the downstream areas. The accumulated etch-byproduct can flake off and result in particles. To reduce the particle issues caused by the deposition of etch-byproduct in the downstream areas, additional downstream clean is needed, which could reduce process throughput and increase processing cost. [0005] Confined plasmas could reduce chamber contamination, chamber cleaning and improve process repeatability (or reduce process drift). Plasma confinement devices, such as slotted plasma confinement ring (described below), have been developed to confine plasma. Certain front end of line (FEOL) applications, such as contact etch and high aspect ratio trench etch, require relatively low process pressure (e.g. .ltoreq.30 mTorr) under relatively high total gas flow rate (e.g. between about 900 sccm to about 1500 sccm). Plasma confinement devices, such as a slotted plasma confinement ring, could cause flow resistance for the gas flow to the downstream and results in pressure in the plasma chamber that is not low enough (e.g. .ltoreq.30 mTorr) for the FEOL applications described. [0006] Therefore, there is a need for an improved method and apparatus that not only confine plasma within a processing region inside the plasma chamber but also enhance flow conductance. SUMMARY OF THE INVENTION [0007] The embodiments of the present invention generally relate to a method and an apparatus to confine plasma and to enhance flow conductance in plasma processing reactors. In one embodiment, an apparatus configured to confine a plasma within a substrate processing region during processing a substrate in a plasma processing chamber comprises a substrate support having one or more dielectric layers, an annular ring surrounding the top portion of the substrate support, wherein there is a gap between the annular ring and process chamber walls having a gap width from about 0.8 inch to about 1.5 inch, and a dielectric seal placed between a top electrode and a process chamber body, wherein impedances of the top electrode, the dielectric seal, the substrate along with the substrate support, and plasma reduce a voltage supplied to the top electrode by a voltage ratio and supply the remaining voltage supplied to the top electrode at a negative phase at the substrate and the substrate support during plasma processing. [0008] In another embodiment, an apparatus configured to confine a plasma within a processing region in a plasma processing chamber comprises an annular ring surrounding the top portion of a substrate support, wherein there is a gap between the annular ring and process chamber walls with gap width equaling to or greater than about 0.8 inch and not greater than 1.5 inch. [0009] In another embodiment, an apparatus configured to confine a plasma within a substrate processing region during processing a substrate in a plasma processing chamber comprises a substrate support having one or more dielectric layers, a dielectric seal surrounding a top electrode, wherein impedances of the top electrode, the dielectric seal, the substrate along with the substrate support, and plasma reduce a voltage supplied to the top electrode by a voltage ratio and supply the remaining voltage supplied to the top electrode at a negative phase at the substrate and the substrate support during plasma processing. [0010] In another embodiment, a method of confining a plasma within a substrate processing region during substrate processing in a plasma processing chamber comprises placing a substrate on a substrate support in a plasma processing chamber with a top electrode, an annular ring surrounding the top portion of the substrate support with a gap between the annular ring and process chamber walls having a gap width from about 0.8 inch to about 1.5 inch, flowing process gas(es) into the plasma chamber, and creating a plasma in the plasma process chamber. [0011] In another embodiment, a method of confining a plasma within a substrate processing region during substrate processing in a plasma processing chamber comprises placing a substrate on a substrate support in a plasma processing chamber having a top electrode, a dielectric seal surrounding the top electrode, an annular ring surrounding the top portion of the substrate support with a gap between the annular ring and process chamber walls having a gap width from about 0.8 inch to about 1.5 inch, flowing process gas(es) into the plasma chamber, and creating a plasma in the plasma process chamber by supplying a voltage ratio of the voltage supplied to the top electrode and supplying the remaining voltage supplied to the top electrode at a negative phase at the substrate and the substrate support. [0012] In yet another embodiment, a method of confining a plasma within a substrate processing region during substrate processing in a plasma processing chamber comprises placing a substrate on a substrate support in a plasma processing chamber with a top electrode, and a dielectric seal surrounding the top electrode, flowing process gas(es) into the plasma chamber, and creating a plasma in the plasma process chamber by supplying a voltage at a voltage ratio of the voltage supplied to the top electrode and supplying the remaining voltage supplied to the top electrode at a negative phase at the substrate and the substrate support. BRIEF DESCRIPTION OF THE DRAWINGS [0013] So that the manner in which the above recited embodiments of the invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments. [0014] FIG. 1A shows the process flow of processing a substrate in a plasma chamber. [0015] FIG. 1B shows a schematic drawing of a plasma processing [0016] FIG. 2 (Prior Art) shows a schematic drawing of a slotted plasma confinement ring. [0017] FIG. 3A shows a schematic drawing of a plasma processing chamber with one embodiment of an annular plasma confinement ring in the process chamber. [0018] FIG. 3B shows a schematic drawing of a plasma processing chamber with another embodiment of an annular plasma confinement ring in the process chamber. [0019] FIG. 3C shows the simulated results of plasma density ratio and chamber pressure as a function of the gap width. [0020] FIG. 3D shows the simulated result of plasma density in the plasma processing chamber when the gap width between the annular ring and the chamber walls is 0.5 inch. Continue reading about Method and apparatus to confine plasma and to enhance flow conductance... Full patent description for Method and apparatus to confine plasma and to enhance flow conductance Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method and apparatus to confine plasma and to enhance flow conductance patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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