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  Method and apparatus for preventing microcircuit thermo-mechanical damage during an esd eventUSPTO Application #: 20060097323Title: Method and apparatus for preventing microcircuit thermo-mechanical damage during an esd event Abstract: A method and apparatus for preventing thermo-mechanical damage to an electrostatic discharge (ESD) protection device is disclosed. The method and apparatus of the invention use materials with superior thermo-mechanical properties, in particular, the Coefficient of Thermal Expansion (CTE), melting temperature, tensile strength and fracture toughness. The thermo-mechanical energy absorber materials are incorporated in, or replace, components of the ESD device that are susceptible to thermo-mechanical stress and cracking due to localized heating and thermal expansion. (end of abstract)
Agent: Myers Dawes Andras & Sherman, LLP - Irvine, CA, US Inventors: Vladimir Rodov, Wlodzimierz Woytek Tworzydlo USPTO Applicaton #: 20060097323 - Class: 257355000 (USPTO) Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode), With Overvoltage Protective Means The Patent Description & Claims data below is from USPTO Patent Application 20060097323. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention generally relates to microelectronic devices and methods of assembly and operation. In particular, the present invention relates to circuit configurations and methods designed to reduce the harmful effects of electrostatic discharge in such devices. [0003] 2. Description of the Related Art [0004] Electrostatic Discharge (ESD) is a significant problem in microelectronic devices and results from high voltage and/or current applied to the terminals of microelectronic devices by human or machine contact during the device manufacturing, assembly, transportation, storage or PC board mounting. The voltage and current spikes are typically of a very short duration and can cause breakdown of such devices, thus rendering them inoperable. This is a problem of increasing importance as smaller and smaller device dimensions render them more susceptible to damage. [0005] To protect microelectronic devices from the harmful effects of ESD, dedicated ESD protection circuits are commonly employed. Typically, such circuits are designed to divert ESD pulses from the device without affecting its performance under normal operating conditions. Nonetheless, in practice ESD impulses often destroy both the protection circuit and the protected device, even with ESD protection devices designed using state-of-the-art methods. [0006] One of the underlying reasons for failure of prior art ESD protection devices is that their design is based on an incomplete understanding of the mechanisms by which an ESD pulse destroys the device. It is commonly understood in the prior art that the damage due to ESD pulses happens via: [0007] 1. Electrical breakdown of electronic structure due to high current that changes the operating characteristics of the device followed by [0008] 2. thermal breakdown, wherein the high temperature induced by the pulse causes local current instabilities (e.g. filamentation) that leads to melting of the semiconductor, contacts and/or other elements of the device. [0009] For ESD protection circuits, it is the thermal breakdown that is typically used as the principal design criterion. However, experimental evidence indicates that there must exist other phenomena that contribute to failure of ESD protection circuits even before the melting point has been reached. This is confirmed by poor reliability and unpredictable performance of ESD protection circuits designed according to the prior art. [0010] Accordingly, in view of the problems and deficiencies of the prior art, a need exists to improve the reliability and performance of ESD protection devices, and additionally improve the survivability of microelectronic devices subjected to ESD events. Further, it is important that such an improved approach be relatively inexpensive to implement. SUMMARY OF THE INVENTION [0011] The present invention provides an integrated circuit incorporating an Electrostatic Discharge (ESD) protection device comprising a semiconductor substrate; an electrical contact pad; an ESD switch coupled to the pad also having an active device region formed in the semiconductor substrate; and a thermal energy absorbing region formed in the semiconductor substrate in thermal contact with the active device region made from a material substantially more resistant to thermo-mechanical expansion than the active device region. [0012] The material substantially more resistant to thermo-mechanical expansion preferably has a thermal expansion coefficient lower than approximately 5.times.10.sup.-6.degree. K.sup.-1, a melting temperature higher than approximately 2000.degree. K, a tensile strength higher than approximately 300 MPa (Mega Pascals), and a fracture toughness approximately higher than about 1.0 MPa m.sup.1/2. In a preferred embodiment, the ESD switch is a transistor (e.g. MOSFET structure) and the thermo-mechanical absorbing region is in direct contact with the active device region. A preferred MOSFET structure has an active device region that comprises: a source region; a drain region; and a channel region between the source region and the drain region. Alternatively, the ESD switch is a diode. [0013] The material substantially more resistant to thermo-mechanical expansion than the active device region may be selected from the group consisting of diamond, boron nitride, silicon carbide or carbon. The ESD switch itself may include a resistor or a capacitor. [0014] In another aspect the present invention provides an integrated circuit incorporating an Electrostatic Discharge (ESD) protection device comprising a semiconductor substrate; an electrical contact pad; a plurality of active devices formed on the substrate; a first connector formed of a first electrically conductive material connecting the plurality of active devices; and an ESD switch coupled to the pad, at least in part via a second connector. Further, the ESD switch has an active device region in the semiconductor substrate. The second connector is electrically connected to the ESD switch and comprises material more resistant to thermo-mechanical expansion than the first connector formed of the first electrical conductive material wherein the second connector extends away from the substrate a distance at least equal to one-half of the length of the active device region, the length being in the x-y direction, and not in the z-direction. The connector material substantially more resistant to thermo-mechanical expansion has a thermal expansion coefficient lower than approximately 10.times.10.sup.-6.degree. K, a melting temperature higher than approximately 1500.degree. K, a tensile strength higher than approximately 200 MPa (Mega Pascals), and a fracture toughness approximately higher than 1.0 MPa m.sup.1/2. Alternatively, the material resistant to thermo-mechanical expansion is composed primarily of titanium nitride (TiN), or primarily of carbon (C), or it is composed primarily of an alloy of aluminum (Al) and TiN. [0015] Another aspect of the invention provides an integrated circuit incorporating an Electrostatic Discharge (ESD) protection device comprising a semiconductor substrate; an electrical contact pad; a connector electrically connected to the electrical contact pad; and an ESD switch coupled to the pad, at least in part via the connector, said ESD switch having an active device region in the semiconductor substrate, and wherein said semiconductor substrate comprises a thermo-mechanical energy sink fabricated from material resistant to thermo-mechanical expansion, the material having physical properties including a low thermal expansion coefficient lower than approximately 5.times.10.sup.-6.degree. K.sup.-1, a high melting temperature approximately higher than 2000.degree. K, a high fracture toughness higher than about 1.0 MPa m.sup.1/2. In this embodiment, the Electrostatic Discharge (ESD) protection further comprising a grounded back contact electrically coupled to the semiconductor substrate, so that when an ESD event occurs producing an ESD current, the current is shunted from the ESD protection device through thermo-mechanical energy sink and through the grounded back contact. In a preferred embodiment, the active device region comprises the thermo-mechanical energy sink. Alternatively, the semiconductor substrate is fabricated from the material resistant to thermo-mechanical stress. The material resistant to thermo-mechanical expansion is selected from a group consisting of diamond, hard carbon or boron nitride. [0016] In another aspect, the invention provides an integrated circuit comprising a semiconductor substrate; a core circuit comprising a plurality of devices having electrical connectors and active device regions formed in the semiconductor substrate and one or more electrical insulator regions; and an ESD circuit comprising an active device having an active device region formed in a substrate material, one or more electrical connectors, and one or more electrical insulator regions, and one or more passive circuit components. At least one of the substrate material, electrical connectors, active device region, passive circuit components or electrical insulator is composed in whole or in part of a material substantially more resistant to thermo-mechanical damage than the corresponding structure in the core circuit devices. The passive circuit component may be a resistor or a capacitor. In one embodiment, the ESD switch is spaced apart from the core circuitry by at least 10 microns. The material more resistant to the thermo-mechanical damage comprises a material having a substantially lower coefficient of thermal expansion, and at least one of connectors of the ESD circuit comprises carbon. [0017] In another aspect, the invention provides an integrated circuit, comprising a semiconductor substrate; a core circuit comprising a plurality of devices having electrical connectors and active device regions formed in the semiconductor substrate and one or more electrical insulator regions; and an ESD switch having means, integrated with the switch structure, for preventing thermo-mechanical damage due to an ESD event. [0018] In another aspect, the invention provides a method of fabricating an ESD device on a semiconductor substrate, the method comprising fabricating an ESD switch from one or more connectors and one or more active device regions formed in the semiconductor substrate; providing a region composed of a material resistant to thermo-mechanical expansion, the region in thermal contact with said switch, wherein the material has physical properties including a low thermal expansion coefficient lower than approximately 5.times.10.sup.-6.degree. K.sup.-1. The material used in the method has material having physical properties further including a high melting temperature higher than approximately 2000.degree. K, a high tensile strength higher than approximately 300 MPa (Mega Pascals), a high fracture toughness higher than approximately 1.0 MPa m.sup.1/2. [0019] Further objects, advantages and features of the present invention will become apparent to those skilled in the art from the following detailed description, when read in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0020] FIG. 1 is a cross-sectional illustration of a prior art integrated circuit incorporating an electrostatic discharge (ESD) protection device that has undergone thermo-mechanical damage due to an ESD event; [0021] FIG. 2 is a circuit block diagram of a microelectronic circuit employing improved ESD protection in accordance with the present invention; [0022] FIG. 3 is an illustration showing a vertical portion of a cross section of the microelectronic circuit of FIG. 2; [0023] FIG. 4 is a circuit block diagram of another microelectronic circuit layout employing improved ESD protection in accordance with the present invention; Continue reading... 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