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  Method and apparatus for nitride spacer etch process implementing in situ interferometry endpoint detection and non-interferometry endpoint monitoringUSPTO Application #: 20060040415Title: Method and apparatus for nitride spacer etch process implementing in situ interferometry endpoint detection and non-interferometry endpoint monitoring Abstract: An in situ dual-stage etch endpoint detection system is disclosed. The system includes an etch chamber, an interferometry endpoint monitoring system, and a non-IEP endpoint monitoring system. The etch chamber includes an electrostatic chuck (ESC), a top electrode, and a bottom electrode. The ESC is designed to support a wafer having a spacer layer formed over a gate structure. The interferometry endpoint (IEP) monitoring system is designed to monitor an interference photon beam reflected by the top of spacer layer and the reflection beam on interface of bottom of spacer during a first etch operation. The non-IEP endpoint monitoring system monitors a second etch operation by monitoring an etch time. A first etch operation implementing the IEP monitoring system is discontinued, leaving a thin spacer layer to be etched during the second etch operation. (end of abstract) Agent: Martine Penilla & Gencarella, LLP - Sunnyvale, CA, US Inventors: Wen-Ben Chou, Shih-Yuan Cheng, Wayne Tu USPTO Applicaton #: 20060040415 - Class: 438009000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Including Control Responsive To Sensed Condition, Optical Characteristic Sensed, Chemical Etching, Plasma Etching The Patent Description & Claims data below is from USPTO Patent Application 20060040415. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a of U.S. patent application Ser. No. 09/998,858, filed on Oct. 31, 2001, from which priority under 35 U.S.C. .sctn. 120 is claimed. The disclosure of this application is incorporated herein by reference in its entirety. BACKGROUND [0002] The present invention relates generally to the fabrication of semiconductor devices and, more particularly, to improving the fabrication of spacers by enhancing the etch endpoint detection of a nitride layer. DESCRIPTION OF THE RELATED ART [0003] As is well known, the semiconductor manufacturing process involves several stages during which millions of transistors including source/drain diffusion regions, a conductive polysilicon gate, and a dielectric gate oxide are fabricated on a single semiconductor chip. One of such fabrication stages is the silicon nitride spacer etch process during which a conformal layer of silicon nitride is deposited on a surface of the substrate having fabricated transistors. This silicon nitride layer is subsequently etched utilizing a plasma etch process, creating silicon nitride spacers alongside the polysilicon gates. [0004] As the demand for scaling down the integrated devices and thus feature sizes such as spacers is continuously increasing, so is the need for implementing a more controllable etch process. However, this need is specifically more pronounced during the one step silicon nitride spacer etch process as the aggressive nature of the etch chemistry implemented inevitably results in gate oxide punch through leading to changes in gate oxide dimensions. As is well known, changes to the gate oxide are disfavored since they modify the electrical conductivity of the gate oxide and thus the transistor. [0005] Predominantly, the silicon nitride layer is removed through implementing a one-step plasma etching method (e.g., dry etching). The plasma etching process is typically performed in a plasma chamber in which strong electrical fields cause high energy gases containing positively charged ions and negatively charged electrons to be accelerated toward the exposed surface of the silicon nitride layer. During the one-step plasma etching process, the exposed layer of silicon nitride is chemically and physically removed as a result of being bombarded with positive ions. [0006] Preferably, the one-step etching process of the silicon nitride layer must stop once it has been determined that the silicon nitride material has been etched through and removed from over the surface of the substrate. Additionally, this one-step etch process must be achieved without damaging the underlying layer. Consequently, to accommodate this goal, it is imperative to implement an endpoint detection method capable of stopping the one-step etch process once the silicon nitride layer has been etched through. [0007] Thus far, optical emission spectroscopy (OES) method has been primarily utilized for detecting the etch endpoint. In this method, the light emitted by the gases within the etch reactant chamber is used to identify the specific material being etched. As the light emission intensity is directly proportional to the concentration of a specific gas within the etch reactant chamber, the endpoint detector can in theory determine when the etching of the silicon nitride material has concluded. [0008] Thus far, however, the OES method has proven to be less than reliable and efficient etch endpoint detection as it causes the overetching or underetching of the silicon nitride layer, rendering the outcome of the one-step etch process unpredictable. Specifically, this occurs due to the variation in thickness of the silicon nitride layers between wafers of the same lot as well as the wafers of different lots. For instance, the overetching of the silicon nitride layer during the one-step etch process using the predominantly used aggressive chemistry causes the removal of portions of the gate oxide or ultimately, in gate oxide punch through. [0009] Unfortunately, the unreliability and unpredictability associated with the OES method has a severe negative impact on fabrication stages and thus semiconductor manufacturing. Among others, the unpredictability mandates the close monitoring of the one-step etch process, multiple inspections of the semiconductor substrate during the one-step etching operation, necessity to recalibrate the tools for each substrate within the same lot as well as different lots, thus needlessly wasting valuable time, slowing down the production, yield loss, and ultimately semiconductor substrate throughput. [0010] In view of the foregoing, a need exists for a spacer etch endpoint detection methodology and apparatus that eliminates the unpredictability and unreliability associated with the conventional optical emission spectroscopy (OES) etch endpoint detection method used during the one-step etch process while increasing semiconductor substrate throughput. SUMMARY [0011] Broadly speaking, the present invention fills these needs by providing an apparatus and methodology for fabricating nitride spacers utilizing an in-situ two-step etch process capable of substantially precisely controlling the etch process as well as the shape of the nitride spacers. In one preferred embodiment, the nitride spacers are fabricated by performing a main etch process on a nitride spacer layer using the interferometry endpoint detection method. The main etch process is then followed by an overetch process wherein the thin layer of nitride spacer is etched. In one embodiment, the thin layer of nitride spacer is etched implementing a time mode etch method utilizing a highly selective etch chemistry. In another example, the overetch process is a timed-etch method implementing a non-IEP etch endpoint detection method to monitor the process parameters. In one embodiment, the non-IEP etch endpoint detection method configured to monitor the process parameters is optical emission spectroscopy (OES) implementing a highly selective etch chemistry. [0012] It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below. [0013] In one embodiment, an in situ dual-stage etch endpoint detection system is disclosed. The system includes an etch chamber, an interferometry endpoint monitoring system, and a non-IEP endpoint monitoring system. The etch chamber is configured to include an electrostatic chuck (ESC), a top electrode, and a bottom electrode. The ESC is designed to support a wafer having a spacer layer formed over a gate structure. The interferometry endpoint (IEP) monitoring system is designed to monitor an interference photon beam reflected by the top of spacer layer and the reflection beam on interface of bottom of spacer during a first etch operation. The non-IEP endpoint monitoring system is configured to monitor a second etch operation by monitoring an etch time. A first etch operation implementing the IEP monitoring system is configured to be discontinued, leaving a thin spacer layer to be etched during the second etch operation. [0014] In another embodiment, a method for fabricating a spacer of a gate structure is disclosed. The method includes performing a first etch process implementing a first etchant gas. The first etch process is designed to implement an interferometry endpoint (IEP) detection method to detect the removal of a portion of a spacer layer. Further included in the method is discontinuing the first etch process upon removing the portion of the spacer layer, thus leaving a thin spacer layer. The method also includes performing a second etch process implementing a second etchant gas to remove the thin spacer layer. Also included is discontinuing the second etch process when the second etch process has continued for a predetermined period of time. The second etch process is configured to remove the thin spacer layer, leaving the spacer for the gate structure. [0015] In still another embodiment, a method for fabricating a spacer of a gate structure is disclosed. The method includes performing a first etch process implementing a first etchant gas. The first etch process is configured to implement an interferometry endpoint (IEP) detection method to detect a removal of a portion of a spacer layer having a specific thickness from over the surface of the substrate, thus leaving a thin spacer layer. The method further includes performing a second etch process for a predetermined period of time implementing a second etchant gas. The second etch process is configured to remove the thin spacer layer, leaving the spacer for the gate structure. [0016] In yet another embodiment, a method for forming a silicon nitride spacer is disclosed. The method includes depositing a silicon nitride spacer layer over a substrate having a gate structure formed thereon. Also included is performing a first etch operation on the silicon nitride spacer layer in a plasma chamber and monitoring a light reflected by the silicon nitride spacer layer. The method further includes stopping the first etch operation so as to leave a thin spacer layer over the surface of the substrate and the gate structure formed thereon. Also included are purging a first plasma content defined within the plasma chamber and performing a second etch operation in the plasma chamber. The second etch operation is configured to remove the thin spacer layer. The method further includes monitoring an optical signal produced by a second plasma during the second etch operation and discontinuing the second etch operation once the second etch operation has continued for a predetermined period of time. The first etch operation and the second etch operation are performed in situ so as to control a shape of nitride spacers and a removal of the spacer layer. [0017] The advantages of the present invention are numerous. Most notably, the embodiments of the present invention are configured to perform the spacer etch process in two stages, in situ. Another advantage of the present invention is that the nitride spacer etch process can precisely control the etch endpoint as well as the shape of the spacers. Yet another benefit of the present invention is that the two-step in situ spacer etch process of the present invention can be used to accurately etch spacer layers having different thickness, thus reducing defects in wafers and increasing throughput. Still another advantage of the present invention is that the two-step in situ spacer etch process increases tool reliability and production yield. [0018] Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS [0019] The present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings, and like reference numerals designate like structural elements. Continue reading... Full patent description for Method and apparatus for nitride spacer etch process implementing in situ interferometry endpoint detection and non-interferometry endpoint monitoring Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method and apparatus for nitride spacer etch process implementing in situ interferometry endpoint detection and non-interferometry endpoint monitoring patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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