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Method and apparatus for decision-feedback equalization using single-sided eye with global minimum convergence

USPTO Application #: 20080080611
Title: Method and apparatus for decision-feedback equalization using single-sided eye with global minimum convergence
Abstract: Methods and apparatus are provided for decision-feedback equalization with global minimum convergence. A threshold position of one or more DFE latches employed by a decision-feedback equalizer is determined by obtaining a plurality of samples of a single-sided data eye using at least one decision latch and at least one roaming latch; comparing the samples obtained by the at least one decision latch and at least one roaming latch to identify an upper and lower voltage boundary of the single-sided data eye; and determining a threshold position of the one or more DFE latches based on the upper and lower voltage boundaries. The comparison can optionally comprise obtaining an exclusive or (XOR) of the samples obtained by the at least one decision latch and at least one roaming latch. The XOR comparison positions an opening for the single-sided data eye at a zero hit count
(end of abstract)
Agent: Ryan, Mason & Lewis, LLP - Fairfield, CT, US
Inventors: Mohammad S. Mobin, Gregory W Sheets, Lane A. Smith, Paul H. Tracy
USPTO Applicaton #: 20080080611 - Class: 375233 (USPTO)

The Patent Description & Claims data below is from USPTO Patent Application 20080080611.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001]The present application is a continuation-in-part application of U.S. patent application Ser. No. 11/540,946, filed Sep. 29, 2006, entitled "Method and Apparatus for Determining Latch Position for Decision-Feedback Equalization Using Single-Sided Eye," and is related to U.S. patent application Ser. No. 11/414,522, filed Apr. 28, 2006, entitled "Method and Apparatus for Determining a Position of a Latch Employed for to Decision-Feedback Equalization," and U.S. patent application Ser. No. 11/541,379, filed Sep. 29, 2006, entitled "Method and Apparatus for Non-Lineal Decision-Feedback Equalization in the Presence Of Asymmetric Channel," each incorporated by reference herein.

FIELD OF THE INVENTION

[0002]The present invention relates generally to decision-feedback equalization techniques, and more particularly, to techniques for determining the position of one or more latches employed for decision-feedback equalization.

BACKGROUND OF THE INVENTION

[0003]Digital communication receivers must sample an analog waveform and then reliably detect the sampled data. Signals arriving at a receiver are typically corrupted by intersymbol interference (ISI), crosstalk, echo, and other noise. In order to compensate for such channel distortions, communication receivers often employ well-known equalization techniques. For example, zero equalization or decision-feedback equalization (DFE) techniques (or both) are often employed. Such equalization techniques are widely-used for removing intersymbol interference and to improve the noise margin. See, for example, R. Gitlin et al., Digital Communication Principles, (Plenum Press, 1992) and E. A. Lee and D. G. Messerschmitt, Digital Communications, (Kluwer Academic Press, 1988), each incorporated by reference herein. Generally, zero equalization techniques equalize the pre-cursors of the channel impulse response and decision-feedback equalization equalizes the post cursors of the channel impulse response.

[0004]In one typical DFE implementation, a received signal is sampled and compared to one or more thresholds to generate the detected data. A DFE correction is applied in a feedback fashion to produce a DFE corrected signal. The addition/subtraction, however, is considered to be a computationally expensive operation. Thus, a variation of the classical DFE technique, often referred to as Spatial DEE, eliminates the analog adder operation by sampling the received signal using two (or more) vertical slicers that are offset from the common mode voltage. The two slicers are positioned based on the results of a well-known Least Mean Square (LMS) algorithm. One slicer is used for transitions from a binary value of 0 and the second slicer is used for transitions from a binary value of 1. The value of the previous detected bit is used to determine which slicer to use for detection of the current bit. For a more detailed discussion of Spatial DFE techniques, see, for example, Yang and Wu, "High-Performance Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer Scheme," IEEE Signal Processing Systems 2002, 121-26 (2002), incorporated by reference herein.

[0005]A communication channel typically exhibits a low pass effect on a transmitted signal. Conventional channel compensation techniques attempt to open the received data eye that has been band limited by the low pass channel response. Thus, the various frequency content of the signal will suffer different attenuation at the output of the channel. Generally, the higher frequency components of a transmitted signal are impaired more than the lower frequency components.

[0006]In many DFE applications, the Least Mean Square algorithm positions the vertical slicers by evaluating an error term for a known receive data stream. Such known receive data streams, however, are not always available. In addition, such techniques often converge to a local minimum, producing sub-optimal results. In some cases, such techniques can converge to he wrong adapted latch position values. A need exists for improved methods and apparatus for decision-feedback equalization with global minimum convergence. A further need exists for methods and apparatus that position one or more DFE latches using global minimum convergence and an evaluation of the incoming data eye.

SUMMARY OF THE INVENTION

[0007]Generally, methods and apparatus are provided for decision-feedback equalization with global minimum convergence. According to one aspect of the invention, a threshold position of one or more DFE latches employed by a decision-feedback equalizer is determined by obtaining a plurality of samples of a single-sided data eye using at least one decision latch and at least one roaming latch; comparing the samples obtained by the at least one decision latch and at least one roaming latch to identify an upper and lower voltage boundary of the single-sided data eye; and determining a threshold position of the one or more DFE latches based on the upper and lower voltage boundaries. The comparison can optionally comprise obtaining an exclusive or (XOR) of the samples obtained by the at least one decision latch and at least one roaming latch. The XOR comparison positions an opening for the single-sided data eye at a zero hit count.

[0008]The at least one decision latch is adaptively positioned approximately in a center of a single-sided data eye. In one implementation, a first decision latch is adaptively positioned approximately in a center of an upper single-sided data eye and a second decision latch is adaptively positioned approximately in a center of a lower single-sided data eye. The at least one roaming latch samples the single-sided data eye for a plurality of voltage settings. For example, at least two of the roaming latches can sample a portion of the single-sided data eye for a plurality of voltage settings.

[0009]A more complete understanding of the present invention, as well as further features and advantages of the present invention, will be obtained by reference to the following detailed description and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010]FIG. 1 illustrates an exemplary transition trajectory from an exemplary binary value of 0 to a binary value of 0 or 1;

[0011]FIG. 2 illustrates the noise and timing margins for a received signal;

[0012]FIG. 3 illustrates the sampling of a signal using a data eye monitor for a transition from a binary value of 1 to a binary value of 0 or 1;

[0013]FIG. 4 illustrates the sampling of a signal using a data eye monitor for a transition from a binary value of 0 to a binary value of 0 or 1;

[0014]FIG. 5 illustrates a histogram indicating an eye opening for a single sided eye in accordance with the embodiment of FIG. 4;

[0015]FIG. 6 illustrates the sampling of a signal using a data eye monitor in accordance with the present invention;

[0016]FIG. 7 illustrates an exemplary implementation of a decision latch of FIG. 6 using two DFE decision latches that produce data decisions that are used as a pre-qualifier for a previous eye and to compare values with roaming decisions for a current eye;

[0017]FIG. 8 illustrates the statistics generated by the hit counter of FIG. 6; and

[0018]FIG. 9 provides exemplary pseudo code for an illustrative vertical eye search algorithm incorporating features of the present invention.

DETAILED DESCRIPTION

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