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Method and apparatus for dc offset calibrationRelated Patent Categories: Telecommunications, Receiver Or Analog Modulated Signal Frequency Converter, Noise Or Interference EliminationMethod and apparatus for dc offset calibration description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070184803, Method and apparatus for dc offset calibration. Brief Patent Description - Full Patent Description - Patent Application Claims BACKGROUND [0001] The present invention relates generally to radio frequency (RF) receivers, and more particularly to removal of DC offset in a direct downconversion RF receiver. [0002] In many wireless communication formats no information is provided at DC, and DC offset may not directly corrupt received information. Nevertheless, presence of DC offset may reduce the effective dynamic range of the receiver, and potentially can be sufficiently large that signal processing circuitry is unable to distinguish information in a received message. Accordingly, RF receivers often include circuitry for reducing DC offset. [0003] DC offset may arise from a number of sources. These sources include DC offset caused by mixers and DC offset caused by nonidealities in the baseband amplification stage. DC offset from a mixer can arise, for example, due to leakage from one port of a mixer to another. Often DC offset is most pronounced with respect to leakage of a local oscillator signal, and may vary from receiver to receiver due to random variations in the manufacturing process resulting in different parasitic leakage levels. Similarly, in the baseband amplification stage nonidealities in manufacture and variations of component characteristics with temperature may result in introduction of spurious DC components into a received signal. [0004] Complicating efforts to remove DC offsets, DC offset may be dependent upon operation frequency, level of amplification of the received signal, and temperature, and in many instances RF receivers are required to receive signals over a wide range of frequencies, over a wide range of received signal strengths, and over wide temperature ranges. In addition, some communication formats provide for frequency hopping patterns, with little delay between frequency hops. In some such instances, recalibration or selection of different gain settings between frequency hops may be difficult in the allotted time. [0005] In superheterodyne receivers an intermediated frequency signal may be filtered to reduce DC offset. In direct downconversion receivers, however, filtering of intermediate frequency is generally not available as the signal is generally downconverted directly to baseband. Moreover, the filtering of the intermediate frequency signal is often performed using surface acoustic wave (SAW) filters. However, SAW filters are often relatively large and expensive. Eliminating SAW filters from an RF receiver architecture allows for smaller form factors, lower power consumption and a reduced bill of materials. SUMMARY OF THE INVENTION [0006] The invention provides method and apparatus for DC offset calibration. In one aspect the invention provides a differential amplifier with DC offset reduction circuitry, comprising a differential amplifier comprising a pair of transistors having their sources coupled to a current source and their drains each coupled to a resistance, differential amplifier adapted to receive a differential input at gates of the pair of transistors; and an adjustable current generator coupled to a drain of one of the transistors of the pair of transistors. [0007] In another aspect the invention provides an amplifier chain including DC offset reduction capability, comprising a plurality of differential amplifiers coupled in series, each of the differential amplifiers having an adjustable current generator coupled to a drain of at least one transistor of a differential transistor pair, and at least some of the differential amplifiers having a circuit path for selectively shunting current away from the differential transistor pair in response to a selection signal. [0008] In another aspect the invention provides a radio frequency (RF) receiver, comprising at least one mixer configured to downconvert an RF signal to a baseband signal; an amplifier chain coupled to the at least one mixer, the amplifier chain comprising a plurality of differential amplifiers coupled in series, each of the differential amplifiers having an adjustable current generator coupled to a drain of at least one transistor of a differential transistor pair, and at least some of the differential amplifiers having a circuit path for selectively shunting current away from the differential transistor pair in response to a selection signal; and processing circuitry configured to command adjustment of the adjustable current generators and to command selectively shunting of current away from the differential transistor pairs. [0009] In another aspect the invention provides a method for reducing DC offset in a radio frequency (RF) receiver, comprising evaluating a signal indicative of an output of a circuit element; and commanding a change in current generation by a current generator associated with the circuit element based on the evaluation of the signal indicative of the circuit element. [0010] In another aspect the invention provides A method of reducing DC offset in a radio frequency (RF) receiver, comprising effectively zeroing inputs to an amplifier in a chain of amplifiers; and commanding a change in current generation by a current generator associated with the amplifier based on a signal indicative of an output of the amplifier. [0011] These and other aspects of the invention are more fully comprehended upon consideration of the drawings and description herein BRIEF DESCRIPTION OF THE DRAWINGS [0012] FIG. 1 is a semi-schematic semi-block diagram of a transceiver in accordance with aspects of the invention; [0013] FIG. 2 is a semi-schematic semi-block diagram of a programmable gain amplifier in accordance with aspects of the invention; [0014] FIG. 3 is a semi-schematic semi-block diagram of a simplified representation of a programmable gain amplifier in accordance with aspects of the invention; [0015] FIG. 4 is a block diagram of an amplifier chain in accordance with aspects of the invention; [0016] FIG. 5 is a flow diagram of a calibration process in accordance with aspects of the invention; [0017] FIG. 6 is a block diagram showing an nth stage undergoing calibration in accordance with aspects of the invention; [0018] FIG. 7 is a block diagram of an nth-l stage undergoing calibration in accordance with aspects of the invention; and [0019] FIG. 8 is a block diagram of a portion of a receiver chain in accordance with aspects of the invention. DETAILED DESCRIPTION [0020] FIG. 1 shows an architecture for an RF transceiver. The RF transceiver includes a transmit chain 111 and a receive chain 113. Both the transmit chain and the receive chain includes circuitry for in-phase and quadrature components. Further, both the transmit chain and the receive chain are band selectable from a plurality of operational frequency bands, with the transmit and receive chains as shown both making use of a plurality of local oscillators, each providing mixing signals about a different frequency. Continue reading about Method and apparatus for dc offset calibration... Full patent description for Method and apparatus for dc offset calibration Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Method and apparatus for dc offset calibration patent application. ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Method and apparatus for dc offset calibration or other areas of interest. ### Previous Patent Application: Method and device for cancelling interferences Next Patent Application: Portable audio device having reduced sensitivity to rf interference and related methods Industry Class: Telecommunications ### FreshPatents.com Support Thank you for viewing the Method and apparatus for dc offset calibration patent info. IP-related news and info Results in 0.15318 seconds Other interesting Feshpatents.com categories: Qualcomm , Schering-Plough , Schlumberger , Seagate , Siemens , Texas Instruments , 174 |
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