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Matthew Nowak patents

Recent patents with Matthew Nowak listed as an inventor - additional entries may be under other spellings.


Matthew Nowak - Related organizations: Qualcomm Incorporated patents, Qualcomm Mems Technologies, Inc. patents, Qualcomm, Inc. patents

Low cost interposer comprising an oxidation layer

10/16/14 - 20140306349 - Some implementations provide an interposer that includes a substrate, a via in the substrate, and an oxidation layer. The via includes a metal material. The oxidation layer is between the via and the substrate. In some implementations, the substrate is a silicon substrate. In some implementations, the oxidation layer is
Inventors: Shiqun Gu, Urmi Ray, Roawen Chen, Brian Matthew Henderson, Ratibor Radojcic, Matthew Nowak, Nicholas Yu

Magnetic tunnel junction (mtj) and methods, and magnetic random access memory (mram) employing same

05/30/13 - 20130134533 - Magnetic tunnel junctions (MTJs) and methods of forming same are disclosed. A pinned layer is disposed in the MTJ such that a free layer of the MTJ can couple to a drain of an access transistor when provided in a magnetic random access memory (MRAM) bitcell. This structure alters the
Inventors: Xiaochun Zhu, Matthew Nowak, Xia Li, Seung H. Kang

Electromechanical systems oscillator with piezoelectric contour mode resonator for multiple frequency generation

11/15/12 - 20120286886 - Electromechanical systems resonator structures, devices, circuits, and systems are disclosed. In one aspect, an oscillator includes an active component and a passive component connected in a feedback configuration. The passive component includes one or more contour mode resonators (CMR). A CMR includes a piezoelectric layer disposed between a first conductive
Inventors: Jonghae Kim, Je-hsiung Lan, Changhan Yun, Chi Shun Lo, Matthew Nowak

Piezoelectric resonators and fabrication processes

11/01/12 - 20120274647 - This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a sacrificial layer is deposited on an insulating substrate. A lower electrode layer is formed proximate the sacrificial layer. A piezoelectric layer is deposited on the lower electrode layer. An upper electrode
Inventors: Je-hsiung Lan, Sang-june Park, Jonghae Kim, Evgeni Gousev, Matthew Nowak, Philip J. Stephanou, Justin Black, Kurt Petersen, Srinivasan Ganapathi

Capacitive mems-based display with touch position sensing

06/21/12 - 20120154333 - A micro-electro-mechanical systems (MEMS) pixel for display and touch position sensing includes a substrate and a capacitive element. The capacitive element includes one or more pixels having a first conductive platelet above the substrate, and a second conductive platelet above and spaced apart from the first conductive platelet, the two
Inventors: Shiqun Gu, Matthew Nowak

Systems and methods for enabling esd protection on 3-d stacked devices

03/15/12 - 20120061804 - An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD
Inventors: Kenneth Kaskoun, Shiqun Gu, Matthew Nowak

Three dimensional inductor, transformer and radio frequency amplifier

03/08/12 - 20120056680 - A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer;
Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-eoan, Seyfollah S. Bazarjani, Matthew Nowak

Techniques for placement of active and passive devices within a chip

02/16/12 - 20120040509 - A method for manufacturing a semiconductor device includes fabricating an active layer on a first side of a semiconductor substrate. The method also includes fabricating a metal layer on a second side of the semiconductor substrate. The metal layer includes a passive device embedded within the metal layer. The passive
Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Matthew Nowak

Techniques for placement of active and passive devices within a chip

01/05/12 - 20120001297 - A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal
Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Matthew Nowak

Software programmable logic using spin transfer torque magnetoresistive devices

10/20/11 - 20110254587 - Systems, circuits and methods for software programmable logic using Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) technology are disclosed. Magnetic tunnel junction (MTJ) storage elements can be formed into input planes and output planes. The input planes and output planes can be coupled together to form complex arrays that
Inventors: Lew Chua-eoan, Matthew Nowak, Seung H. Kang

Three dimensional inductor and transformer

04/14/11 - 20110084765 - A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of
Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-eoan, Seyfollah S. Bazarjani, Matthew Nowak

Transformer signal coupling for flip-chip integration

03/03/11 - 20110050357 - Methods and apparatuses for transformer signal coupling for flip-chip circuit assemblies are presented. A device for coupling dies in flip-chip circuit assembly may include a first die associated with a first fabrication process and a first inductor physically coupled to the first die, where the first inductor receives an RF
Inventors: Jonghae Kim, Feng Wang, Matthew Nowak

Method and apparatus for providing through silicon via (tsv) redundancy

11/25/10 - 20100295600 - An apparatus includes a first die having a first bus, a second die having a second bus stacked on the first die, a plurality of through silicon vias connecting the first bus to the second bus, and first control logic for sending data to identified ones of the plurality of
Inventors: Jonghae Kim, Feng Wang, Matthew Nowak

Magnetic film enhanced inductor

09/09/10 - 20100225435 - An integrated magnetic film enhanced inductor and a method of forming an integrated magnetic film enhanced inductor are disclosed. The integrated magnetic film enhanced inductor includes an inductor metal having a first portion and a second portion, a top metal or bottom metal coupled to the inductor metal, and an
Inventors: Inventors: Xiaochun Zhu, Matthew Nowak, Xia Li, Seung H. KangXiaochun Zhu, Matthew Nowak, Xia Li, Seung H. Kang, Xia Li, Matthew Nowak, Seung H. Kang, Brian Matthew Henderson

Software programmable logic using spin transfer torque magnetoresistive devices

08/05/10 - 20100194431 - Systems, circuits and methods for software programmable logic using Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) technology are disclosed. Magnetic tunnel junction (MTJ) storage elements can be formed into input planes and output planes. The input planes and output planes can be coupled together to form complex arrays that
Inventors: Lew Chua-eoan, Matthew Nowak, Seung H. Kang

Techniques for placement of active and passive devices within a chip

08/05/10 - 20100193905 - A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal
Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Matthew Nowak

Button sensor

07/29/10 - 20100191072 - A hermetically sealed electronic closure device, or button, includes a self-renewing power source, a sensor for measuring a metric, a memory storing information, a data processing circuit for controlling operations of the device, and a transceiver for sending and receiving information. The device is a standard part of a clothing
Inventors: Barry Alan Matsumori, Kenneth Kaskoun, Matthew Nowak, Nicholas Yu

Wireless branding

07/08/10 - 20100174661 - A device wirelessly broadcasts branding information associated with a consumer product attached to the device. The branding information is sent to a receiver located remotely from the product.
Inventors: Kenneth Kaskoun, Barry Matsumori, Nicholas Yu, Matthew Nowak

Magnetic tunnel junction and method of fabrication

04/29/10 - 20100102404 - In a particular embodiment, a method of forming a magnetic tunnel junction (MTJ) device includes applying a dielectric layer to a surface, applying a metal layer to the dielectric layer, and adding a cap layer on the dielectric layer. The method also includes forming a magnetic tunnel junction (MTJ) stack
Inventors: Xia Li, Seung H. Kang, Xiaochun Zhu, Kangho Lee, Matthew Nowak

Systems and methods for enabling esd protection on 3-d stacked devices

03/11/10 - 20100059869 - An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD
Inventors: Kenneth Kaskoun, Shiqun Gu, Matthew Nowak

Predictive modeling of contact and via modules for advanced on-chip interconnect technology

03/04/10 - 20100057411 - A computer program product estimates performance of a back end of line (BEOL) structure of a semiconductor integrated circuit (IC). Code executes on a computer to dynamically predict an electrical resistance of the BEOL structure based on input data specific to multiple layers of the BEOL structure. The BEOL structure
Inventors: Xia Li, Wei Zhao, David Bang, Yu Cao, Seung H. Kang, Matthew Nowak

Capacitive mems-based display with touch position sensing

02/25/10 - 20100045630 - A micro-electro-mechanical systems (MEMS) pixel for display and touch position sensing includes a substrate and a capacitive element. The capacitive element includes one or more pixels having a first conductive platelet above the substrate, and a second conductive platelet above and spaced apart from the first conductive platelet, the two
Inventors: Shiqun Gu, Matthew Nowak

Corrosion control of stacked integrated circuits

02/18/10 - 20100038801 - A system and method prevent corrosive elements (or at least the oxidizing agent) from making contact with metal connections at the interface between two layers of a stacked IC device. When layers are positioned in proximity to each other, a cavity is formed at the boundary of the planar surfaces
Inventors: Shiqun Gu, Matthew Nowak

Predictive modeling of interconnect modules for advanced on-chip interconnect technology

12/31/09 - 20090327983 - A computer program product estimates performance of an interconnect structure of a semiconductor integrated circuit (IC). The program product includes code executing on a computer to calculate at least one electrical characteristic of the interconnect structure based on input data accounting for multiple layers of the interconnect structure. The electrical
Inventors: Xia Li, Wei Zhao, Yu Cao, Shiqun Gu, Seung H. Kang, Matthew Nowak

Active thermal control for stacked ic devices

12/31/09 - 20090321909 - Thermal conductivity in a stacked IC device can be improved by constructing one or more active temperature control devices within the stacked IC device. In one embodiment, the control devices are thermal electric (TE) devices, such as Peltier devices. The TE devices can then be selectively controlled to remove or
Inventors: Shiqun Gu, Matthew Nowak, Thomas R. Toms

Ring oscillator using analog parallelism

12/17/09 - 20090309667 - An apparatus including a ring oscillator and related methods are disclosed. The ring oscillator includes at least two ring loops. A first ring loop includes a plurality of series coupled delay cells. At least one additional ring loop includes a plurality of series coupled delay cells. The at least one
Inventors: Jonghae Kim, Lew G. Chua-eoan, Matthew Nowak

3-d integrated circuit lateral heat dissipation

11/05/09 - 20090273068 - By filling an air gap between tiers of a stacked IC device with a thermally conductive material, heat generated at one or more locations within one of the tiers can be laterally displaced. The lateral displacement of the heat can be along the full length of the tier and the
Inventors: Kenneth Kaskoun, Shiqun Gu, Matthew Nowak


### Matthew Nowak patent invention listings

The bibliographic references displayed about Matthew Nowak's patents are for a recent sample of Matthew Nowak's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Matthew Nowak filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.

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